DETAILED ACTION
This communication is response to the amendment filed 12/05/2025. Claims 21 and 23-41 are pending and presented for examination.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Arguments
Applicant’s arguments with respect to claim(s) 21 and 23-41 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 21, 25-27, 30-37, and 39 is/are rejected under 35 U.S.C. 103 as being unpatentable over WO 2020/056180 to INTEL CORPORATION (hereafter Intel), see IDS 09/07/2023 in view of US 2023/0262608 to Gao et al. (hereafter Gao).
Regarding claim 21, Intel discloses an apparatus for a 5th generation NodeB (gNB) (see Intel, Fig 1 and Fig 5), the apparatus comprising:
processing circuitry to configure the gNB to: transmit, to a user equipment (UE), a physical downlink control channel (PDCCH) having downlink control information (DCI) format 2_3 that includes a dedicated beam indication to indicate a Transmission Configuration Indicator (TCI) state for transmission of an aperiodic sounding reference signal (SRS) triggered by the DCI (see Intel, Fig 5; ¶ 0058: DL beam indications may be based on one or more Transmission Configuration Indication (TCI) state(s); ¶ 0060: UE may be configured with a list of up to M TCI-State configurations within the higher layer parameter PDSCH-Config to decode PDSCH according to a detected PDCCH with DCI intended for the UE and the given serving cell; ¶ 0122: For an aperiodic SRS triggered in DCI format 2_3 and if the UE is configured with higher layer parameter srs-TPC-PDCCH-Group set to 'typeA'; ¶ 0129: encoding a SRS signal for transmission to the gNodeB including information on the aperiodic SRS resource set, the SRS signal to be on a transmit (TX) beam that is based on the configuration information; and at operation 504, encoding a SRS signal for transmission to the gNodeB including information on the aperiodic SRS resource set, the SRS signal to be on a transmit (TX) beam that is based on the configuration information); and
receive, in response to transmission of the PDCCH, the aperiodic SRS from the UE (see Intel, Fig 5; ¶ 0100: the UE receives a downlink DCI, a group common DCI, or an uplink DCI based command where a codepoint of the DCI may trigger one or more SRS resource set(s). The minimal time interval between the last symbol of the PDCCH triggering the aperiodic SRS transmission and the first symbol of SRS resource is N2 + 42……If the higher layer parameter spatialRelationlnfo contains the ID of a reference 'srs', the UE is to transmit the target SRS resource with the same spatial domain transmission filter used for the transmission of the reference periodic SRS or of the reference semi-persistent SRS or of the reference aperiodic SRS; ¶ 0122: For an aperiodic SRS triggered in DCI format 2_3 and if the UE is configured with higher layer parameter srs-TPC-PDCCH-Group set to 'typeA'; ¶ 0129: encoding a SRS signal for transmission to the gNodeB including information on the aperiodic SRS resource set, the SRS signal to be on a transmit (TX) beam that is based on the configuration information); and
a memory configured to store the DCI (see Intel, Fig 7, memory 744; ¶ 0139: The baseband circuitry 700 may be included in a UE or gNodeB, for example, in UE or gNodeB of Fig. 6, and may comprise processors 738-742 and a memory 744 utilized by said processors. Each of the processors 738-732 may include a memory interface, 704A-704E, respectively, to send/receive data to/from the memory 744).
Intel does not explicitly disclose the DCI format 23 having, after an SRS request, one of: a single block that includes multiple Transmitter Power Control (TPC) commands and multiple TCI states in which each pair of TPC command and TCI state applies to a different uplink carrier than each other pair of TPC command and TCI state, or at least one block that each includes a single TPC command and TCI state in which each block of the at least one block applies to a different uplink carrier than each other block of the at least one block.
However, Gao discloses the DCI format 23 having, after an SRS request, one of: a single block that includes multiple Transmitter Power Control (TPC) commands and multiple TCI states in which each pair of TPC command and TCI state applies to a different uplink carrier than each other pair of TPC command and TCI state, or at least one block that each includes a single TPC command and TCI state in which each block of the at least one block applies to a different uplink carrier than each other block of the at least one block (see Gao, ¶ 0067: for group based TPC commands in DCI format 2_2 and/or DCI format 2_3, each block for a UE can include one or more TPC commands and the associated closed loop indicators; ¶ 0163: TPC command for SRS in DCI format 2_3: In existing DCI format 2_3 for sending TPC commands for SRS to one or more UEs, one or more TPC commands can be allocated to UEs. A single closed loop is assumed for SRS, thus there is no closed loop indicator. In case of SRS transmission to multiple TRPs, more than one closed loop is required. To support SRS transmission to multiple TRPs, a closed loop indicator can be introduced in DCI format 2_3 for UEs configured with multiple closed loops for SRS; ¶ 0164: each block in DCI format 2_3 may contain multiple TPC commands each associated with a closed loop for SRS. The number of TPC commands in the block may be determined by the number of closed loops configured or may be configured; ¶ 0219: wherein the number of TPC commands in the DCI is determined based on one or more of the group consisting of: the number of TCI states indicated in the DCI; the number of TPC command fields in the DCI is determined by the maximum number of spatial relations (or UL TCI states) activated for all PUCCH resources configured in the corresponding BWP of a UL carrier; the number of SRIs (or UL TCI states) indicated in the DCI; the maximum number of SRIs (or UL TCI states) associated with PUSCH transmissions configured in the corresponding BWP of a UL carrier).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Gao and incorporate it into the system of Intel to achieve efficient power control in the communication system (see Gao, Abstract).
Regarding claim 25, Intel in view of Gao discloses the apparatus of claim 21, Intel does not explicitly disclose wherein the DCI format 2_3 has the single block.
However, Gao discloses wherein the DCI format 2_3 has the single block (see Gao, ¶ 0221: for group based TPC commands in DCI format 2_2 and/or DCI format 2_3, each block for the wireless device can include one or more TPC commands and the associated closed loop indicators).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Gao and incorporate it into the system of Intel to achieve efficient power control in the communication system (see Gao, Abstract).
Regarding claim 26, Intel in view of Gao discloses the apparatus of claim 21, Intel does not explicitly disclose wherein the DCI format 2_3 has the at least one block.
However, Gao discloses wherein the DCI format 2_3 has the at least one block (see Gao, ¶ 0221: for group based TPC commands in DCI format 2_2 and/or DCI format 2_3, each block for the wireless device can include one or more TPC commands and the associated closed loop indicators).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Gao and incorporate it into the system of Intel to achieve efficient power control in the communication system (see Gao, Abstract).
Regarding claim 27, Intel in view of Gao discloses the apparatus of claim 21, wherein: the processing circuitry is further to configure the gNB to: transmit the PDCCH on a scheduling carrier, and indicate to the UE that the aperiodic SRS is to be transmitted on a target carrier (see Intel, ¶ 0098: SRS resource configured on the same or different component carrier and/or bandwidth part as the SRS resource(s) in the SRS resource set), the target carrier Quasi Co-Located with the scheduling carrier, the aperiodic SRS following a TCI state of the scheduling carrier, and the TCI state is not explicitly included in the DCI (see Intel, ¶ 0069: the UE may expect that a TCI-State indicates one of the following quasi co-location type(s)).
Regarding claim 30, Intel in view of Gao discloses the apparatus of claim 21, but does not explicitly disclose wherein: the processing circuitry is further to configure the gNB to provide to the UE dynamic switching between single transmission-reception point (TRP) operation and multi-TRP operation, and the DCI includes, for each uplink carrier in multi-TRP operation: multiple TCI states, or a codepoint of a TCI state field in the DCI, the codepoint configured to indicate one of a plurality of TCI states, each of the plurality of TCI states is associated with a particular TRP (see Intel, 0061: the UE receives an activation command used to map up to 8 TCI states to the codepoints of the DCI field 'Transmission Configuration Indication'; 0050: Beam management refers to a set of layer 1/layer 2 (L1/L2) procedures to acquire and maintain a set of transmission/reception point(s) (TRP or TRxP to be used interchangeably) and/or UE beams that may be used for downlink (DL) and uplink (UL) transmission/reception).
Regarding claim 31, Intel in view of Gao discloses the apparatus of claim 21, wherein the processing circuitry is further to configure the gNB to indicate to the UE, via the DCI, to avoid transmission of acknowledgment of a beam indication from the gNB, transmission of the aperiodic SRS acting as the acknowledgment of the beam indication from the gNB (see Intel, ¶ 0144: wherein the aperiodic SRS resource set is for beam management, and wherein a minimal scheduling offset between a last symbol of a downlink control information (DCI) scheduling the SRS signal and a first symbol of the SRS signal is equal to a scheduling offset Ml if spatial relationship information is configured for the UE).
Regarding claim 32, Intel in view of Gao discloses the apparatus of claim 21, wherein the processing circuitry is further to configure the gNB to trigger, via the DCI, transmission of the aperiodic SRS from multiple UEs over at least one carrier, an SRS resource set of the aperiodic SRS selected from a plurality of usages that include beam management, codebook, and non-codebook usage (see Intel, ¶ 0122: for an aperiodic SRS triggered in DCI format 2_3 and if the UE is configured with higher layer parameter srs-TPC-PDCCH-Group set to 'typeA', and given by SRS- CarrierSwitching, without PUSCH/PUCCH transmission, the order of the triggered SRS transmission on the serving cells follow the order of the serving cells in the indicated set of serving cells configured by higher layers, where the UE in each serving cell transmits the configured one or two SRS resource set(s) with higher layer parameter SRS-SetUse set to 'antenna switching' and higher layer parameter resourceType in SRS-ResourceSet set to 'aperiodic'; 0046: SRS resources from different SRS resource sets configured with different usage, e.g. codebook, non-codebook, antenna switching or beam management, may not be simultaneously transmitted. Thus, only the SRS resources from different SRS resource sets configured with the same usage may be simultaneously transmitted).
Regarding claim 33, Intel in view of Gao discloses the apparatus of claim 21, wherein the processing circuitry is further to configure the gNB to indicate to the UE, via the DCI, an available slot for transmission of the aperiodic SRS, the available slot selected from a set of slots that include: an uplink slot, or a flexible slot having uplink or flexible orthogonal frequency division multiplexing (OFDM) symbols configured for SRS transmission (see Intel, ¶ 0122: for an aperiodic SRS triggered in DCI format 2_3 and if the UE is configured with higher layer parameter srs-TPC-PDCCH-Group set to 'typeA', and given by SRS- CarrierSwitching, without PUSCH/PUCCH transmission, the order of the triggered SRS transmission on the serving cells follow the order of the serving cells in the indicated set of serving cells configured by higher layers, where the UE in each serving cell transmits the configured one or two SRS resource set(s) with higher layer parameter SRS-SetUse set to 'antenna switching' and higher layer parameter resourceType in SRS-ResourceSet set to 'aperiodic'; 0046: SRS resources from different SRS resource sets configured with different usage, e.g. codebook, non-codebook, antenna switching or beam management, may not be simultaneously transmitted. Thus, only the SRS resources from different SRS resource sets configured with the same usage may be simultaneously transmitted; ¶ 0094: Number of OFDM symbols in the SRS resource, starting OFDM symbol of the SRS resource within a slot including repetition factor R as defined by the higher layer parameter resourceMapping).
Regarding claim 34, Intel in view of Gao discloses the apparatus of claim 33, wherein: the processing circuitry is further to configure the gNB to indicate, via radio resource control (RRC) signaling, an SRS resource set having a list of available slot values, and a value of the available slot is: explicitly indicated in a DCI field of the DCI, or implicitly indicated by one of: a DCI codepoint of an SRS request field of the DCI (see Intel, 0061: the UE receives an activation command used to map up to 8 TCI states to the codepoints of the DCI field 'Transmission Configuration Indication'; 0050: Beam management refers to a set of layer 1/layer 2 (L1/L2) procedures to acquire and maintain a set of transmission/reception point(s) (TRP or TRxP to be used interchangeably) and/or UE beams that may be used for downlink (DL) and uplink (UL) transmission/reception).
Also, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the well-known teaching of a value of the available slot is explicitly indicated in a DCI field of the DCI and incorporate it into the system of Intel based on user design preference to achieve efficient resource allocation as evidenced by US 2022/0264598 to XU et al. (see ¶ 0231).
Regarding claim 35, Intel in view of Gao discloses the apparatus of claim 33, wherein: the processing circuitry is further to configure the gNB to indicate, via radio resource control (RRC) signaling, an SRS resource set having multiple lists of available slot values, each list corresponding to a different component carrier, and a value of the available slot is one of: explicitly indicated in a DCI field of the DCI, or implicitly indicated by a DCI codepoint of an SRS request field of the DCI such that different values are applied for different component carriers (see Intel, ¶ 0098: SRS resource configured on the same or different component carrier and/or bandwidth part as the SRS resource(s) in the SRS resource set), the target carrier Quasi Co-Located with the scheduling carrier, the aperiodic SRS following a TCI state of the scheduling carrier, and the TCI state is not explicitly included in the DCI; ¶ 0061: The UE receives an activation command used to map up to 8 TCI states to the codepoints of the DCI field 'Transmission Configuration Indication'. When the HARQ-ACK corresponding to the PDSCH carrying the activation command is transmitted in slot n, the indicated mapping between TCI states and codepoints of the DCI field 'Transmission Configuration Indication' may be applied starting from slot n; ¶ 0093: For aperiodic SRS at least one state of the DCI field is used to select at least one out of the configured SRS resource set).
Regarding claim 36, Intel in view of Gao discloses the apparatus of claim 21, wherein: the processing circuitry is further to configure the gNB to indicate, via radio resource control (RRC) signaling, an SRS resource set having a list of available slot values for transmission of the aperiodic SRS, and a transmission slot for transmission of the aperiodic SRS is one of: based on an RRC parameter slotOffet, indicated by a specific slot value in the DCI, or a first available slot (see Intel, ¶ 0094: Slot level periodicity and slot level offset as defined by the higher layer parameters periodicityAndOffset-p or periodicityAndOffset-sp for an SRS resource of type periodic or semi-persistent. The UE is to not expect to be configured with SRS resources in the same SRS resource set SRS-ResourceSet with different slot level periodicities. For an SRS- ResourceSet configured with higher layer parameter resourceType set to 'aperiodic', a slot level offset is defined by the higher layer parameter slotOffset).
Regarding claim 37, it is rejected for the same reasons as set forth in claim 1.
Regarding claim 39, it is rejected for the same reasons as set forth in claim 1. Although phrased as non-transitory computer-readable storage medium claim, the claim is nevertheless simple repetitions of the subject matter of claim 1.
Claim(s) 23-24, 28, 29, 38, and 40 is/are rejected under 35 U.S.C. 103 as being unpatentable over Intel in view of Gao and further in view of “Moderator summary for multi-beam enhancement”, R1-2101185, 3GPP RAN WGI #104-e, by SAMSUNG (hereafter Samsung), see IDS dated 09/07/2023.
Regarding claim 23, Intel in view of Gao discloses the apparatus of claim 21, but does not explicitly disclose wherein the dedicated field indicates a joint uplink and downlink TCI state.
However, Samsung discloses wherein the dedicated field indicates a joint uplink and downlink TCI state (see Samsung, section 3.1: Joint DL/UL TCI: a common (therefore, joint) TCI state is indicated for the above DL TCI and UL TCI).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Samsung and incorporate it into the system of Intel to facilitate more efficient DL/UL beam management to support higher mobility and/or larger number of configured TCI states (see Samsung, section 1).
Regarding claim 24, Intel in view of Gao discloses the apparatus of claim 21, but does not explicitly disclose wherein the dedicated field indicates one of an uplink TCI state or a downlink TCI state for separate uplink and downlink TCI states.
However, Samsung discloses wherein the dedicated field indicates one of an uplink TCI state or a downlink TCI state for separate uplink and downlink TCI states (see Samsung, section 3.1: separate DL/UL TCI: two distinct (therefore, separate) TCI states, one indicated for the above DL TCI and one indicated for the above UL TCI).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Samsung and incorporate it into the system of Intel to facilitate more efficient DL/UL beam management to support higher mobility and/or larger number of configured TCI states (see Samsung, section 1).
Regarding claim 28, Intel in view of Gao disclose the apparatus of claim 21, but does not explicitly disclose wherein: the processing circuitry is further to configure the gNB to indicate that a common TCI state that crosses multiple carriers is available and that the aperiodic SRS is follow the common TCI state when the carriers are crossed, and the common TCI state is not explicitly included in the DCI.
However, Samsung discloses wherein: the processing circuitry is further to configure the gNB to indicate that a common TCI state that crosses multiple carriers is available and that the aperiodic SRS is follow the common TCI state when the carriers are crossed, and the common TCI state is not explicitly included in the DCI (see Samsung, section 2: specify UL TCI framework to facilitate common TCI state update for UL (data, PUCCH, SRS; Appendix A: on Rel-17 unified TCI framework, support common TCI state ID update and activation to provide common QCL information and/or common UL TX spatial filter(s) across a set of configured CCs).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Samsung and incorporate it into the system of Intel to facilitate more efficient DL/UL beam management to support higher mobility and/or larger number of configured TCI states (see Samsung, section 1).
Regarding claim 29, Intel in view of Gao discloses the apparatus of claim 21, Intel does not explicitly disclose wherein: the processing circuitry is further to configure the gNB to indicate to the UE that the aperiodic SRS is to be transmitted on a target carrier and to use an available TCI state independent of whether the available TCI state is an available joint uplink and downlink TCI state or separate uplink or downlink TCI state, and the TCI state is not explicitly included in the DCI.
However, Samsung discloses wherein: the processing circuitry is further to configure the gNB to indicate to the UE that the aperiodic SRS is to be transmitted on a target carrier and to use an available TCI state independent of whether the available TCI state is an available joint uplink and downlink TCI state or separate uplink or downlink TCI state, and the TCI state is not explicitly included in the DCI (see Samsung, section 2: specify UL TCI framework to facilitate common TCI state update for UL (data, PUCCH, SRS; section 3.1: Joint DL/UL TCI: a common (therefore, joint) TCI state is indicated for the above DL TCI and UL TCI).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Samsung and incorporate it into the system of Intel to facilitate more efficient DL/UL beam management to support higher mobility and/or larger number of configured TCI states (see Samsung, section 1).
Regarding claim 38, Intel in view of Gao discloses the apparatus of claim 37, Intel does not explicitly disclose wherein: one of: the dedicated field indicates a joint uplink and downlink TCI state, or the dedicated field indicates one of an uplink TCI state or a downlink TCI state for separate uplink and downlink TCI states.
However, Gao wherein: one of: the dedicated field indicates a joint uplink and downlink TCI state, or the dedicated field indicates one of an uplink TCI state or a downlink TCI state for separate uplink and downlink TCI states (see Samsung, section 3.1: Joint DL/UL TCI: a common (therefore, joint) TCI state is indicated for the above DL TCI and UL TCI).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Samsung and incorporate it into the system of Intel to facilitate more efficient DL/UL beam management to support higher mobility and/or larger number of configured TCI states (see Samsung, section 1).
Regarding claim 40, it is rejected for the same reasons as set forth in claim 38. Although phrased as non-transitory computer-readable storage medium claim, the claim is nevertheless simple repetitions of the subject matter of claim 38.
Claim(s) 41 is/are rejected under 35 U.S.C. 103 as being unpatentable over Intel in view of Gao, and further in view of US 2022/0264598 to XU et al. (hereafter Xu).
Regarding claim 41, Intel in view of Gao discloses apparatus of claim 33, but does not explicitly disclose wherein: the processing circuitry is further to configure the gNB to indicate, via radio resource control (RRC) signaling, an SRS resource set having a list of available slot values, and a value of the available slot is implicitly indicated by one of: a DCI codepoint of an SRS request field of the DCI, or a component carrier index of a component carrier to carry the aperiodic SRS.
However, Xu discloses wherein: the processing circuitry is further to configure the gNB to indicate, via radio resource control (RRC) signaling, an SRS resource set having a list of available slot values, and a value of the available slot is implicitly indicated by one of: a DCI codepoint of an SRS request field of the DCI, or a component carrier index of a component carrier to carry the aperiodic SRS (see Xu, ¶ 0231: When the network device sends the first indication information through the DCI, an indication field may be set in the DCI to indicate a set of available slots or symbols; ¶ 0237: the network device may pre-configure and number several possible sets of available slots or symbols to the terminal device through RRC signaling. Afterwards, the network device may indicate the index of the available slot or symbol to the terminal device through the DCI. After the terminal device receives the index of the set of available slots or symbols sent by the network device, the terminal device can determine the set of available slots or symbols according to the index sent by the network device and the above configuration information).
Thus, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the above teaching as taught by Xu and incorporate it into the system of Intel to reduce the cost of the terminal device without affecting a transmission performance of the terminal device (see Xu, ¶ 0006).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/RASHEED GIDADO/Primary Examiner, Art Unit 2464
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