Prosecution Insights
Last updated: April 19, 2026
Application No. 18/281,955

DISPLAY SUBSTRATE AND METHOD FOR MANUFACTURING SAME, AND DISPLAY APPARATUS

Non-Final OA §102§103
Filed
Sep 13, 2023
Examiner
BOWMAN, MARY ELLEN
Art Unit
2875
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE TECHNOLOGY GROUP CO., LTD.
OA Round
1 (Non-Final)
82%
Grant Probability
Favorable
1-2
OA Rounds
2y 0m
To Grant
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allow Rate
1138 granted / 1395 resolved
+13.6% vs TC avg
Strong +18% interview lift
Without
With
+18.5%
Interview Lift
resolved cases with interview
Fast prosecutor
2y 0m
Avg Prosecution
25 currently pending
Career history
1420
Total Applications
across all art units

Statute-Specific Performance

§101
0.2%
-39.8% vs TC avg
§103
53.4%
+13.4% vs TC avg
§102
29.3%
-10.7% vs TC avg
§112
6.2%
-33.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1395 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Information Disclosure Statement The information disclosure statements (IDSs) submitted on 11/24/25, 12/17/24 and 3/13/24 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-4, 11, 14, 18, 37, 52 and 53 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Kumagai et al., US 2007/0263164. Regarding claim 1, Kumagai teaches a display ([0002] and Figure 5) substrate, comprising: a base substrate (11); a plurality of sub-pixels (see Figure 1, R, G, B) located on the base substrate, wherein a sub-pixel comprises a light emitting element, the light emitting element comprises a light emitting functional layer (16b), and a first electrode (15) and a second electrode (17) that are located on two sides of the light emitting functional layer, the first electrode is located between the light emitting functional layer and the base substrate, the light emitting functional layer comprises a conductive sub-layer (16a); and a partition structure (18) located on the base substrate, the partition structure is located between adjacent sub-pixels (see Figure 1), and the conductive sub-layer is disconnected at a position where the partition structure is located (see Figure 5, 16a is disconnected at partition 18x); the plurality of sub-pixels comprise a plurality of first-color sub-pixels (R), a plurality of second-color sub-pixels (B), and a plurality of third-color sub-pixels (G), the partition structure comprises a plurality of annular partition portions (see 18 in Figure 1), an annular partition portion surrounds at least one of the first-color sub-pixels or at least one of the second-color sub-pixels or at least one of the third-color sub-pixels (id at Figure 1), and the plurality of annular partition portions surround a plurality of sub-pixels of a same color or a plurality of sub-pixels of different colors (id); at least one of the annular partition portions is in a closed ring shape (see Figure 1, closed ring shape around each subpixel), or/and, at least one of the annular partition portions is provided with at least one notch (Examiner is construing this as “or”). Regarding claim 2, Kumagai teaches the invention as explained above regarding claim 1 and further teaches the plurality of annular partition portions comprise a plurality of first annular pixel partition portions and a plurality of second annular pixel partition portions (first annular partition portion 18 surrounding R subpixels and second annular pixel partition portions surrounding B pixels), a first annular pixel partition portion surrounds one of the first-color sub-pixels (id at Figure 1, R pixels), and a second annular pixel partition portion surrounds one of the third-color sub-pixels (id at Figure 1, B pixels); the first annular pixel partition portion is in a closed ring shape (see Figure 1, closed ring shape around R subpixels) or is provided with at least one first notch, and the second annular pixel partition portion is in a closed ring shape (see Figure 1, closed ring shape around B subpixels) or is provided with at least one second notch. Regarding claim 3, Kumagai teaches the invention as explained above regarding claim 2 and further teaches the partition structure between a first-color sub-pixel and a second-color sub-pixel which are adjacent comprises only a part of the first annular pixel partition portion (only one vertical line of the annular partition portion lies between adjacent sub-pixels, see Figure 1). Regarding claim 4, Kumagai teaches the invention as explained above regarding claim 2 and further teaches the partition structure between a third-color sub-pixel and a second-color sub-pixel which are adjacent comprises only a part of the second annular pixel partition portion (only one vertical line of the annular partition portion lies between adjacent sub-pixels, see Figure 1). Regarding claim 11, Kumagai teaches the invention as explained above regarding claim 1 and further teaches each of the annular partition portions surrounds at least one of the second-color sub-pixels (see Figure 1, second color sub-pixels G), and the partition structure further comprises a plurality of first strip-shaped partition portions and a plurality of second strip-shaped partition portions (horizontal and vertical, see Figure 1); a first strip-shaped partition portion extends along a first direction (horizontal), and a second strip-shaped partition portion extends along a second direction (vertical), wherein the first direction and the second direction intersect (see Figure 1, partitions 18 have sections that intersect horizontal and vertical); the first strip-shaped partition portion connects two of the annular partition portions adjacent in the first direction (id at Figure 1), and the second strip-shaped partition portion connects two of the annular partition portions adjacent in the second direction (id); the plurality of the first strip-shaped partition portions and the plurality of the second strip-shaped partition portions connect the plurality of annular partition portions and form a plurality of first grid structures and a plurality of second grid structures in a region other than the plurality of annular partition portions (see grid structures 18 in Figure 1), a first grid structure is disposed around one first-color sub-pixel (R), and a second grid structure is disposed around one third-color sub-pixel (B). Regarding claim 14, Kumagai teaches the invention as explained above regarding claim 1 and further teaches the plurality of annular partition portions comprise a plurality of first annular partition portions (Figure 1, annular partition portions around G subpixels), a plurality of second annular partition portions (partitions around R subpixels), and a plurality of third annular partition portions (partitions around B subpixels); a first annular partition portion is disposed around one second-color sub-pixel (G), a second annular partition portion is disposed around one first-color sub-pixel (R), and a third annular partition portion is disposed around one third-color sub-pixel (B). Regarding claim 18, Kumagai teaches the invention as explained above regarding claim 1 and further teaches the plurality of annular partition portions comprise a plurality of first annular partition portions (Figure 1, disposed around two G subpixels in a column direction), a plurality of second annular partition portions (Figure 1 disposed around R subpixels), and a plurality of third annular partition portions (Figure 1, disposed around B subpixels); a first annular partition portion is disposed around two adjacent second-color sub-pixels (two adjacent G subpixels in column direction), a second annular partition portion is disposed around one first-color sub-pixel (R subpixel, examiner considers that the column may be considered a single subpixel or multiple), and a third annular partition portion is disposed around one third-color sub-pixel (B subpixel, examiner considers the column may be considered a single subpixel or multiple subpixels within a larger pixel). Regarding claim 37, Kumagai teaches the invention as explained above regarding claim 1 and further teaches a planarization layer (13, see Figure 5) located between the base substrate and the first electrode; and a protective structure (14, see Figure 5) located between the planarization layer and the first electrode. Regarding claim 52, Kumagai further teaches a display apparatus ([0002]). Regarding claim 53, Kumagai teaches a method for manufacturing a display substrate ([0002] and Figure 5), comprising: forming a plurality of first electrodes (15) on a base substrate (11); forming a partition structure (18) on the base substrate; forming a light emitting functional layer (16b) on a side of the partition structure and the plurality of first electrodes away from the base substrate (see Figure 5), wherein the light emitting functional layer comprises a conductive sub-layer (16a); and forming a second electrode (17) on a side of the light emitting functional layer away from the base substrate, wherein the second electrode, the light emitting functional layer, and the plurality of the first electrodes form light emitting elements of a plurality of sub-pixels (see Figure 5); the partition structure is located between sub-pixels which are adjacent (see subpixels separated by partition structures in Figure 1), and the conductive sub-layer is disconnected at a position where the partition structure is located (see Figure 5, 16a is disconnected where partition structure 18x is located); the plurality of sub-pixels comprises a plurality of first-color sub-pixels (R), a plurality of second-color sub-pixels (G), and a plurality of third-color sub-pixels (B), the partition structure comprises a plurality of annular partition portions (see 18 in Figure 1), an annular partition portion surrounds at least one of the first-color sub-pixels or at least one of the second-color sub-pixels or at least one of the third-color sub-pixels (id), and the plurality of annular partition portions surround a plurality of sub-pixels of a same color or a plurality of sub-pixels of different colors (surround subpixels of the same color and of different colors, see Figure 1); at least one of the annular partition portions is in a closed ring shape (id at Figure 1), or/and at least one of the annular partition portions is provided with at least one notch (examiner construes this limitation as “or”). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 25 is rejected under 35 U.S.C. 103 as being unpatentable over Kumagai in view of Takayama, US 2022/0223669. Regarding claim 25, Kumagai teaches the invention as explained above regarding claim 1, and further teaches a pixel definition layer (18x in Figure 5) located on the base substrate, the pixel definition layer located on a side of the first electrode (15) away from the base substrate (11), and the pixel definition layer is provided with a plurality of pixel openings (Rpx), the plurality of pixel openings corresponding to the plurality of sub-pixels one by one to define effective light emitting regions of the plurality of sub-pixels, and pixel opening is configured to expose the first electrode (see Figure 1). Kumagai is silent as to the pixel spacing openings. However, in the same field of endeavor of display devices, Takayama teaches pixel spacing openings located between adjacent first electrodes and at least partially exposes an edge of the partition structure (Figure 4, edge of partition structure 31 exposed). Further, it would have been well known to those of ordinary skill in the art at the time of filing that providing a pixel spacing opening would ensure proper separation between pixels so as to prevent unwanted crosstalk. Therefore, it would have been obvious for one of ordinary skill in the art at the time of filing to provide the Kumagai device with pixel spacing openings to further ensure proper functioning by preventing cross talk. Allowable Subject Matter Claims 5, 7, 9, 16, 22, 40 and 54-56 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The prior art fails to teach or suggest the first annular pixel partition portion is provided with at least one first notch, located on an extension line of a diagonal of an effective light emitting region. The prior art further fails to teach or suggest a second notch located along an extension line of a diagonal of an effective light emitting region. Further, the prior art fails to teach or suggest a plurality of first notches in an array, and form a first notch row and a first notch column along a first direction and a second direction. Finally, the prior art fails to teach or suggest a surface of the planarization layer away from the base substrate is provided with a first and second convex portion of integral structure, and the first convex portion is the first isolation portion, and the first electrode is disposed on a side of the protective structure away from the base substrate. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Bang et al., US 2018/0190740 teaches a display device comprising a partition structure and a pixel spacing area where a break in the anode electrode exposes at least a portion of the edge of the partition structure. Any inquiry concerning this communication or earlier communications from the examiner should be directed to MARY-ELLEN BOWMAN whose telephone number is (571)270-5383. The examiner can normally be reached Monday-Thursday; 7:00 am-5:00 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Greece can be reached at (571) 272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. MARY ELLEN BOWMAN Examiner Art Unit 2875 /MARY ELLEN BOWMAN/Primary Examiner, Art Unit 2875
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Prosecution Timeline

Sep 13, 2023
Application Filed
Mar 23, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+18.5%)
2y 0m
Median Time to Grant
Low
PTA Risk
Based on 1395 resolved cases by this examiner. Grant probability derived from career allow rate.

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