Prosecution Insights
Last updated: April 19, 2026
Application No. 18/283,460

Display Substrate and Display Device

Non-Final OA §102
Filed
Sep 22, 2023
Examiner
HINES, ANNE M
Art Unit
2875
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE TECHNOLOGY GROUP CO., LTD.
OA Round
1 (Non-Final)
85%
Grant Probability
Favorable
1-2
OA Rounds
2y 3m
To Grant
96%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
766 granted / 899 resolved
+17.2% vs TC avg
Moderate +11% lift
Without
With
+11.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
18 currently pending
Career history
917
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
38.4%
-1.6% vs TC avg
§102
38.7%
-1.3% vs TC avg
§112
19.0%
-21.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 899 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-6, 10, 12-16, and 19-20 is/are rejected under 35 U.S.C. 102(a)(1) and 102(a)(2) as being anticipated by Xue et al. (US 2021/0210721). Regarding claim 1, Xue discloses a display substrate (Figs. 1-4), comprising an active area (11; Paragraph [0033]) and a peripheral area located on a periphery of the active area, wherein a barrier dam and at least one barrier post are arranged in the peripheral area (2; Paragraph [0032]); the display substrate comprises a base substrate (10; Paragraph [0033]), and a light emitting structure layer (11; Paragraph [0033]) and an encapsulation structure layer arranged on the base substrate (3 & 4; Paragraph [0032]), wherein the encapsulation structure layer is located on a side of the light emitting structure layer away from the base substrate (Figs. 1-4, 3 & 4 & 10; Paragraph [0032-0033]), the light emitting structure layer comprises a cathode (11; Paragraph [0003-0004]—Note that the Examiner considers a cathode characteristic to the structure of and OLED), and the encapsulation structure layer comprises an organic encapsulation layer (3; Paragraph [0032]); and the at least one barrier post is located between the cathode and the barrier dam (Figs. 1-4, 21 nearest to 11 is between 11 and element 21 at left side of figures; Paragraph [0040-0041]), and an orthographic projection of the at least one barrier post on the base substrate is located within a range of an orthographic projection of the organic encapsulation layer on the base substrate (Figs. 1-4, 21 & 3; Paragraph [0040-0041]). Regarding claim 2, Xue further discloses wherein the peripheral area comprises four sub-areas of upper, lower, left and right, and the at least one barrier post is arranged in at least one of the sub-areas (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 3, Xue further discloses wherein the barrier posts are provided in two sub-areas arranged opposite to each other (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 4, Xue further discloses wherein the peripheral area is provided with a plurality of barrier posts, which are arranged sequentially along a direction away from the active area (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 5, Xue further discloses wherein a quantity of the barrier posts is less than or equal to 10 (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 6, Xue further discloses wherein the at least one barrier post comprises a plurality of sub-barrier posts, there are spacings between adjacent sub-barrier posts, and the plurality of sub-barrier posts surround the active area (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 10, Xue further discloses wherein a cross section of the at least one barrier post is arranged in a shape of a trapezoid (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 12, Xue further discloses a display apparatus comprising the display substrate of claim 1 (Paragraph [0005]). Regarding claim 13, Xue discloses a display substrate (Figs. 1-4), comprising: a base substrate, comprising an active area (11; Paragraph [0033]) and a peripheral area located on a periphery of the active area (area comprising 2; Paragraph [0032]); an encapsulation structure layer (3 & 4; Paragraph [0032]), arranged on the base substrate (10; Paragraph [0033]), located in the active area and the peripheral area, and comprising an organic encapsulation layer (3; Paragraph [0032]); a barrier dam and at least one barrier post, located in the peripheral area, wherein the at least one barrier post is located on a side of the barrier dam close to the active area (Figs. 1-4, 21 nearest to 11 is between 11 and element 21 at left side of figures; Paragraph [0040-0041]); and the organic encapsulation layer has a gradient area in the peripheral area, and an orthographic projection of the gradient area of the organic encapsulation layer on the base substrate is overlapped with an orthographic projection of the at least one barrier post on the base substrate (Figs. 1-4, 3 & 2; Paragraph [0032]). Regarding claim 14, Xue further discloses wherein an orthographic projection of the organic encapsulation layer on the base substrate is not overlapped with an orthographic projection of the barrier dam on the base substrate (Fig. 1, 3 & outermost element 21). Regarding claim 15, Xue further discloses a light emitting structure layer located on the base substrate (11; Paragraph [0033]), wherein the light emitting structure layer is located on a side of the encapsulation structure layer close to the base substrate (Figs. 1-4, 11 & 10) and comprises a cathode layer (11; Paragraph [0003-0004]—Note that the Examiner considers a cathode characteristic to the structure of and OLED), and an orthographic projection of the cathode layer on the base substrate is not overlapped with an orthographic projection of the at least one barrier post on the base substrate (Figs. 1-4 11 & 2). Regarding claim 16, Xue further discloses wherein the at least one barrier post comprises a plurality of sub-barrier posts, there are spacings between adjacent sub-barrier posts, and the plurality of sub-barrier posts surround the active area (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 19, Xue further discloses wherein the peripheral area comprises four sub-areas of upper, lower, left and right, and the at least one barrier post is arranged in at least one of the sub-areas (Figs. 1-4, 21; Paragraph [0041-0043]). Regarding claim 20, Xue further discloses wherein the barrier posts are provided in two sub-areas arranged opposite to each other (Figs. 1-4, 21; Paragraph [0041-0043]). Allowable Subject Matter Claims 6-9, 11, 17-18 objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Specifically, regarding claim 6, the requirement wherein the at least one barrier post comprises a plurality of sub-barrier posts, there are spacings between adjacent sub-barrier posts, and the plurality of sub-barrier posts surround the active area is neither taught nor suggested by the prior art of record. Claims 7-9 are objected to based on their dependence from claim 6. Specifically, regarding claim 11, the requirement wherein the display substrate further comprises a pixel planarization layer, wherein the pixel planarization layer is located on a side of the light emitting structure layer close to the base substrate, and an orthographic projection of the at least one barrier post on the base substrate is partially overlapped with an orthographic projection of the pixel planarization layer on the base substrate is neither taught nor suggested by the prior art of record. Specifically, regarding claim 17, the requirement wherein the peripheral area at least comprises: two adjacent barrier posts arranged sequentially along a direction away from the active area; and spacings between adjacent sub-barrier posts of one of the two barrier posts close to the active area are aligned with sub-barrier posts of one of the two barrier posts away from the active area is neither taught nor suggested by the prior art of record. Any inquiry concerning this communication or earlier communications from the examiner should be directed to ANNE M HINES whose telephone number is (571)272-2285. The examiner can normally be reached on M-F: 8:00-4:30. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, James Greece, can be reached on 571-272-3711. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Anne M Hines/ Primary Examiner Art Unit 2879
Read full office action

Prosecution Timeline

Sep 22, 2023
Application Filed
Jan 23, 2026
Non-Final Rejection — §102 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12604602
DISPLAY APPARATUS
2y 5m to grant Granted Apr 14, 2026
Patent 12596393
PARALLEL OPTICAL COMPUTING SYSTEM
2y 5m to grant Granted Apr 07, 2026
Patent 12581839
DISPLAY PANEL, METHOD FOR MANUFACTURING DISPLAY PANEL AND DISPLAY DEVICE
2y 5m to grant Granted Mar 17, 2026
Patent 12575462
DISPLAY DEVICE AND FABRICATION METHOD THEREOF
2y 5m to grant Granted Mar 10, 2026
Patent 12563943
DISPLAY PANEL AND DISPLAY DEVICE INCLUDING THE SAME
2y 5m to grant Granted Feb 24, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
85%
Grant Probability
96%
With Interview (+11.0%)
2y 3m
Median Time to Grant
Low
PTA Risk
Based on 899 resolved cases by this examiner. Grant probability derived from career allow rate.

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