DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, 7, 9, 11-12, 16 and 19-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by CN114924436A.
As to claim 1, CN114924436A disclose in figure 2, an array substrate comprising: a base substrate 1, and a first insulation layer 21, a second insulation layer 22, and a third insulation layer 32, a planarization layer 6, a first electrode layer 7, a fourth insulation layer 8, and a second electrode layer 9, that are stacked sequentially on the base substrate; the third insulation layer 32 comprises a first interlayer insulation layer 302, a second interlayer insulation layer 301 and a third interlayer insulation layer 302 that are sequentially stacked (middle three layers of the stack); the first interlayer insulation layer 302 is located on a side of the second interlayer insulation layer 301 close to the base substrate, and the third interlayer insulation layer 302 is located on a side of the second interlayer insulation layer 301 away from the base substrate; a material of the first interlayer insulation layer 302 and a material of the third interlayer insulation layer 302 comprise silicon oxide (paragraph [0043]); and a material of the second interlayer insulation layer 301 comprises silicon nitride (paragraph [0043]), and wherein the array substrate further comprises a plurality of pixel areas located in a display area. CN114924436A discloses a plurality of pixel areas located in a display area, with the structure of one pixel area shown in figure 2. As shown in figure 2, each of the plurality of pixel areas comprises: a first electrode 7 and a second electrode 9, and an orthographic projection of the first electrode 7 on the base substrate is at least partially overlapped with an orthographic projection of the second electrode 9 located in a same pixel area on the base substrate; the first electrode layer comprises the first electrode of at least one pixel area, and the first electrode is a planar electrode; the second electrode layer comprises the second electrode of at least one pixel area, and the second electrode comprises a plurality of sub-electrodes (the electrode strips shown in figure 2 are considered sub-electrodes) arranged in an array.
As to claim 3, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 1. CN114924436A further discloses in paragraph [0036], wherein the second insulation layer comprises: a first sub-insulation layer and a second sub-insulation layer, the second sub-insulation layer is located on a side of the first sub-insulation layer away from the base substrate; a material of the first sub-insulation layer comprises silicon oxide; and a material of the second sub-insulation layer comprises silicon nitride.
As to claim 7, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 1. CN114924436A further discloses in figure 2, wherein the first electrode layer 7 is a common electrode, and the second electrode layer 9 is a pixel electrode.
As to claim 9, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 1. CN114924436A further discloses in figure 4, a color filter substrate 200 and the array substrate 100 that are disposed oppositely, and a liquid crystal layer 300 located between the color filter substrate and the array substrate.
As to claim 11, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 9. CN114924436A further discloses figure 4, wherein the color filter substrate comprises: a black matrix layer (shaded portion of layer 2002) and a light filter layer (non-shaded portion of layer 2002); the black matrix layer comprises a black matrix, and the light filter layer comprises a light filter unit; the color filter substrate comprises a pixel opening region A1; the pixel opening region is provided to be surrounded by the black matrix; the light filter unit covers the pixel opening region; wherein an orthographic projection of the black matrix on the base substrate (region A2) is partially overlapped with an orthographic projection of a pixel electrode on the base substrate (in figure 2, pixel electrode 9 overlaps region A2).
As to claim 12, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 11. CN114924436A further discloses in figures 2 and 4, wherein the orthographic projection of the black matrix on the base substrate (region A2) is partially overlapped with an orthographic projection of a common electrode on the base substrate (in figure 2, common electrode 7 overlaps region A2).
As to claim 16, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 9. CN114924436A further discloses in figure 4, a backlight source 400, and the liquid crystal display panel.
As to claim 19, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 1. CN114924436A further discloses wherein refractive indices of the first interlayer insulation layer (silicon oxide) and the third interlayer insulation layer (silicon oxide) are smaller than a refractive index of the second interlayer insulation layer (silicon nitride) because the refractive index of silicon oxide is smaller than the refractive index of silicon nitride.
As to claim 20, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 3. CN114924436A further discloses wherein a refractive index of the first sub-insulation layer (silicon oxide) is smaller than a refractive index of the second sub-insulation layer (silicon nitride) because the refractive index of silicon oxide is smaller than the refractive index of silicon nitride.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 4-6, 8, 10, 14-15 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over CN114924436A.
As to claim 2, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 1. CN114924436A further discloses in paragraph [0062], wherein a thickness of the first interlayer insulation layer 302 is in a range of 300 angstroms to 2000 angstroms; a thickness of the second interlayer insulation layer 301 is in a range of 300 to 2000 angstroms; and a thickness of the third interlayer insulation layer 302 is in a range of 300 angstroms to 2000 angstroms. These ranges overlap the claimed ranges of 1,980 angstroms to 2,420 angstroms, 1,260 to 1,540 angstroms, and 855 angstroms to 1,045 angstroms. According to MPEP 2144.05, Section I: In the case where the claimed ranges “overlap or lie inside ranges disclosed by the prior art” a prima facie case of obviousness exists.
As to claim 4, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 2, but does not disclose wherein a thickness of the first sub-insulation layer is in a range of 720 angstroms to 880 angstroms, and a thickness of the second sub-insulation layer is in a range of 360 angstroms to 440 angstroms. However, it was known to optimize the thickness of insulating layers within a display device to provide sufficient insulation between conductive layers while minimizing the thickness of the display device. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A wherein a thickness of the first sub-insulation layer is in a range of 720 angstroms to 880 angstroms, and a thickness of the second sub-insulation layer is in a range of 360 angstroms to 440 angstroms, in order to optimize the thickness of the first sub-insulation layer and the second sub-insulation layer to provide sufficient insulation between conductive layers while minimizing the thickness of the display device. See MPEP 2144.05, Section II.
As to claim 5, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 1. CN114924436A further discloses in figure 2 and paragraph [0036], wherein the first insulation layer 21 comprises a first buffer layer, and a material of the first buffer layer comprises silicon oxide. CN114924436A does not disclose wherein a thickness of the first buffer layer is in a range of 2,700 angstroms to 3,300 angstroms. However, it was known to optimize the thickness of insulating layers within a display device to provide sufficient insulation between conductive layers while minimizing the thickness of the display device. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A wherein a thickness of the first buffer layer is in a range of 2,700 angstroms to 3,300 angstroms, in order to optimize the thickness of the first buffer layer to provide sufficient insulation between conductive layers while minimizing the thickness of the display device. See MPEP 2144.05, Section II.
As to claim 6, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 5. CN114924436A further discloses in figure 2 and paragraph [0036], wherein the first insulation layer 21 comprises a second buffer layer, the second buffer layer is located between the base substrate and the first buffer layer, and a material of the second buffer layer comprises silicon nitride.
As to claim 8, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 7. CN114924436A further discloses in paragraph [0059] that the first and second electrodes are made of transparent conductive materials, but does not specifically disclose indium tin oxide (ITO). However, indium tin oxide (ITO) was a conventional material for forming transparent conductive display electrodes. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A by forming the first and second electrodes from indium tin oxide (ITO) because conventional materials were known to be cost-effective and reliable.
As to claim 10, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 9, but does not disclose wherein the liquid crystal material has a birefringence of 0.09 to 0.13, and a clearing point of the liquid crystal material is greater than or equal to 100°C. However, it was known to optimize the birefringence and the clearing point of a liquid crystal material in order to obtain a liquid crystal layer with desired optical properties. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A wherein the liquid crystal material has a birefringence of 0.09 to 0.13, and a clearing point of the liquid crystal material is greater than or equal to 100°C, in order to obtain a liquid crystal layer with desired optical properties. See MPEP 2144.05, Section II.
As to claim 14, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 11. CN114924436A does not disclose wherein the light filter layer comprises a blue light filter unit, a green light filter unit, and a red light filter unit. However, this was a conventional color filter structure for providing a color display. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A wherein the light filter layer comprises a blue light filter unit, a green light filter unit, and a red light filter unit, because this was a conventional color filter structure for providing a color display, and conventional structures were known to be cost-effective and reliable. CN114924436A does not disclose wherein a wavelength corresponding to a transmittance peak value of the blue light filter unit is in a range of 445nm to 465nm, a wavelength corresponding to a half-transmittance peak value of the blue light filter unit is in a range of 378nm to 388nm, and a wavelength corresponding to another half-transmittance peak value of the blue light filter unit is in a range of 509nm to 519nm. However, it was known to optimize the spectral characteristics of a color filter unit in order to obtain high color purity. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify CN114924436A wherein a wavelength corresponding to a transmittance peak value of the blue light filter unit is in a range of 445nm to 465nm, a wavelength corresponding to a half-transmittance peak value of the blue light filter unit is in a range of 378nm to 388nm, and a wavelength corresponding to another half-transmittance peak value of the blue light filter unit is in a range of 509nm to 519nm, in order to obtain a blue light filter unit with high color purity. See MPEP 2144.05, Section II.
As to claim 15, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 14. CN114924436A does not disclose wherein a wavelength corresponding to a transmittance peak value of the green light filter unit is in a range of 523nm to 533nm, a wavelength corresponding to a half-transmittance peak value of the green light filter unit is in a range of 473nm to 483nm, and a wavelength corresponding to another half-transmittance peak value of the green light filter unit is in a range of 598nm to 608nm. However, it was known to optimize the spectral characteristics of a color filter unit in order to obtain high color purity. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to further modify CN114924436A wherein a wavelength corresponding to a transmittance peak value of the green light filter unit is in a range of 523nm to 533nm, a wavelength corresponding to a half-transmittance peak value of the green light filter unit is in a range of 473nm to 483nm, and a wavelength corresponding to another half-transmittance peak value of the green light filter unit is in a range of 598nm to 608nm, in order to obtain a green light filter unit with high color purity. See MPEP 2144.05, Section II.
As to claim 17, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 16, but does not disclose wherein a wavelength of a light emitting main peak of the backlight source is in a range of 445nm to 465nm, and a wavelength of a light emitting auxiliary peak of the backlight source is in a range of 480nm to 600nm. However, it was known to optimize the spectral characteristics of a backlight source in order to obtain a backlight source that provides balanced white light, which is a combination of red, green, and blue light. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A wherein a wavelength of a light emitting main peak of the backlight source is in a range of 445nm to 465nm, and a wavelength of a light emitting auxiliary peak of the backlight source is in a range of 480nm to 600nm, in order to obtain a backlight source that provides balanced white light.
As to claim 18, CN114924436A discloses all of the elements of the claimed invention discussed above regarding claim 16, but does not disclose wherein the display device is a projection display device. However, projection display devices incorporating a liquid crystal panel were conventional. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify CN114924436A wherein the display device is a projection display device because conventional structures such as projection display devices incorporating a liquid crystal panel were known to be cost-effective and reliable.
Allowable Subject Matter
Claim 13 is objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter: none of the prior art taught or fairly suggested a liquid crystal display panel comprising the combination required by claim 13, wherein the common electrode comprises a plurality of slits, and orthographic projections of the plurality of slits on the base substrate have no overlapping region with the orthographic projection of the black matrix on the base substrate, and have an overlapping region with the orthographic projection of the pixel electrode on the base substrate.
Response to Arguments
Applicant's arguments filed April 28, 2026 have been fully considered but they are not persuasive.
Applicant argues that in CN114924436A, layers 21, 32 and 8 refer to the buffer layer, the second anti-reflection structure, and the passivation layer respectively, and are not disclosed as being insulation layers. However, regardless of the function ascribed to these layers, they are all made of insulating material. The buffer layer 21 is made of silicon oxide, which is an insulating material. The anti-reflection structure 32 comprises alternating layers 301 and 302. Layer 301 is made of silicon nitride and layer 302 is made of silicon oxide, which are both insulating materials. The passivation layer 8 is made of silicon oxide, which is an insulating material.
Applicant argues that CN114924436A does not disclose the newly added features. However, CN114924436A discloses a plurality of pixel areas located in a display area, with the structure of one pixel area shown in figure 2. As shown in figure 2, each of the plurality of pixel areas comprises: a first electrode 7 and a second electrode 9, and an orthographic projection of the first electrode 7 on the base substrate is at least partially overlapped with an orthographic projection of the second electrode 9 located in a same pixel area on the base substrate; the first electrode layer comprises the first electrode of at least one pixel area, and the first electrode is a planar electrode; the second electrode layer comprises the second electrode of at least one pixel area, and the second electrode comprises a plurality of sub-electrodes (the electrode strips shown in figure 2 are considered sub-electrodes) arranged in an array.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to David Chung whose telephone number is (571)272-2288. The examiner can normally be reached Monday - Friday, 8:30 am - 5:00 pm.
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/DAVID Y CHUNG/Primary Examiner, Art Unit 2871
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