Prosecution Insights
Last updated: April 19, 2026
Application No. 18/284,125

DETECTION BASEBOARD AND CONTROL METHOD THEREOF, DETECTION DEVICE, AND PRINTING DEVICE

Non-Final OA §102§103
Filed
Sep 26, 2023
Examiner
AMEH, YAOVI M
Art Unit
2853
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
BOE TECHNOLOGY GROUP CO., LTD.
OA Round
1 (Non-Final)
91%
Grant Probability
Favorable
1-2
OA Rounds
1y 11m
To Grant
99%
With Interview

Examiner Intelligence

Grants 91% — above average
91%
Career Allow Rate
825 granted / 905 resolved
+23.2% vs TC avg
Moderate +8% lift
Without
With
+8.4%
Interview Lift
resolved cases with interview
Fast prosecutor
1y 11m
Avg Prosecution
28 currently pending
Career history
933
Total Applications
across all art units

Statute-Specific Performance

§101
1.1%
-38.9% vs TC avg
§103
58.7%
+18.7% vs TC avg
§102
28.7%
-11.3% vs TC avg
§112
5.0%
-35.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 905 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Claims 6, 7 and 13 are withdrawn from further consideration pursuant to 37 CFR 1.142(b), as being drawn to a nonelected species, there being no allowable generic or linking claim. Applicant timely traversed the restriction (election) requirement in the reply filed on 12/16/2025. Information Disclosure Statement 3. Acknowledgment is made of Applicant’s Information Disclosure Statement (IDS) form PTO-1449. These IDS have been considered. Drawings 4. The examiner contends that the drawings submitted on 09/26/2023 are acceptable for examination proceedings. Claim Rejections - 35 USC § 102 5. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 6. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. 7. Claims 1-3, 9 and 20-21 are rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Skorokhod et al. (US Pub. Nº 2010/0201777). 8. Regarding independent claim 1: Skorokhod et al. disclosed a detection baseboard, comprising: a substrate (Fig. 1, reference 12); a plurality of data lines extending in a first direction ([0032], line 4; also see Fig. 3, the data lines running from the data driver 54) and a plurality of gate lines extending in a second direction located on the substrate ([0032], line 5; also see Fig. 3, the gate lines running from the scan (gate) driver 56), wherein the first direction intersects with the second direction (see Fig. 3); a plurality of sub-pixels arranged in an array, wherein the sub-pixels are located at positions defined by the data lines and the gate lines (see Fig. 3 for each or the pixel positions 22 arranged in an array), and the sub-pixels are electrically connected to the data lines and the gate lines respectively ([0032], lines 3-6; also see Fig. 3); wherein each of the sub-pixels comprises a control unit ([0020], line 1; also see Fig. 1, reference 14) and a charge distribution unit ([0023], line 1; also see Fig. 1, each portion or the charge distribution layer 16, corresponding to respective pixel positions 22), the control unit is electrically connected to the data line and the gate line ([0032], lines 1-8), the charge distribution unit comprises a first electrode ([0025], line 1; also see Fig. 1, reference 22. Note that reference 22 is used to designate both the electrode of the pixel and the pixel position) and a charge transport layer (Fig. 1, each portion or the charge distribution layer 16, corresponding to respective pixel positions 22), the first electrode is electrically connected to the control unit ([0032], lines 1-8), and an orthographic projection of the charge transport layer on the substrate covers an orthographic projection of the first electrode on the substrate (Fig. 1, the orthographic projection of the portion of the charge distribution layer 16, corresponding to respective pixel positions 22 on substrate 12, covers the orthographic projection of the corresponding electrode, as evidenced by the position of the induced charged particles 18 covering the entire pixel position 22. Also see Fig. 3 for clarifications); the charge distribution unit is configured to discharge under control of the control unit ([0019], lines 4-5). 9. Regarding claim 2: Skorokhod et al. disclosed the detection baseboard according to claim 1, further comprising a first signal line electrically connected to the control unit, when the charge distribution unit is in a full charge state ([0018], lines 1-3), a voltage of a signal transmitted in the first signal line is less than a voltage of the first electrode ([0019], lines 7-8; the voltage of the first signal line (Vgs) is equal to zero and lower that Vbg (voltage of the first electrode) when the charge distribution unit is fully charged); wherein the first signal line is configured to transmit a signal with a constant voltage, and the charge distribution unit is configured to discharge to the first signal line along the control unit under the control of the control unit ([0019], lines 8-10). 10. Regarding claim 3: Skorokhod et al. disclosed the detection baseboard according to claim 2, wherein the first signal line comprises a ground line or a negative power supply signal line (see Fig. 1, Vgs = 0V). 11. Regarding claim 9: Skorokhod et al. disclosed the detection baseboard according to claim 1, wherein the charge transport layer comprises a hole transport layer, and each transistor in the control unit is a P-type transistor; or wherein the charge transport layer comprises an electron transport layer (Fig. 1, reference 18), and each transistor in the control unit is a N-type transistor ([0029], line 4). 12. Regarding claim 20: Skorokhod et al. disclosed a detection device ([0007], line 3), comprising the detection baseboard according to claim 1 (see the rejection of Claim 1). 13. Regarding claim 21: Skorokhod et al. disclosed a printing device ([0002], lines 1-3 and [0036], lines 1-2; printing device not shown), comprising the detection baseboard according to claim1 (see the rejection of Claim 1; also see Fig. 4, reference 40), wherein the printing device further comprises: a charging device configured to charge the charge distribution units of the detection baseboard ([0021], line 1; also see Fig. 1, reference 20); and a driving chip configured to transmit a control signal to the detection baseboard (Fig. 3, reference 54). 14. Claim 22 is rejected under 35 U.S.C. 102 (a) (1) as being anticipated by Skorokhod et al. (US Pub. Nº 2010/0201777). 15. Regarding claim 22: Skorokhod et al. disclosed a method for controlling a detection baseboard ([0002], lines 1-3), wherein the detection baseboard comprises: a substrate (Fig. 1, reference 12); a plurality of data lines extending in a first direction ([0032], line 4; also see Fig. 3, the data lines running from the data driver 54) and a plurality of gate lines extending in a second direction located on the substrate ([0032], line 5; also see Fig. 3, the gate lines running from the scan (gate) driver 56), wherein the first direction intersects with the second direction (see Fig. 3); a plurality of sub-pixels arranged in an array, wherein the sub-pixels are located at positions defined by the data lines and the gate lines (see Fig. 3 for each or the pixel positions 22 arranged in an array), and the sub-pixels are electrically connected to the data lines and the gate lines respectively ([0032], lines 3-6; also see Fig. 3); wherein each of the sub-pixels comprises a control unit ([0020], line 1; also see Fig. 1, reference 14) and a charge distribution unit ([0023], line 1; also see Fig. 1, each portion or the charge distribution layer 16, corresponding to respective pixel positions 22), the control unit is electrically connected to the data line and the gate line ([0032], lines 1-8), the charge distribution unit comprises a first electrode ([0025], line 1; also see Fig. 1, reference 22. Note that reference 22 is used to designate both the electrode of the pixel and the pixel position) and a charge transport layer (Fig. 1, each portion or the charge distribution layer 16, corresponding to respective pixel positions 22), the first electrode is electrically connected to the control unit ([0032], lines 1-8), and an orthographic projection of the charge transport layer on the substrate covers an orthographic projection of the first electrode on the substrate (Fig. 1, the orthographic projection of the portion of the charge distribution layer 16, corresponding to respective pixel positions 22 on substrate 12, covers the orthographic projection of the corresponding electrode, as evidenced by the position of the induced charged particles 18 covering the entire pixel position 22. Also see Fig. 3 for clarifications); the charge distribution unit is configured to discharge under control of the control unit ([0019], lines 4-5), wherein the method comprises: charging the detection baseboard so that the charge distribution units are in a full charge state ([0019], lines 5-6); inputting a first control signal to the control units of some of the sub-pixels, wherein the first control signal is configured to control the charge distribution unit of the sub-pixel to discharge so that a surface of the charge distribution unit is not carried with charges ([0019], lines 8-9); and inputting a second control signal to the control units of some of the sub-pixels, wherein the second control signal is configured to control the charge distribution unit of the sub-pixel to hold charges ([0019], lines 7-8); and obtaining the detection baseboard with a charge pattern ([0019], lines 1-2). Claim Rejections - 35 USC § 103 16. In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. 17. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 18. Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Skorokhod et al. (US Pub. Nº 2010/0201777). 19. Regarding claim 4: Skorokhod et al. disclosed the detection baseboard according to claim 2. In the embodiment of Fig. 1, Skorokhod et al. are silent about wherein the control unit comprises at least two transistors, one of the at least two transistors is electrically connected to the data line, and the other one of the at least two transistors is electrically connected to the first signal line. In the embodiment of paragraph [0033], Skorokhod et al. disclosed wherein the control unit comprises at least two transistors, wherein the first transistor controls the gate of the second transistor ([0033], lines 1-2; also see [0019], [0023], [0032]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the embodiment of Fig. 1 with that of paragraph [0033], by controlling the second transistor with the first transistor, in order to attenuate the applied voltage as disclosed by Skorokhod et al. in paragraph [0031]. 20. Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Skorokhod et al. (US Pub. Nº 2010/0201777), in view of Cheng et al. (CN 113410258). 21. Regarding claim 16: Skorokhod et al. disclosed the detection baseboard according to claim 1, wherein in a first state, the charge transport layers in each of the sub-pixels are located on a same plane ([0007], line 3. Case when the instant application is used in a charged-area detection equipment); in a second state, the charge transport layers in each of the sub-pixels are located on a same curved surface, and a solid figure of the detection baseboard in the second state comprises a cylinder ([0036], lines 1-2; also see Fig. 4, reference 70. Case when the baseboard is used on a cylindrical imaging member). Skorokhod et al. are silent about wherein the substrate is a flexible substrate. Cheng et al. disclosed a detection baseboard comprising a substrate (Fig. 3, reference 1), a plurality of data lines (Fig. 2, references 25), a plurality of gate lines (Fig. 2, reference 24), a plurality of sub-pixels disposed a positions defined by the data lines and the gate lines (Fig. 2, reference 100), wherein the sub-pixels are electrically connected to the data lines and the gate lines (See Fig. 2), wherein the substrate is a flexible substrate (Page 13, lines 8-9). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Cheng et al. with those of Skorokhod et al. by forming the pixel matrix on a flexible substrate in order to facilitate the usage of the detection baseboard in differently shaped imaging members as commonly known in the art. 22. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Skorokhod et al. (US Pub. Nº 2010/0201777), in view of Cheng et al. (CN 113410258) as applied to claim 16 above, and further in view of Meng et al. (CN 113721432). 23. Regarding claim 18: The combination of Skorokhod et al. and Cheng et al. disclosed the detection baseboard according to claim 16. The combination of Skorokhod et al. and Cheng et al. is silent about further comprising a first insulation layer, an organic layer and a second insulation layer that are stacked in sequence, the first insulation layer covers the control units, and the second insulation layer is located on a side of each of the first electrodes close to the substrate; the first insulation layer is provided with a plurality of grooves in a region between two adjacent control units, and the organic layer extends into the grooves. Meng et al. disclosed a substrate (Fig. 1, reference 10), supporting a pixel unit (Fig. 1, reference 130), comprising a control unit (Fig. 1, reference 110), an electrode (Fig. 1, reference 12), and a charge distribution unit (Fig. 1, reference 13), and further comprising a first insulation layer (Fig. 1, reference 14), an organic layer (Fig. 1, reference 15) and a second insulation layer that are stacked in sequence (Fig. 1, reference 16), the first insulation layer covers the control units (Fig. 1, layer 14 covers the control unit 110), and the second insulation layer is located on a side of each of the first electrodes close to the substrate (See Fig. 1); the first insulation layer is provided with a plurality of grooves in a region between two adjacent control units, and the organic layer extends into the grooves (Fig. 1, the recessed portion of the first insulation layer 14 on the side of the control unit 110). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to combine the teachings of Meng et al. with those of the combination of Skorokhod et al. and Cheng et al. by adopting the layering structure of the pixel unit of Cheng et al. in order to improve the reliability of the product as disclosed by Cheng et al. in the abstract. Allowable Subject Matter 24. Claims 5, 8, 11-12, 14-15 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion 25. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. 26. U.S. Patent application publication number 2012/0183307 to Law et al. disclosed a similar invention in Figs. 1, 3a and 3d. 27. Any inquiry concerning this communication or earlier communications from the examiner should be directed to YAOVI M. AMEH whose telephone number is (571)272-4578. The examiner can normally be reached M-F: 9:00 AM - 6:00 PM. 28. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. 29. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, RICARDO MAGALLANES can be reached at (571)272-5960. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. 30. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /YAOVI M AMEH/Primary Examiner, Art Unit 2853
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Prosecution Timeline

Sep 26, 2023
Application Filed
Feb 26, 2026
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
91%
Grant Probability
99%
With Interview (+8.4%)
1y 11m
Median Time to Grant
Low
PTA Risk
Based on 905 resolved cases by this examiner. Grant probability derived from career allow rate.

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