DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claims 1-15 are pending in this application.
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/20/2025 has been entered.
Response to Amendment
Claims 1, 4, 5, 9, and 13 are amended.
Response to Arguments
Applicant’s arguments with respect to claim(s) 1-15 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claim(s) 1-5 and 7-14 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vogel U.S. Patent Application 2011/0317321 (hereinafter “Vogel”) and further in view of Chinen U.S. Patent Application 2019/0393563 (hereinafter “Chinen”), and Skarby U.S. Patent Application 2013/0070492 (hereinafter “Skarby”).
Regarding claim 1, Vogel teaches a battery protection unit (BPU) (i.e. short-circuit protection device 1)(fig.4) connecting between a battery system (i.e. battery 4)(fig.4) and a line (refer to first terminal and second terminal in the figure below)(fig.4), the battery protection unit comprising: a solid-state circuit breaker (i.e. igbt module 48)(fig.4) disposed between the battery system and the line (implicit), the solid- state circuit breaker comprising a plurality of semiconductor switches (i.e. semiconductor switches 10 and 36)(fig.4) electrically connecting or insulating between the battery system and the line (implicit) according to a gate voltage applied to a gate terminal thereof (implicit); a cut-off switch (i.e. contactors in the figure below)(fig.4) physically connecting or separating between the solid-state circuit breaker and the line (implicit); and a rack battery management system (RBMS) (i.e. monitoring and control devices 11 and 37)(fig.3)(refer also to [0061]) that controls a gate driver applying the gate voltage according to a result of sensing a current flowing between the battery system and the line to insulate between the battery system and the line (refer to [0054] to [0056]), and controls the cut-off switch to physically separate the solid-state circuit breaker from the line when the battery system is connected to the line (refer to [0052]), wherein: the battery protection unit further comprises at least one fuse (i.e. emergency fuses 41)(fig.4), and at least one semiconductor switch of the plurality of semiconductor switches and the battery system are connected through the at least one fuse (implicit)(refer to fig.4) and the at least one of semiconductor switch is configured, when an overcurrent occurs, to protect the at least one fuse by cutting off the battery system before the at least one fuse blows out (refer to [0054] to [0057])(the semiconductor switches are configured to interrupt the current during normal overcurrent conditions; however in an emergency the fuse can act to interrupt the current, therefore, this requires that the semiconductor switches interrupt the current before the fuse blows, otherwise the circuit will not work correctly); however, Vogel does not teach the plurality of semiconductor switches having source terminals and drain terminals disposed in opposite directions to each other, are connected in series, the solid-state circuit breaker further includes an overvoltage suppressor including a Transient Voltage Suppressor (TVS) connected to both ends of the plurality of semiconductor switches connected in series to prevent overvoltage formed across both ends of the plurality of semiconductor switches when the line and the battery system are insulated by at least one of the plurality of semiconductor switches. However, Chinen teaches the plurality of semiconductor switches having source terminals and drain terminals disposed in opposite directions to each other (refer to charge FET Qc and discharge FET Qd)(fig.2), are connected in series (implicit). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor switches of Vogel to include the two series connected semiconductor switches of Chinen to provide the advantage of allowing for both charging and discharging of the battery system. However, Vogel and Chinen do not teach the solid-state circuit breaker further includes an overvoltage suppressor including a Transient Voltage Suppressor (TVS) connected to both ends of the plurality of semiconductor switches connected in series to prevent overvoltage formed across both ends of the plurality of semiconductor switches when the line and the battery system are insulated by at least one of the plurality of semiconductor switches. However, Skarby teaches the solid-state circuit breaker further includes an overvoltage suppressor (i.e. arrester 5)(fig.2C) including a Transient Voltage Suppressor (TVS) (i.e. arrester 5)(fig.2C) connected to both ends of the plurality of semiconductor switches connected in series (implicit) to prevent overvoltage formed across both ends of the plurality of semiconductor switches when the line and the battery system are insulated by at least one of the plurality of semiconductor switches (refer to [0044] and [0046]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the semiconductor switches of Vogel and Chinen to include the TVS of Skarby to provide the advantage of preventing damage to the semiconductor switches due to overvoltage.
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Regarding claim 2, Vogel, Chinen, and Skarby teach the battery protection unit of claim 1, wherein the solid-state circuit breaker comprises: a first semiconductor switch (i.e. Chinen discharge FET Qd)(fig.2) having a source terminal and a drain terminal disposed to form a current flow from the battery system to the line (implicit); a second semiconductor switch (i.e. Chinen charge FET Qc)(fig.2) connected in series to the first semiconductor switch (implicit), the second semiconductor switch having a source terminal and a drain terminal disposed to form a current flow from the line to the battery system (implicit); a first gate driver (i.e. Chinen D-FET DRV 116)(fig.1) that applies a gate voltage to a gate terminal of the first semiconductor switch (implicit), and a second gate driver (i.e. Chinen C-FET DRV 115)(fig.1) that applies a gate voltage to a gate terminal of the second semiconductor switch (implicit) under the control of the rack battery management system (refer to Chinen control IC 140)(fig.1), and wherein the rack battery management system controls at least one of the first and second gate drivers to apply a gate voltage having a preset voltage when the battery system is physically connected to the line through the solid-state circuit breaker so as to electrically connect between the battery system and the line (implicit).
Regarding claim 3, Vogel, Chinen, and Skarby teach the battery protection unit of claim 2, wherein the rack battery management system controls the battery system to operate in either one of a discharge mode in which a current flows out of the battery system (refer to Chinen [0003]) or a charge mode in which the battery system receives a current from the line (refer to Chinen [0003]), and controls either one of the first and second gate drivers to apply a gate voltage below the preset voltage according to a result of sensing the current (refer to Chinen [0039]), and wherein either one gate driver whose gate voltage is controlled according to the result of sensing the current is different from each other according to an operation mode of the battery system (refer to Chinen [0039]).
Regarding claim 4, Vogel, Chinen, and Skarby teach the battery protection unit of claim 3, however they do not teach wherein the rack battery management system controls the first gate driver to apply a gate voltage below the preset voltage when the battery system is in a charge mode, and controls the second gate driver to apply a gate voltage below the preset voltage when the battery system is in a discharge mode. However, it would have been an obvious matter of design choice to have wherein the rack battery management system controls the first gate driver to apply a gate voltage below the preset voltage when the battery system is in a charge mode, and controls the second gate driver to apply a gate voltage below the preset voltage when the battery system is in a discharge mode, since applicant has not disclosed that turning on only one of the switches solves any stated problem or is for any particular purpose and it appears that the invention would perform equally well with both switches on. It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the BPU of Vogel, Chinen, and Skarby to include wherein the rack battery management system controls the first gate driver to apply a gate voltage below the preset voltage when the battery system is in a charge mode, and controls the second gate driver to apply a gate voltage below the preset voltage when the battery system is in a discharge mode to provide the advantage of saving power.
Regarding claim 5, Vogel, Chinen, and Skarby teach the battery protection unit of claim 2, wherein the first and second semiconductor switches are configured with N-channel MOSFET devices (refer to Chinen C-FET and D-FET)(fig.2), and configured to include diodes (refer to Chinen diodes 110 and 111)(fig.1), respectively, disposed in reverse directions with respect to current flows of the N-channel MOSFET devices (implicit).
Regarding claim 7, Vogel, Chinen, and Skarby teach the battery protection unit of claim 1, wherein a plus terminal (+) and a minus terminal (-) of the battery system are connected to the semiconductor switch by way of fuses, respectively (implicit)(refer to Vogel emergency fuses 41)(fig.4).
Regarding claim 8, Vogel, Chinen, and Skarby teach the battery protection unit of claim 2, wherein the preset voltage is a threshold voltage for allowing an input terminal and an output terminal of the first semiconductor switch or the second semiconductor switch to be conducted to each other (implicit).
Regarding claim 9, Vogel teaches a method of controlling a battery protection unit (BPU) (refer to protection device 1)(fig.4)(refer also to [0054] to [0057]) comprising a solid-state circuit breaker (i.e. igbt module 48)(fig.4) connecting between a battery system (i.e. battery 4)(fig.4) and a line (refer to first terminal and second terminal in the figure above)(fig.4), the method comprising: controlling, by a rack battery management system (RBMS) of the battery protection unit (i.e. monitoring and control devices 11 and 37)(fig.3)(refer also to [0054] to [0056] and [0061]), a cut-off switch (i.e. contactors in the figure above)(fig.4) disposed between the solid-state circuit breaker and the line (implicit) to physically connect between the battery system and the line (implicit); controlling, by the rack battery management system, at least one semiconductor switch of a plurality of semiconductor switches to electrically connect between the battery system and the line (refer to [0054] to [0056]); detecting, by the rack battery management system, an overcurrent above a preset magnitude from a current flowing between the battery system and the line (refer to [0054] to [0057]); controlling, by the rack battery management system, at least one gate driver that applies a gate voltage to the at least one semiconductor switch in response to detecting the overcurrent to insulate between the battery system and the line (refer to [0054] to [0057]); and controlling, by the rack battery management system, the cut-off switch to physically separate the solid-state circuit breaker from the line (refer to [0054] to [0057]), wherein: the battery protection unit further comprises at least one fuse (i.e. emergency fuses 41)(fig.4), and at least one semiconductor switch of the plurality of semiconductor switches and the battery system are connected through one the at least one fuse (implicit)(refer to fig.4), and the at least one semiconductor switch is configured, when an overcurrent occurs, to protect the at least one fuse by cutting off the battery system before the at least one fuse blows out (refer to [0054] to [0057])(the semiconductor switches are configured to interrupt the current during normal overcurrent conditions; however in an emergency the fuse can act to interrupt the current, therefore, this requires that the semiconductor switches interrupt the current before the fuse blows, otherwise the circuit will not work correctly); however, Vogel does not teach the plurality of semiconductor switches provided in series with one another in the solid-state circuit breaker; the at least one gate driver is at least one gate driver of a plurality of gate drivers; wherein: the solid-state circuit breaker further includes an overvoltage suppressor including a Transient Voltage Suppressor (TVS), which is connected to both ends of the plurality of semiconductor switches having source terminals and drain terminals disposed in opposite directions to each other and connected in series, controlling the at least one of the plurality of gate drivers to insulate between the battery system and the line further comprises, when the line and the battery system are insulated, the overvoltage suppressor prevents an overvoltage formed across both ends of the plurality of semiconductor switches. However, Chinen teaches the plurality of semiconductor switches provided in series with one another in the solid-state circuit breaker (refer to C-FET and D-FET)(fig.1); the at least one gate driver is at least one gate driver of a plurality of gate drivers (refer to C-FET driver 115 and D-FET driver 116)(fig.1); the plurality of semiconductor switches having source terminals and drain terminals disposed in opposite directions to each other and connected in series (implicit). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Vogel to include the switches and drivers of Chinen to provide the advantage of allowing bidirectional flow of electricity through the switches as well as being able to stop the flow of electricity in both directions in order to better control charging/discharging of the battery and protect the battery during both modes. However, Vogel and Chinen do not teach wherein: the solid-state circuit breaker further includes an overvoltage suppressor including a Transient Voltage Suppressor (TVS), which is connected to both ends of the plurality of semiconductor switches, controlling the at least one of the plurality of gate drivers to insulate between the battery system and the line further comprises, when the line and the battery system are insulated, the overvoltage suppressor prevents an overvoltage formed across both ends of the plurality of semiconductor switches. However, Skarby teaches wherein: the solid-state circuit breaker further includes an overvoltage suppressor (i.e. arrester 5)(fig.2C) including a Transient Voltage Suppressor (TVS) (i.e. arrester 5)(fig.2C), which is connected to both ends of the plurality of semiconductor switches (implicit), controlling the at least one of the plurality of gate drivers to insulate between the battery system and the line further comprises, when the line and the battery system are insulated, the overvoltage suppressor prevents an overvoltage formed across both ends of the plurality of semiconductor switches (refer to [0044] and [0046]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Vogel and Chinen to include the TVS of Skarby to provide the advantage of preventing damage to the semiconductor switches due to overvoltage.
Regarding claim 10, Vogel, Chinen, and Skarby teach the method of claim 9, wherein the solid-state circuit breaker comprises: a first semiconductor switch (i.e. Chinen D-FET)(fig.1) having a source terminal and a drain terminal disposed to form a current flow from the battery system to the line (implicit)(refer to Chinen fig.2); a second semiconductor switch (i.e. Chinen C-FET)(fig.1) connected in series to the first semiconductor switch (implicit), the second semiconductor switch having a source terminal and a drain terminal disposed to form a current flow from the line to the battery system (implicit)(refer to Chinen fig.2); and a first gate driver (i.e. Chinen D-FET DRV 116)(fig.1) that applies a gate voltage to a gate terminal of the first semiconductor switch (implicit), and a second gate driver (i.e. Chinen C-FET DRV 115)(fig.1) that applies a gate voltage to a gate terminal of the second semiconductor switch (implicit) under control of the rack battery management system (refer to Chinen control IC 140)(fig.1).
Regarding claim 11, Vogel, Chinen, and Skarby teach the method of claim 10, wherein electrically connecting between the battery system and the line comprises: driving the battery system in either one of a discharge mode and a charge mode (refer to Chinen [0003] and [0039]); and controlling at least one of the first and second gate drivers to apply a gate voltage above a preset threshold voltage according to an operation mode of the battery system (refer to Chinen [0003] and [0039]).
Regarding claim 12, Vogel, Chinen, and Skarby teach the method of claim 11, wherein controlling of the gate driver to insulate between the battery system and the line is performed by controlling different gate drivers to apply a gate voltage below a preset threshold voltage according to an operation mode of the battery system (implicit).
Regarding claim 13, Vogel, Chinen, and Skarby teach the method of claim 12, wherein controlling of different gate drivers according to the operation mode of the battery system comprises: controlling the first gate driver to apply a gate voltage below the threshold voltage when the battery system is driven in a charge mode (implicit); and controlling the second gate driver to apply a gate voltage below the threshold voltage when the battery system is driven in a discharge mode (implicit).
Regarding claim 14, Vogel, Chinen, and Skarby teach the method of claim 10, wherein controlling of the gate driver to insulate between the battery system and the line is performed by controlling both the first gate driver and the second gate driver to apply a gate voltage below a preset threshold voltage (implicit).
Claim(s) 6 and 15 is/are rejected under 35 U.S.C. 103 as being unpatentable over Vogel, Chinen, and Skarby as applied to claims 1 and 9 above, and further in view of Sasaki Japanese Patent Document JP 2021-43144 A (hereinafter “Sasaki”).
Regarding claim 6, Vogel, Chinen, and Skarby teach the battery protection unit of claim 1, wherein the solid-state circuit breaker comprises a current sensor (i.e. Vogel current measuring element 12)(fig.3) that senses a current flowing between the battery system and the line (implicit); however, Vogel, Chinen, and Skarby do not teach wherein the current sensor is a giant magneto-resistance (GMR) sensor using a GMR device. However, Sasaki teaches wherein the current sensor is a giant magneto-resistance (GMR) sensor using a GMR device (refer to [0019]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the BPU of Vogel, Chinen, and Skarby to include the GMR sensor of Sasaki to provide the advantage of using a compact, accurate, and low-loss type of current sensor.
Regarding claim 15, Vogel, Chinen, and Skarby teach the method of claim 9, wherein the solid-state circuit breaker comprises a current sensor (i.e. Vogel current measuring element 12)(fig.3), and wherein detecting of the overcurrent is performed by detecting the overcurrent from a current flowing between the battery system and the line through the current sensor (implicit); however, they do not teach a giant magneto-resistance (GMR) sensor using a GMR device as the current sensor. However, Sasaki teaches a giant magneto-resistance (GMR) sensor using a GMR device as the current sensor (refer to [0019]). It would have been obvious to a person of ordinary skill in the art before the effective filing date of the claimed invention to modify the method of Vogel, Chinen, and Skarby to include the GMR sensor of Sasaki to provide the advantage of using a compact, accurate, and low-loss type of current sensor.
Conclusion
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/KEVIN J COMBER/Primary Examiner, Art Unit 2838