Prosecution Insights
Last updated: August 18, 2026
Application No. 18/285,983

CURRENT DAMPER FOR VOLTAGE TRANSFORMER

Non-Final OA §102§103
Filed
Oct 06, 2023
Priority
Apr 13, 2021 — EU 21168205.9 +1 more
Examiner
ALONZO MILLER, RHADAMES J
Art Unit
2847
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Hitachi Energy Ltd.
OA Round
3 (Non-Final)
67%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
71%
With Interview

Examiner Intelligence

Grants 67% — above average
67%
Career Allowance Rate
328 granted / 488 resolved
-0.8% vs TC avg
Minimal +4% lift
Without
With
+3.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
21 currently pending
Career history
517
Total Applications
across all art units

Statute-Specific Performance

§101
2.0%
-38.0% vs TC avg
§103
56.0%
+16.0% vs TC avg
§102
29.6%
-10.4% vs TC avg
§112
10.2%
-29.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 488 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 5/20/2026 has been entered. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claims 1, 3-5, 7, & 10 are rejected under 35 U.S.C. 102(a)(1) as anticipated by or, in the alternative, under 35 U.S.C. 103 as obvious over Zak et al. (WIPO Application Publication # WO2019/086058A1). Regarding Claim 1, Zak discloses a system for current damping comprising a plurality of current dampers (i.e. “n” pairs of diodes 14/15 connected in series) for a voltage transformer (i.e. transformers Tr_1 & Tr_2), wherein the plurality of current dampers is configured to be coupled in series between a neutral connection of the voltage transformer and a ground potential, at least two of the current dampers comprising: a first section (i.e. protective circuit 3) comprising at least one pair of diodes (i.e. diodes 14/15) arranged in an anti-parallel configuration; a second section (i.e. limiting impedance 5) arranged parallel to the first section, and comprising at least one capacitor (i.e. capacitor C); and the first section and the second section being configured to be coupled between a neutral connection (i.e. neutral point 1) of the voltage transformer and a ground potential (i.e. ground 2), a capacitance of the at least one capacitor being dimensioned such that a voltage drop (i.e. voltage loss Uz between neutral point 1 & ground 2) of an AC current (i.e. current I0AC) from the neutral connection at the at least one capacitor is lower than a forward threshold voltage (i.e. minimum voltage UD necessary for opening the diode in a forward direction) of the diodes of the at least one pair of diodes (Fig. 1, 7; Abstract; Page 2, line 23-Page 5, line 25; Page 8, line 21-28; Page 9, line 7-Page 10, line 11; Page 18, line 1-28). Zak states that, when designing the value of capacity of the capacitor C, it is necessary to consider the required value of a voltage loss in the capacitor C. Thus, the capacitance of capacitors C is selected or dimensioned according to the required voltage drop/loss between a neutral point 1 and a ground 2. As stated in Zak, for the function of this circuit, the value of the voltage UD, which is the catalogue value of the minimum voltage necessary for the opening of a specifically used diode 14 in forward direction, is of key importance. If the amplitude of the voltage Uz is lower than n.UD, the diodes 15 will be closed during regular operating condition and will conduct current. Upon increasing the instantaneous value of the voltage Uz above the value n.UD, the diodes 15 will automatically close in reverse direction. Only the UD voltage will be present on individual diodes 14 in reverse direction, i.e. the voltage of the 14 diode in forward direction. After the current passes through zero, the opened diodes 15 will automatically close due to a change in the current direction. If an increase in the instantaneous value of the voltage Uz above the value n.UD occurs within the next half-cycle, the diodes connected in antiparallel 15 that were in the previous half-cycle in reverse direction will open. Alternatively, it would have been obvious to one having ordinary skill in the art at the time the invention was made to have a plurality of current dampers for a voltage transformer, wherein the plurality of current dampers is configured to be coupled in series between a neutral connection of the voltage transformer and a ground potential, at least two of the current dampers, since it would add flexibility to the system while improving reliability by adding redundancies and it has been held that a mere duplication of the essential working parts of a device involves only routine skill in the art. St. Regis Paper Co. v. Bemis Co., 193 USPQ 8. Having Regarding Claim 3, Zak discloses that the transformer is a medium or high voltage transformer (i.e. transformers Tr_1 & Tr_2) (Page 1, line 15-20; Page 8, line 27-31; Page 20, line 10-11). The transformers are part of a high voltage network. Regarding Claim 4, Zak discloses that the first section comprises a plurality of pairs of diodes (i.e. at least one pair of diodes 14/15 connected in antiparallel) (Fig. 1, 7; Page 2, line 23-Page 5, line 25; Claim 8). Regarding Claim 5, Zak discloses that the diodes of each pair of diodes (i.e. at least one pair of diodes 14/15 connected in antiparallel) are arranged in an anti-parallel configuration (Fig. 1, 7; Page 2, line 23-Page 5, line 25; Claim 8). Regarding Claim 7, Zak discloses that the at least one pair of diodes has a forward threshold voltage (i.e. minimum voltage UD necessary for opening the diode in a forward direction) of 0.5-1.2 V (i.e. 0.6-0.7 V) (Page 18, line 4-28). Regarding Claim 10, Zak discloses a medium voltage or high voltage transformer (i.e. transformers Tr_1 & Tr_2) comprising a current damper according to claim 1 (Page 1, line 15-20; Page 8, line 27-31; Page 20, line 10-11). The transformers are part of a high voltage network. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 2, 8, 13, & 14 are rejected under 35 U.S.C. 103 as being unpatentable over Zak et al. (WIPO Application Publication # WO2019/086058A1). Regarding Claim 2, Zak does not explicitly disclose that the AC current from the neutral connection is below 100 A. However, Zak states that said AC current (i.e. current I0AC) from the neutral point/connection is limited by the invention by using a limiting impedance comprising a capacitor. It would have been obvious to one skilled in the art to select a limiting impedance to limit an AC current from the neutral connection below 100 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding Claim 8, Zak discloses that the second section comprises a plurality of capacitors (i.e. capacitors C) (Page 9, line 7-Page 10, line 11). Zak does not explicitly disclose that the plurality of capacitors is particularly arranged in parallel. However, Zak states that the capacitance of the capacitors C is particularly used in the limiting impedance and is selected or dimensioned according to the required voltage drop/loss between a neutral point 1 and a ground 2. It is also well known in the art to connect capacitors in parallel in order to increase the total capacitance since the capacitances of each capacitor are added together to obtain said total capacitance. Therefore, it would have been obvious to one skilled in the art to connect the capacitors C in parallel in order to effectively increase the capacitance according to the required voltage drop/loss between a neutral point 1 and a ground 2. Regarding Claim 13, Zak discloses that the AC current from the neutral connection is below 50 A. However, Zak states that said AC current (i.e. current I0AC) from the neutral point/connection is limited by the invention by using a limiting impedance comprising a capacitor. It would have been obvious to one skilled in the art to select a limiting impedance to limit an AC current from the neutral connection below 50 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Regarding Claim 14, Zak discloses that the AC current from the neutral connection is below 25 A. However, Zak states that said AC current (i.e. current I0AC) from the neutral point/connection is limited by the invention by using a limiting impedance comprising a capacitor. It would have been obvious to one skilled in the art to select a limiting impedance to limit an AC current from the neutral connection below 25 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claims 6, 11, 12, & 15-18 are rejected under 35 U.S.C. 103 as being unpatentable over Zak et al. (WIPO Application Publication # WO2019/086058A1) in view of Schmidt et al. (European Patent Application Publication # EP3739712A1). Regarding Claim 6, Zak discloses that the current damper is a DC current damper (Abstract; Page 8, line 21-Page 10, line 11; Claim 3). The limiting impedance is connected between the neutral point 1 of the network and ground 2 to limit the flow of the direct current (i.e. current IDC) through the neutral point 1 of the network. Zak does not explicitly disclose that the DC current damper is particularly configured to block DC current up to 2 A. Although Zak is silent on a specific DC current value which is blocked, it would have been obvious to one skilled in the art to select a limiting impedance and a pair of diodes to limit or block a DC current up to 2 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Alternatively, Schmidt teaches that the DC current damper is particularly configured to block DC current up to 2 A (Paragraph 0013, 0030, 0041). It would have been obvious to one skilled in the art to configure the DC current damper of Zak to block DC current up to 2 A, as taught by Schmidt, in order to prevent losses and noise. Regarding Claim 11, Zak does not explicitly disclose a medium voltage or high voltage switchgear comprising a current damper according to claim 1. Schmidt teaches a medium voltage or high voltage switchgear comprising a current damper according to claim 1 (Paragraph 0001, 0020, 0021, 0036). Schmidt teaches that it is well known in the art to use a current damper such as the one disclosed by Zak in a medium voltage or high voltage switchgear in order to mitigate the effects of small and medium DC currents. It would have been obvious to use the current damper of Zak in a medium voltage or high voltage switchgear, as taught by Schmidt, in order to mitigate the effects of small and medium DC currents. Regarding Claim 12, Zak does not explicitly disclose a medium voltage or high voltage switchgear comprising a medium voltage or high voltage transformer according to claim 10. Schmidt teaches a medium voltage or high voltage switchgear comprising a medium voltage or high voltage transformer according to claim 10 (Paragraph 0001, 0020, 0021, 0036). Schmidt teaches that it is well known in the art to use a transformer w/ a current damper such as the one disclosed by Zak in a medium voltage or high voltage switchgear in order to mitigate the effects of small and medium DC currents. It would have been obvious to use a transformer w/ a current damper such as the one disclosed by Zak in a medium voltage or high voltage switchgear, as taught by Schmidt, in order to mitigate the effects of small and medium DC currents. Regarding Claim 15, Zak discloses that the current damper is a DC current damper (Abstract; Page 8, line 21-Page 10, line 11; Claim 3). The limiting impedance is connected between the neutral point 1 of the network and ground 2 to limit the flow of the direct current (i.e. current IDC) through the neutral point 1 of the network. Zak does not explicitly disclose that the DC current damper is particularly configured to block DC current up to 5 A. Although Zak is silent on a specific DC current value which is blocked, it would have been obvious to one skilled in the art to select a limiting impedance and a pair of diodes to limit or block a DC current up to 5 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Alternatively, Schmidt teaches that the DC current damper is particularly configured to block DC current up to 5 A (Paragraph 0013, 0030, 0041). It would have been obvious to one skilled in the art to configure the DC current damper of Zak to block DC current up to 5 A, as taught by Schmidt, in order to prevent losses and noise. Regarding Claim 16, Zak discloses that the current damper is a DC current damper (Abstract; Page 8, line 21-Page 10, line 11; Claim 3). The limiting impedance is connected between the neutral point 1 of the network and ground 2 to limit the flow of the direct current (i.e. current IDC) through the neutral point 1 of the network. Zak does not explicitly disclose that the DC current damper is particularly configured to block DC current up to 10 A. Although Zak is silent on a specific DC current value which is blocked, it would have been obvious to one skilled in the art to select a limiting impedance and a pair of diodes to limit or block a DC current up to 10 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Alternatively, Schmidt teaches that the DC current damper is particularly configured to block DC current up to 10 A (Paragraph 0013, 0030, 0041). It would have been obvious to one skilled in the art to configure the DC current damper of Zak to block DC current up to 10 A, as taught by Schmidt, in order to prevent losses and noise. Regarding Claim 17, Zak discloses that the current damper is a DC current damper (Abstract; Page 8, line 21-Page 10, line 11; Claim 3). The limiting impedance is connected between the neutral point 1 of the network and ground 2 to limit the flow of the direct current (i.e. current IDC) through the neutral point 1 of the network. Zak does not explicitly disclose that the DC current damper is particularly configured to block DC current up to 20 A. Although Zak is silent on a specific DC current value which is blocked, it would have been obvious to one skilled in the art to select a limiting impedance and a pair of diodes to limit or block a DC current up to 20 A, since it has been held that discovering an optimum value of a result effective variable involves only routine skill in the art. In re Boesch, 617 F.2d 272, 205 USPQ 215 (CCPA 1980). It has also been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or working ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Alternatively, Schmidt teaches that the DC current damper is particularly configured to block DC current up to 20 A (Paragraph 0013, 0030, 0041). It would have been obvious to one skilled in the art to configure the DC current damper of Zak to block DC current up to 20 A, as taught by Schmidt, in order to prevent losses and noise. Regarding Claim 18, Zak does not explicitly disclose that the at least one pair of diodes has a forward threshold voltage of 0.8 V. Schmidt teaches that the at least one pair of diodes has a forward threshold voltage (i.e. threshold voltage Vto) of 0.8 V (Paragraphs 0018, 0035, 0046, 0050). Schmidt teaches that it is well known for power diodes to have a threshold voltage of 0.8 V. It would have been obvious to one skilled in the art to use diodes with a forward threshold voltage of 0.8 V in Zak, as taught by Zak, in order to increase the limit voltage at which the diodes will close and conduct current. Response to Arguments Applicant's arguments filed 4/12/2026 have been fully considered but they are not persuasive. The Applicant argues that the prior art does not teach or suggest “a system for current damping comprising a plurality of current dampers for a voltage transformer, wherein the plurality of current dampers is configured to be coupled in series between a neutral connection of the voltage transformer and a ground potential” as now required by amended claim 1. The Examiner disagrees and has addressed the new limitation in the rejection above. Furthermore, including a plurality of current dampers would add flexibility to the system while improving reliability by adding redundancies and a mere duplication of the essential working parts of a device involves only routine skill in the art. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to RHADAMES J ALONZO MILLER whose telephone number is (571)270-7829. The examiner can normally be reached Mon-Fri 10am-6pm PST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Timothy Thompson can be reached at (571) 272-2342. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /RJA/Examiner, Art Unit 2847 /TIMOTHY J THOMPSON/Supervisory Patent Examiner, Art Unit 2847
Read full office action

Prosecution Timeline

Oct 06, 2023
Application Filed
Jul 28, 2025
Non-Final Rejection mailed — §102, §103
Oct 23, 2025
Response Filed
Feb 24, 2026
Final Rejection mailed — §102, §103
Apr 12, 2026
Response after Non-Final Action
May 20, 2026
Request for Continued Examination
May 22, 2026
Response after Non-Final Action
Jun 16, 2026
Non-Final Rejection mailed — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
67%
Grant Probability
71%
With Interview (+3.5%)
2y 9m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 488 resolved cases by this examiner. Grant probability derived from career allowance rate.

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