DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to under 37 CFR 1.83(a). The drawings must show every feature of the invention specified in the claims. Therefore, the input signal is equal to or higher than a predetermined power level recited in claim 1, at a subharmonic component of the carrier frequency when the power level of the input signal is less than the predetermined power level recited in claim 1, Class D power amplifier recited in claim 1, current mode Class D power amplifier recited in claim 1, Class E power amplifier recited in claim 1, Class E/F power amplifier recited in claim 1, and reduce conduction loss and minimize output impedance variation recited in claim 2, toggling a plurality of power amplifier branches recited in claim 2, avoid voltage reverse biasing recited in claim 7, class E/F2/2/3/ PA recited in claim 9, reduce I/V overlap recited in claim 10, and reducing chip area compare to conventional shunt and series inductive peaking structure recited in claim 13 must be shown or the feature(s) canceled from the claim(s). No new matter should be entered.
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. The figure or figure number of an amended drawing should not be labeled as “amended.” If a drawing figure is to be canceled, the appropriate figure must be removed from the replacement sheet, and where necessary, the remaining figures must be renumbered and appropriate changes made to the brief description of the several views of the drawings for consistency. Additional replacement sheets may be necessary to show the renumbering of the remaining figures. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-3, 7-10, 16-18 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over [Kolanek (Fig. 1); 6,147,553] in view of [Cellier (Fig. 1); 8,937,507].
Regarding claim 1, Kolanek discloses an amplifier circuit comprising a power amplifier core (4s) that includes at least one power amplifier (7) that receives an input signal (Sin) and is operable in a power back off region (operating region of 7) and wherein the at least one power amplifier (7) is configured to be toggled at a carrier frequency (carrier frequency of 7) when a power level of the input signal (Sin) is equal to or higher than a predetermined power level and at a subharmonic component of the carrier frequency (carrier frequency of 7) when the power level of the input signal (Sin) is less than the predetermined power level (see paragraph 28). As described above, Kolanek discloses all the limitations in claim 1 except for that the power amplifier being a class D power amplifier. Cellier discloses an amplifier network comprising a class D power amplifier (104). It would have been obvious to substitute Cellier’s power amplifier (104 in Fig. 1 of Cellier) in place of Kolanek’s power amplifier (7 in Fig. 1 of Kolanek) since Kolanek discloses a generic power amplifier thereby suggesting that any equivalent power amplifier would have been usable in Kolanek’s reference.
Regarding claim 2, Kolanek further comprising the method step of reducing (26) conduction loss and minimize output impedance variation by toggling a plurality of power amplifier branches (the connections from the inputs of 5s to outputs of 7s).
Regarding claims 3, 18 and 20, Kolanek further comprising an on-chip concurrent harmonic and subharmonic tuning matching network (9, 10) that receives an output signal [d1(t)] from the power amplifier core (4).
Regarding claim 7, Kolanek further comprising the method step of avoiding (5) voltage reverse biasing of power amplifier (7) drivers for increased reliability.
Regarding claim 8, Kolanek further comprising the method step of providing an additional attenuation (1) of the subharmonic component caused by a mismatch of phase interleaving (6).
Regarding claims 9, 16 and 17, the limitations recited in the claims are intended use of the invention.
Regarding claim 10, Cellier further comprising the method step of utilizing both harmonic (harmonic of 104) and subharmonic (subharmonic of 104) tuning to reduce (the line between the left terminal of 106 and right terminal of 108) I/V overlap for both peak and PBO operation and allows switching PA cell (104) to toggle at a much lower frequency in PBO.
Claim(s) 11 is rejected under 35 U.S.C. 103 as being unpatentable over [Kolanek (Fig. 1); 6,147,553] in view of [Cellier (Fig. 1); 8,937,507] in further view of [Zhang et al (Fig. 4A); 10,348,290].
Kolanek in view of Cellier discloses all the limitations in claim 11 except for that the driver stage and pre-driver stage that amplifies the input signal prior to the input signal being received by the power amplifier core. Zhang et al discloses an amplifier circuit comprising a driver stage (10) and pre-driver stage (6) that amplifies the input signal (306) prior to the input signal being received by the power amplifier core (322). It would have been obvious to one of ordinary skill in the art at the time the invention was made would have found it obvious to have employed the driver stage and pre-driver stage at the input terminal of the power amplifier core of Kolanek (Fig. 1), such as taught by Zhang et al (Fig. 4A) in order to provide the advantageous benefit of improving the signal transmission of the amplifier circuit.
Allowable Subject Matter
Claims 4-6, 12-15 and 19 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Henry Choe whose telephone number is (571)272-1760. The examiner can normally be reached Mon-Fri 6:00 AM- 6:00 PM EST. Examiner interviews are available via telephone, in person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interview practice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea J Lindgren Baltzell can be reached on (571)272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
/HENRY CHOE/ Primary Examiner, Art Unit 2843
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