DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Information Disclosure Statement
The information disclosure statements (IDS) submitted on 31 Oct 2025 and 17 Dec 2025 are in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statements are being considered by the examiner.
Response to Arguments
Applicant’s arguments with respect to Claims 1 & 8 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 8, & 13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Itten (US 12451795 B2) as provided by applicant on 9 Jan 2025, although it’s equivalent U.S. Patent Publication, Itten (US 20230058430 A1), will be used for ease of citations.
Regarding Claim 1, Itten teaches ahalf-bridge power converter (39-40, 24-27, 71-74, 55-58, 51-54, Fig 12) comprising: direct current (DC) voltage terminals (5, 6, Fig 12) including a positive DC terminal (5, Fig 12) and a negative DC terminal (6, Fig 12), the DC voltage terminals located on a DC side of the power converter (5 & 6 are on the left side of 100, Fig 12); a DC link capacitor coupled across the positive DC terminal and the negative DC terminal (39/40, Fig 12); a power switching element pair (any one of 24-27, e.g. 24, Fig 7 & 12) including a high side power switching element coupled to the positive DC terminal (e.g. 8, Fig 7) and a low side power switching element coupled to the negative DC terminal (e.g. 12, Fig 7), wherein the high side power switching element and the low side power switching element are coupled together at a midpoint node (e.g. 28, Fig 7); interface terminals (1-4 & bottom of 58, Fig 12) including a positive interface terminal (e.g. 1, Fig 12) and a negative interface terminal (bottom of 58, Fig 12), the interface terminals located on a second interface side of the power converter (right side of power converter 100, Fig 12); wherein the negative interface terminal is coupled to the negative DC terminal (bottom of 58 connected to 6, Fig 12); an LC filter (e.g. 51, 74, & 58, Fig 12) including a first end of a switch-side inductor coupled to the midpoint node (e.g. left side of 51 coupled to 28, Fig 12) and to a second-end coupled to a filter node (e.g. right side of 51 coupled to the node between 74/58, Fig 12), wherein the positive interface terminal is coupled to the filter node (e.g. 1 is connected to the node between 74/58, Fig 12), a lower capacitor coupled between the filter node and the negative DC terminal (e.g. 58 coupled to the node between 74/58 and 6, Fig 12); and an upper capacitor coupled between the filter node and the positive DC terminal (e.g. 74 coupled to the node between 74/58 and 5, Fig 12), and providing a capacitive coupling between the DC voltage terminals and the interface terminals (e.g. 57, 74, & 58 provide a capacitive coupling between 5/6 and wire leaving node between 74/58 & bottom of 58, Fig 12).
Regarding Claim 8, Itten teaches a method of power conversion comprising: receiving an input DC voltage ("The power converter 100 has a first energy store connection 5 and a second energy store connection 6, to which an energy store 7, for example a battery, can be connected", [0042]) at direct current (DC) voltage terminals (5, 6, Fig 12), the DC voltage terminals including a positive DC terminal (5, Fig 12) and a negative DC terminal (6, Fig 12) located on a DC side of the power converter (5 & 6 are on the left side of 100, Fig 12); driving, by a controller (32, Fig 12), a power switching element pair (any one of 24-27, e.g. 24, Fig 7 & 12) to convert the input DC voltage to an intermediate output voltage at a midpoint node (the DC input voltage is converted to an intermediate DC voltage at 28, Fig 12), the power switching element pair including a high side power switching element coupled to the positive DC terminal (e.g. 8 is connected to 5, Fig 7) and a low side power switching element coupled to the negative DC terminal (e.g. 12 is connected to 5, Fig 7), wherein the high side power switching element and the low side power switching element are coupled together at the midpoint node (e.g. 28, Fig 7); filtering, by an LC filter (e.g. 51, 74, & 58, Fig 12), the intermediate output voltage to provide a filtered output voltage at interface terminals (LCL filter 37 includes inductors 51-54 and filter capacitors 55-58 & 71-74 that provide filtered output voltage to the output terminals 1-4, Fig 12), the filtered output voltage being either AC voltage or DC voltage ("The power converter is designed, in particular, to generate suitable DC and/or AC voltages for charging an electric vehicle at its first connection, its second connection, its third connection and/or its fourth connection.", [0023]), the interface terminals including a positive interface terminal (e.g. 1, Fig 12) and a negative interface terminal (bottom of 58, Fig 12) located on a second interface side of the power converter (right side of power converter 100, Fig 12, and the LC filter including: a first end of a switch-side inductor coupled to the midpoint node (e.g. left side of 51 coupled to 28, Fig 12) and a second end coupled to a filter node (e.g. right side of 51 coupled to the node between 74/58, Fig 12), wherein the positive interface is coupled to the filter nodes (e.g. 1 is coupled to the node between 74/58, Fig 12), a lower capacitor coupled between the filter node and the negative DC terminal (e.g. 58 coupled to the node between 74/58 and negative DC terminal 6, Fig 12), wherein the negative interface terminal is coupled to the negative DC terminal (e.g. bottom of 58 coupled to the node between 74/58 and negative DC terminal 6, Fig 12); and an upper capacitor coupled between the filter node and the positive DC terminal (e.g. 74 coupled to the node between 74/58 and 5, Fig 12), and providing a capacitive coupling between the DC voltage terminals and the interface terminals (e.g. 57, 74, & 58 provide a capacitive coupling between 5/6 and wire leaving node between 74/58 & bottom of 58, Fig 12).
Regarding Claim 13, Itten teaches a method of power conversion comprising: receiving an AC input voltage at interface terminals ("external DC or AC voltage loads or external DC or AC voltage sources can be connected", [0003]), the interface terminals (e.g. 1 and bottom of 58, Fig 12) including a positive interface terminal (e.g. 1, Fig 12) and a negative interface terminal ( bottom of 58, Fig 12) located on an interface side of a power converter (right side of power converter 100, Fig 12); filtering, by an LC filter (e.g. 51, 74, & 58, Fig 12), the AC input voltage to provide a filtered voltage at a midpoint node (LCL filter 37 includes inductors 51-54 and filter capacitors 55-58 & 71-74 that provide filtered AC input voltage to the midpoint node e.g. 28, Fig 12), and the LC filter including: a first end of a switch-side inductor coupled at the midpoint node (e.g. left side of 51 coupled to 28, Fig 12), a lower capacitor (e.g. 58, Fig 12) coupled between a second end of the of the switch-side inductor (e.g. 58 coupled to the 51, Fig 12) and a negative DC terminal of DC terminals (e.g. 58 coupled to the negative DC terminal 6, Fig 12), driving, by a controller (32, Fig 12), a power switching element (any one of 24-27, e.g. 24, Fig 7 & 12) to convert the filtered voltage to a DC output voltage at the DC terminals ("DC voltage is output", [0011]), the power switching element pair including a high side power switching element coupled to the positive DC terminal of the DC terminals (e.g. 8 is connected to 5, Fig 7) and a low side power switching element coupled to the negative DC terminal of the DC terminals (e.g. 12 is connected to 5, Fig 7), wherein the high side power switching element and the low side power switching element are coupled together at the midpoint node (e.g. 28, Fig 7).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 9 & 14 are rejected under 35 U.S.C. 103 as being unpatentable over Itten (US 20230058430 A1)/(US 12451795 B2) in view of Tang ("Decoupling of Fluctuating Power in Single-Phase Systems Through a Symmetrical Half-Bridge Circuit").
Regarding Claim 2, Itten teaches all of the limitations of Claim 1.
Itten does not teach wherein the upper capacitor reduces ripple current of the converter by providing a path for ripple currents to propagate between the DC terminals and the interface terminals and cancel at least a portion of differential mode current ripple between the DC terminals and the interface terminals.
Tang teaches a conventional symmetrical half-bridge circuit (Figure 2), comprising: wherein the upper capacitor (Figure 2 Capacitor C1) reduces ripple current of the converter (Figure 3 ic1) by providing a path for ripple currents to propagate between the DC terminals and the interface terminals (Pg 1856, Last Paragraph "the two dc-link capacitors can provide the fluctuating power that can be used to cancel those propagated from the ac grid side, and the voltage of the upper capacitor has π/4 phase shift with the grid voltage") and cancel at least a portion of differential mode current ripple between the DC terminals and the interface terminals (Pg 1856, Paragraph 3 "the dc-link capacitors may not only provide a high-voltage dc bus to support ac/dc or dc/ac conversion, but can also absorb the system ripple power.").It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate active power decoupling to cancel differential mode current ripple as taught by Tang. The advantage of this design is that “the ripple power can be diverted into other energy storage devices to gain an improved system performance” (Abstract of Tang).
Regarding Claim 9, it is rejected for the same reasons as stated above for claim 2.
Regarding Claim 14, it is rejected for the same reasons as stated above for claim 2.
Claims 3, 11 & 16 are rejected under 35 U.S.C. 103 as being unpatentable over Itten (US 20230058430 A1)/(US 12451795 B2) in view of Hideki (EP 2869446 A1) and Bucheru (EP 2798730 B1).
Regarding Claim 3, Itten teaches all of the limitations of Claim 1.
Itten does not teach the controller configured to: drive the power switching element pair with variable-frequency critical soft switching control signals.
Hideki teaches a teaches a controller (control unit 30, Fig 1) including a processor (control unit 30 contains a processor, [0048]).
Hideki does not teach the controller configured to: drive the power switching element pair with variable-frequency critical soft switching control signals.
Bucheru teaches a conventional resonant bi-directional DC-AC converter (Fig 3), comprising: the controller configured to: drive the power switching element pair with variable-frequency ("The DC-AC converter proposed herein works at variable frequency", [0064]) critical soft switching control signals ("For a normal AC-DC converter, the power transfer reaches zero when the AC line voltage is crossing zero voltage; in fact the switching operation of the converter can be suspended for a line voltage close to zero without any significant impact on the performance. The Resonant Bi-directional DC-AC circuitry presented herein takes advantage of this "near zero crossing" area of the AC line voltage", [0067])).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate a processor as taught by Hideki and a controller that drives the switches using variable-frequency critical soft switching as taught by Bucheru. The advantage of this design is that it “eliminates the unfolding bridge, maintains soft-switching of the active devices during operation, delivering the output power in a resonant way, reduces the common mode noise of the transformer, and increases the overall efficiency” ([0018] of Bucheru).
Regarding Claim 11, it is rejected for the same reasons as stated above for claim 3.
Regarding Claim 16, it is rejected for the same reasons as stated above for claim 3.
Claims 4-6, 10 & 15 are rejected under 35 U.S.C. 103 as being unpatentable over Itten (US 20230058430 A1)/(US 12451795 B2) in view of Hideki (EP 2869446 A1) and Agrawal ("Variable-Frequency Critical Soft-Switching of Wide-Bandgap Devices for Efficient High-Frequency Nonisolated DC-DC Converters).
Regarding Claim 4, Itten teaches the half-bridge power converter according to claim 1, and further teaches a controller (32, Fig 12), wherein the DC voltage terminals (5, 6, Fig 12) are configured to receive an input DC voltage ("The power converter 100 has a first energy store connection 5 and a second energy store connection 6, to which an energy store 7, for example a battery, can be connected", [0042]); wherein the controller is configured to drive the power switching element pair to convert the input DC voltage to an intermediate output voltage at the midpoint node (the DC input voltage is converted to an intermediate DC voltage at 28, Fig 12); wherein the LC filter is configured to filter the intermediate output voltage and provide a filtered output voltage at the interface terminals (LCL filter 37 includes inductors 51-54 and filter capacitors 55-58 & 71-74 that provide filtered output voltage to the output terminals 1-4, Fig 12), the filtered output voltage being either AC voltage or DC voltage ("The power converter is designed, in particular, to generate suitable DC and/or AC voltages for charging an electric vehicle at its first connection, its second connection, its third connection and/or its fourth connection.", [0023]).
Itten does not teach including a processor, wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor.
Hideki teaches a processor (control unit 30 contains a processor, [0048]); wherein the DC voltage terminals (top and bottom inputs of 1, Fig 1) are configured to receive an input DC voltage (DC voltage from power supply 2 is provided to the input of 1, [0043])); wherein the controller is configured to drive the power switching element pair to convert the input DC voltage to an intermediate output voltage at the midpoint node (transistors 11 & 12 convert DC input voltage to DC output voltage, Fig 1); wherein the LC filter is configured to filter the intermediate output voltage and provide a filtered output voltage at the interface terminals (inductor 16 and filter capacitor 19 provide filtered output voltage to the output terminals of 1, Fig 1), the filtered output voltage being either AC voltage or DC voltage (the output voltage is a DC voltage, [0024]);
Hideki teaches a processor (control unit 30 contains a processor, [0048]); wherein the DC voltage terminals (top and bottom inputs of 1, Fig 1) are configured to receive an input DC voltage (DC voltage from power supply 2 is provided to the input of 1, [0043])); wherein the controller is configured to drive the power switching element pair to convert the input DC voltage to an intermediate output voltage at the midpoint node (transistors 11 & 12 convert DC input voltage to DC output voltage, Fig 1); wherein the LC filter is configured to filter the intermediate output voltage and provide a filtered output voltage at the interface terminals (inductor 16 and filter capacitor 19 provide filtered output voltage to the output terminals of 1, Fig 1), the filtered output voltage being either AC voltage or DC voltage (the output voltage is a DC voltage, [0024]).
Hideki does not teach wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor.
Agrawal teaches a conventional nonisolated DC-DC converter (Fig 1), comprising: wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor (the ripple current is 220-300% of the average current through the inductor L in Fig 1, Pg 6090, Paragraph 5).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate the processor of Hideki, and the controller wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor as taught by Agrawal. The advantage of this design is that it reduces the value and size of the passive filter components (Abstract of Agrawal).
Regarding claim 5, the combination of Itten, Hideki, and Agrawal teaches all of the limitations of claim 4, and further teaches wherein, to drive the power switching element pair (M1 & M2, Fig 1 of Agrawal) to convert the input DC voltage (Vin, Fig 1 of Agrawal) to the intermediate output voltage (VDS,M2, Fig 1 of Agrawal), the controller is configured to drive the power switching element pair with variable-frequency critical soft switching control signals ("variable frequency critical soft switching control method", abstract of Agrawal)).
Regarding Claim 6, Itten teaches all of the limitations of claim 1, and further teaches a controller (32, Fig 12), wherein the interface terminals are configured to receive an AC input voltage ("external DC or AC voltage loads or external DC or AC voltage sources can be connected", [0003]); wherein the LC filter is configured to filter the AC input voltage and provide a filtered voltage at the midpoint node (LCL filter 37 includes inductors 51-54 and filter capacitors 55-58 & 71-74 that provide filtered AC input voltage to the midpoint node e.g. 28, Fig 12); wherein the controller is configured to drive the power switching element pair (controller 32 drives e.g. 8 & 12, Fig 7) to convert the filtered voltage to a DC output voltage ("DC voltage is output", [0011]); and wherein the DC voltage terminals are configured to output the DC output voltage (“The power converter is designed, in particular, to generate suitable DC and/or AC voltages for charging an electric vehicle at its first connection, its second connection, its third connection and/or its fourth connection.”, [0023])
Itten does not teach including a processor, wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor.
Hideki teaches a controller (control unit 30, Fig 1) including a processor (control unit 30 contains a processor, [0048]).
Hideki teaches a processor (control unit 30 contains a processor, [0048]); wherein the DC voltage terminals (top and bottom inputs of 1, Fig 1) are configured to receive an input DC voltage (DC voltage from power supply 2 is provided to the input of 1, [0043])); wherein the controller is configured to drive the power switching element pair to convert the input DC voltage to an intermediate output voltage at the midpoint node (transistors 11 & 12 convert DC input voltage to DC output voltage, Fig 1); wherein the LC filter is configured to filter the intermediate output voltage and provide a filtered output voltage at the interface terminals (inductor 16 and filter capacitor 19 provide filtered output voltage to the output terminals of 1, Fig 1), the filtered output voltage being either AC voltage or DC voltage (the output voltage is a DC voltage, [0024]).
Hideki does not teach wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor.
Agrawal teaches a conventional nonisolated DC-DC converter (Fig 1), comprising: wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor (the ripple current is 220-300% of the average current through the inductor L in Fig 1, Pg 6090, Paragraph 5).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate the processor of Hideki, and the controller wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor as taught by Agrawal. The advantage of this design is that it reduces the value and size of the passive filter components (Abstract of Agrawal).
Regarding claim 10, Itten teaches all of the limitations of claim 8.
Itten does not teach wherein current ripple at the switch-side inductor is at least 200% of average current through the switch-side inductor.
Agrawal teaches a conventional nonisolated DC-DC converter (Fig 1), comprising: wherein current ripple at the switch-side inductor is at least 200% of average current through the switch-side inductor (Pg 6090, Paragraph 5 the ripple current is 220-300% of the average current through the inductor L in Figure 1).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate a controller wherein current ripple at the switch-side inductor is at least 200% of average current through the inductor as taught by Agrawal. The advantage of this design is that it reduces the value and size of the passive filter components (Abstract of Agrawal).
Regarding Claim 15, it is rejected for the same reasons as stated above for claim 10.
Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Itten (US 20230058430 A1)/(US 12451795 B2) in view of Ye (US 20150180330 A1).
Regarding Claim 7, Itten teaches all of the limitations of Claim 1, and further teaches the high side power switching element (e.g. 8, Fig 7), and the low side power switching element (e.g. 12, Fig 7).
Itten teaches transistors, which usually include an intrinsic drain source capacitance, but does not specifically teach an upper drain-source capacitor or a lower drain-source capacitor.
Ye teaches a conventional power converter (Figure 1), comprising: an upper drain-source capacitor (Figure 1 Drain-source capacitor C1) coupled across a drain terminal and a source terminal of the high side power switching element (Figure 1 Transistor Q1), and a lower drain-source capacitor (Figure 1 Drain-source capacitor C2) coupled across a drain terminal and a source terminal of the low side power switching element (Figure 1 Transistor Q2).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate upper and lower drain source capacitors as taught by Ye. The advantage of this design is that it suppresses voltage spikes and smoothes the gate voltage to avoid false turn-ons.
Claims 12 & 17 are rejected under 35 U.S.C. 103 as being unpatentable over Itten (US 20230058430 A1)/(US 12451795 B2) in view of Zeng (TW 201526499 A).
Regarding Claim 12, Itten teaches all of the limitations of Claim 8, and further teaches the high side power switching element (e.g. 8, Fig 7), and the low side power switching element (e.g. 12, Fig 7).
Itten does not teach reducing, by an upper drain-source capacitor coupled across a drain terminal and a source terminal of the high side power switching element, a rate of drain-source voltage increase across the drain terminal and the source terminal of the high side power switching element; and reducing, by a lower drain-source capacitor coupled across a drain terminal and a source terminal of the low side power switching element, a rate of drain-source voltage increase across the drain terminal and the source terminal of the high side power switching element.
Zeng teaches a conventional method of power conversion (Fig 1), comprising: reducing, by an upper drain-source capacitor (drain-source capacitor C2, Fig 4G) coupled across a drain terminal and a source terminal of the high side power switching element capacitor (C2 is connected across the drain and source terminals of QL inside of 311b, Fig 4G), a rate of drain-source voltage increase across the drain terminal and the source terminal of the high side power switching element (the capacitors are for spike suppression, which is to reduce the rate at which the drain source voltage increases, [0356]); and reducing, by a lower drain-source capacitor (drain-source capacitor C1, Fig 4G) coupled across a drain terminal and a source terminal of the low side power switching element (C1 is connected across the drain and source terminals of QL inside of 311a, Fig 4G), a rate of drain-source voltage increase across the drain terminal and the source terminal of the high side power switching element (The capacitors are for spike suppression, which is to reduce the rate at which the drain source voltage increases, [0356]).
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Itten and incorporate external upper and lower drain source capacitors as taught by Zeng. The advantage of this design is that it suppresses voltage spikes and smoothes the gate voltage to avoid false turn-ons.
Regarding Claim 17, it is rejected for the same reasons as stated above for claim 12.
Conclusion
Applicant's submission of an information disclosure statement under 37 CFR 1.97(c) with the timing fee set forth in 37 CFR 1.17(p) on 17 Dec 2025 prompted the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 609.04(b). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JENNIFER C CAULK whose telephone number is (571)270-0623. The examiner can normally be reached M-F 8:30-5:30, every other Fri off.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Crystal Hammond can be reached at (571)270-1682. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.C.C./Examiner, Art Unit 2838
/CRYSTAL L HAMMOND/Supervisory Primary Examiner, Art Unit 2838