Prosecution Insights
Last updated: October 25, 2026
Application No. 18/292,968

COMPUTING DEVICE, NEURAL NETWORK SYSTEM, NEURON MODEL DEVICE, COMPUTING METHOD, AND PROGRAM

Final Rejection §103
Filed
Jan 29, 2024
Priority
Aug 06, 2021 — nonprovisional of PCTJP2021029277
Examiner
PHUNG, QUOC LY PHU
Art Unit
2143
Tech Center
2100 — Computer Architecture & Software
Assignee
NEC Corporation
OA Round
2 (Final)
50%
Grant Probability
Moderate
3-4
OA Rounds
1y 6m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 50% of resolved cases
50%
Career Allowance Rate
17 granted / 34 resolved
-5.0% vs TC avg
Strong +90% interview lift
Without
With
+89.5%
Interview Lift
resolved cases with interview
Typical timeline
4y 3m
Avg Prosecution
16 currently pending
Career history
57
Total Applications
across all art units

Statute-Specific Performance

§101
30.9%
-9.1% vs TC avg
§103
43.2%
+3.2% vs TC avg
§102
4.3%
-35.7% vs TC avg
§112
20.6%
-19.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 34 resolved cases

Office Action

§103
DETAILED ACTION Remarks Claims 1-6, 8, 9 and 11-14 have been examined and rejected. This Office Action is responsive to the amendment filed on 08/28/2026, which has been entered in the above identified application. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claims 1-6, 8, 9 and 11-14 are presented for examination. Response to Amendment Applicant’s amendment filed on 08/28/2026 has been entered. Claims 1, 8 and 9 are amended. Claims 7 and 10 were cancelled. Claims 11-14 are newly added. Claims 1-6, 8, 9 and 11-14 are pending in the application. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-6, 8, 9, 13 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Nishi et al (US 12657441 B2) hereafter Nishi, and further in view of Hunzinger et al (US 20130204819 A1) hereafter Hunzinger. With respect to claim 1, Nishi teaches a computing device comprising: a neuron model in which a data processing time is set (a time difference Δt between the time at which the neuron fires and the time at which the spike voltage is input via the synapse [col. 5, lines 15-30]), wherein the data processing time includes an input time interval for receiving a spike and an output time interval for firing and transmitting a spike, the output time interval is a time interval that is continuous with the input time interval and starts after the input time interval ends (a spiking neural network includes a synaptic element, wherein the synaptic element has a variable weight and outputs, in response to input of a first spike signal, a synaptic signal. During first phase (or cycle), spikes are received and accumulated only. The neuron circuit outputs a second spike signal where a predetermined firing condition is satisfied. During second phase (or cycle), neurons that satisfy a firing condition performs the firing process. The state of neuron is represented by membrane potential. Spike voltages are input to the neuron model, and when the membrane potential reaches a threshold, the neuron fires. A spike voltage is input to the neuron model via a synapse having a weight at time t_pre, and the neuron model fires at time t_post. In the input time, a spike voltage is input to the neuron model, and in the output time, the neuron only fires or transmit [col. 2, lines 40-60; col. 4, line 55 - col. 5, line 15]). However, Nishi does not particularly disclose the neuron model fires within the output time interval, with firing within the input time interval being restricted. In the same field of endeavor, Hunzinger teaches the neuron model fires within the output time interval, with firing within the input time interval being restricted (an exponentially growing membrane potential and firing of a neuron with respect to time are disclosed. When the membrane potential of the neuron is above zero by a certain amount, the potential grows exponentially. The neuron will typically fire unless there are inhibitory inputs sufficient to bring the potential back to zero or below. On the other hand, excitatory inputs will merely cause the neuron to fire sooner. During such a time, firing may not happen as the neuron may have the inhibitory inputs. Positive and negative input values 802 and positive and negative scaling values 804 may lead to excitatory (firing) and inhibitory (not firing) inputs 806 and 808 on a neuron 810 [par. 0115 and FIGS. 5 & 8]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have incorporated the concept of learning input delays to achieve a target output delay as suggested by Hunzinger into the concept of outputting a synaptic signal in response to a first spike signal and outputting a second spike signal in a case where the synaptic signal is inputted as suggested by Nishi because both of these systems addressing the process of applying membrane potential in neuron model of a spiking neural network to either perform the firing a spike or restrict the firing. Doing so would be desirable because the concept of Nishi would be more efficient by converting timing information (input time relative to input inference time) in a spiking neural network to input multiple neurons, wherein the timeframe is an excitatory (firing) and/or inhibitory (no firing) potential (Hunzinger, [par. 0023, 0024, 0115]). With respect to claim 2, the combination of Nishi and Hunzinger teaches wherein a firing time at which the neuron model fires within the output time interval is a function of membrane potential of the neuron model at a last time of the input time interval (Hunzinger, the method includes determining an input time spike time relative to an input reference time based on a logarithm of an input value. The logarithm has a base equal to an exponential value of the coefficient of change of the membrane potential as a function of the membrane potential. A neuron output to a post-synaptic neuron represents a negative value by the absolute value and inhibition for a positive coefficient and excitation for a negative coefficient [par. 0023, 0169-0171 and FIG. 10]). With respect to claim 3, the combination of Nishi and Hunzinger teaches wherein the neuron model restricts firing in a case where the membrane potential of the neuron model at the last time of the input time interval is outside a predetermined range (Hunzinger, when the membrane potential of the neuron is above zero by a certain amount, the potential grows exponentially. The neuron will typically fire unless there are inhibitory inputs sufficient to bring the potential back to zero or below. On the other hand, excitatory inputs will merely cause the neuron to fire sooner. During such a time, firing may not happen as the neuron may have the inhibitory inputs. Positive and negative input values 802 and positive and negative scaling values 804 may lead to excitatory (firing) and inhibitory (not firing) inputs 806 and 808 on a neuron 810 [par. 0115 and FIGS. 5 & 8]). With respect to claim 4, the combination of Nishi and Hunzinger teaches wherein the neuron model is formed such that membrane potential of the neuron model within the output time interval increases with a slope unique to each neuron model (Nishi, a slope increased indicates the rate of change of the membrane potential with respect to time. The integration circuit integrates the synaptic current to convert the same to a voltage called a membrane potential. The temporal change in the membrane potential is determined by a neuron model set in advance in the integration circuit. For example, a leaky integrate and fire (LIF) model may be used as the neuron model [col. 8, lines 50-60]). With respect to claim 5, the combination of Nishi and Hunzinger teaches wherein the neuron model is formed to forcibly fire in a case where the membrane potential of the neuron model satisfies a predetermined condition at a posterior edge of the output time interval, or not to fire in the same case (Nishi, when a predetermined firing condition is satisfied, the neuron circuit fires and outputs a spike signal. For example, the neuron circuit fires when the value exceeds a predetermined threshold and emits a spike signal toward a downstream neuron circuit. The threshold comparator circuit compares the membrane potential outputted from the integration circuit with the predetermined threshold. The spike generation circuit generates and outputs a spike voltage when the membrane potential exceeds the threshold [col. 7, lines 10-40; col. 8, line 60 – col. 9, line 30]). With respect to claim 6, the combination of Nishi and Hunzinger teaches wherein the neuron model starts transmitting the spike in a form of a rectangular waveform in a case where the membrane potential of the neuron model satisfies a predetermined condition within the output time interval, and stops transmitting the spike at a time when the output time interval ends (Nishi, the neuron circuit outputs a second spike signal (second phase/cycle) in a case where the synaptic signal is inputted and a predetermined firing condition for the synaptic signal is satisfied [col. 2, lines 40-55; col. 7, lines 10-40; col. 10, line 55 - col. 11, line 30]). With respect to claim 8, Nishi teaches a neuron model device, wherein a data processing time is set (a time difference Δt between the time at which the neuron fires and the time at which the spike voltage is input via the synapse [col. 5, lines 15-30]) in association with forcible firing, the data processing time includes an input time interval for receiving a spike and an output time interval for firing and transmitting a spike, the output time interval is a time interval that is continuous with the input time interval and starts after the input time interval ends (a spiking neural network includes a synaptic element, wherein the synaptic element has a variable weight and outputs, in response to input of a first spike signal, a synaptic signal. During first phase (or cycle), spikes are received and accumulated only. The neuron circuit outputs a second spike signal where a predetermined firing condition is satisfied. During second phase (or cycle), neurons that satisfy a firing condition performs the firing process. The state of neuron is represented by membrane potential. Spike voltages are input to the neuron model, and when the membrane potential reaches a threshold, the neuron fires. A spike voltage is input to the neuron model via a synapse having a weight at time t_pre, and the neuron model fires at time t_post. In the input time, a spike voltage is input to the neuron model, and in the output time, the neuron only fires or transmit [col. 2, lines 40-60; col. 4, line 55 - col. 5, line 15]). However, Nishi does not disclose the neuron model device comprising: a memory configured to store instructions; and a processor configured to execute the instructions to: change an index value of signal output based on an input status of a signal within the input time interval; and transmit a spike within the output time interval by firing based on the index value of the signal output, wherein firing within the input time interval is restricted. In the same field of endeavor, Hunzinger teaches the neuron model device comprising: a memory configured to store instructions; and a processor configured to execute the instructions (a computer product for learning using a spiking neural network that includes a computer-readable medium having instructions executable to provide at each of one or more learning neuron models a set of logical inputs [par. 0012, 0020]) to: change an index value of signal output based on an input status of a signal within the input time interval; and transmit a spike within the output time interval by firing based on the index value of the signal output, wherein firing within the input time interval is restricted (an exponentially growing membrane potential and firing of a neuron with respect to time are disclosed. When the membrane potential of the neuron is above zero by a certain amount, the potential grows exponentially. The neuron will typically fire unless there are inhibitory inputs sufficient to bring the potential back to zero or below. On the other hand, excitatory inputs will merely cause the neuron to fire sooner. During such a time, firing may not happen as the neuron may have the inhibitory inputs. Positive and negative input values 802 and positive and negative scaling values 804 may lead to excitatory (firing) and inhibitory (not firing) inputs 806 and 808 on a neuron 810. The difference between a self-referential relative time and a non- self-referential relative time may be considered by spike trains, wherein the spiking output of a neuron having an index of a spike and multiple spikes of a neuron [par. 0104, 0105, 0115 and FIGS. 5 & 8]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have incorporated the concept of learning input delays to achieve a target output delay as suggested by Hunzinger into the concept of outputting a synaptic signal in response to a first spike signal and outputting a second spike signal in a case where the synaptic signal is inputted as suggested by Nishi because both of these systems addressing the process of applying membrane potential in neuron model of a spiking neural network to either perform the firing a spike or restrict the firing. Doing so would be desirable because the concept of Nishi would be more efficient by converting timing information (input time relative to input inference time) in a spiking neural network to input multiple neurons, wherein the timeframe is an excitatory (firing) and/or inhibitory (no firing) potential (Hunzinger, [par. 0023, 0024, 0115]). With respect to claim 9, it is a computing method claim that is corresponding to the neuron model device of claim 8. Therefore, it is rejected for the same reason as claimed in claim 8 above. With respect to claim 13, the combination of Nishi and Hunzinger teaches wherein the firing within the input time interval is restricted by comparing a threshold value reaching time and a start time of the output time interval and setting a timing for firing and transmitting the spike to the start time of the output time interval if the threshold value reaching time is before the start time of the output time interval, the threshold value reaching time corresponding to the time at which membrane potential reaches a threshold value (Nishi, after spikes are input to the neuron j and the membrane potential reaches a threshold, the neuron j fires and releases a spike voltage to downstream neurons. After firing, the membrane potential of the neuron j is reset to a certain value. Δt is the difference between the time the spikes are input to the neuron and the time the neuron j fires. If Δt>0, if the neuron fires after receiving the spike voltage through the synapse, the input of the spike voltage and the firing of the neuron j have causal relation, and the weight of the synapse is increased. If Δt<0, if the neuron j fires before the spike voltage reaches the neuron j via the synapse, the input of the spike voltage and the firing of the neuron j have no casual relation [col. 4, line 55 – col. 5, line 30]). With respect to claim 14, the combination of Nishi and Hunzinger teaches wherein the firing within the input time interval is restricted by comparing the threshold value reaching time and an end time of the output time interval and setting the timing for firing and transmitting the spike to the end time of the output time interval if the threshold value reaching time is after the end time of the output time interval (Nishi, after spikes are input to the neuron j and the membrane potential reaches a threshold, the neuron j fires and releases a spike voltage to downstream neurons. After firing, the membrane potential of the neuron j is reset to a certain value. Δt is the difference between the time the spikes are input to the neuron and the time the neuron j fires. If Δt>0, if the neuron fires after receiving the spike voltage through the synapse, the input of the spike voltage and the firing of the neuron j have causal relation, and the weight of the synapse is increased. If Δt<0, if the neuron j fires before the spike voltage reaches the neuron j via the synapse, the input of the spike voltage and the firing of the neuron j have no casual relation [col. 4, line 55 – col. 5, line 30]). Claims 11 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Nishi et al (US 12657441 B2) hereafter Nishi, further in view of Hunzinger et al (US 20130204819 A1) hereafter Hunzinger, as claimed in claim 1 above, and further in view of Roy (US 20210103801 A1) hereafter Roy. With respect to claim 11, the combination of Nishi and Hunzinger teaches further comprising: a memory configured to store instructions; and a processor configured to execute the instructions (a computer product for learning using a spiking neural network that includes a computer-readable medium having instructions executable to provide at each of one or more learning neuron models a set of logical inputs [par. 0012, 0020]). However, the combination of Nishi and Hunzinger does not disclose acquire a clock signal; and set the data processing time based on the clock signal. In the same field of endeavor, Roy teaches acquire a clock signal; and set the data processing time based on the clock signal (a method for training neurons in a spiking neural network (SNN) that assigns a time division schema for input sources to the neurons and transmits the input to a neuron according to the gain to operate a circuit including neurons. A router is driven according to a clock signal to change how various input sources are linked to the neurons at various times. A clock signal controls time division multiplexing of the signal path between the router and the neurons [par. 0013, 0040-0047]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have incorporated the concept of connecting input sources by a router to each of the plurality of artificial neurons in conjunction with a gain configuration controller as suggested by Roy into the combination of Nishi and Hunzinger because all of these systems addressing the process of using spiking neural network to perform various tasks where neurons are interconnected and shared in the neural network. Doing so would be desirable because the combination of Nishi and Hunzinger would be more efficient by training neurons in a SNN and assigning a time division schema for input sources to the neurons based on the training with an operated circuit that includes neurons that use shared transmission pathways for input sources (Roy, [par. 0004-0013]). With respect to claim 12, the combination of Nishi and Hunzinger teaches all limitations as claimed in claim 1 above. However, the combination of Nishi and Hunzinger does not disclose further comprising: a clock circuit for providing a clock signal. In the same field of endeavor, Roy teaches further comprising: a clock circuit for providing a clock signal (a method for training neurons in a spiking neural network (SNN) that assigns a time division schema for input sources to the neurons and transmits the input to a neuron according to the gain to operate a circuit including neurons. Time division schema assigns actual times during which signals received from the input sources (register or router). The gain configuration controller and the router are controlled by a shared clock signal to determine when to transmit spikes from a given input source stored in the register [par. 0013, 0063, 0064]). It would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to have incorporated the concept of connecting input sources by a router to each of the plurality of artificial neurons in conjunction with a gain configuration controller as suggested by Roy into the combination of Nishi and Hunzinger because all of these systems addressing the process of using spiking neural network to perform various tasks where neurons are interconnected and shared in the neural network. Doing so would be desirable because the combination of Nishi and Hunzinger would be more efficient by training neurons in a SNN and assigning a time division schema for input sources to the neurons based on the training with an operated circuit that includes neurons that use shared transmission pathways for input sources (Roy, [par. 0004-0013]). Response to Arguments The examiner respectfully acknowledges the applicant’s amendments to claims 1-6, 8, 9 and 11-14. Applicant’s amendments filed on 08/28/2026 regarding the rejections to claims 1-6 and 8 under 35 USC 112(b) have been considered and are consequently withdrawn. Applicant’s arguments filed on 08/28/2026 regarding the rejections to claims 1-6, 8 and 9 under 35 USC 101 have been fully considered and are consequently withdrawn. Applicant’s arguments filed on 08/28/2026 regarding the rejections to claims 1-6, 8 and 9 under 35 USC 103 have been considered with a new set of claims 11-14 (see rejection above). Applicant argued that “claims have been amended to recite features that are not taught or suggested in the cited references.” Examiner respectfully disagrees. Nishi and Hunzinger, either alone or in combination, still rejects the amended limitation of independent claims 1, 8 and 9. Nishi teaches “the state of neuron is represented by membrane potential. Spike voltages are input to the neuron model, and when the membrane potential reaches a threshold, the neuron fires. A spike voltage is input to the neuron model via a synapse having a weight at time t_pre, and the neuron model fires at time t_post. In the input time, a spike voltage is input to the neuron model, and in the output time, the neuron only fires or transmit” [col. 2, lines 40-60; col. 4, line 55 - col. 5, line 15]. On the other hand, Hunzinger teaches “when the membrane potential of the neuron is above zero by a certain amount, the potential grows exponentially. The neuron will typically fire unless there are inhibitory inputs sufficient to bring the potential back to zero or below. Excitatory inputs will merely cause the neuron to fire sooner. During such a time, firing may not happen as the neuron may have the inhibitory inputs. Positive and negative input values 802 and positive and negative scaling values 804 may lead to excitatory (firing) and inhibitory (not firing) inputs 806 and 808 on a neuron 810” [par. 0115 and FIGS. 5 & 8]. Conclusion THIS ACTION IS MADE FINAL. See MPEP 706.07(a). Applicant is remined of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filled within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Quoc Phung whose telephone number is (703) 756 1330. The examiner can normally be reached on Monday through Friday from 9am to 5pm PT. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jennifer Welch can be reached on 571-272-7212. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Q.L.P./Examiner, Art Unit 2143 /JENNIFER N WELCH/Supervisory Patent Examiner, Art Unit 2143
Read full office action

Prosecution Timeline

Jan 29, 2024
Application Filed
Jun 29, 2026
Non-Final Rejection mailed — §103
Aug 11, 2026
Interview Requested
Aug 20, 2026
Examiner Interview Summary
Aug 20, 2026
Applicant Interview (Telephonic)
Aug 28, 2026
Response Filed
Oct 01, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
50%
Grant Probability
99%
With Interview (+89.5%)
4y 3m (~1y 6m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 34 resolved cases by this examiner. Grant probability derived from career allowance rate.

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