Prosecution Insights
Last updated: April 19, 2026
Application No. 18/293,042

IMAGING DEVICE

Non-Final OA §102§103
Filed
Jan 29, 2024
Examiner
MOREHEAD III, JOHN H
Art Unit
2639
Tech Center
2600 — Communications
Assignee
Sony Semiconductor Solutions Corporation
OA Round
1 (Non-Final)
86%
Grant Probability
Favorable
1-2
OA Rounds
2y 4m
To Grant
98%
With Interview

Examiner Intelligence

Grants 86% — above average
86%
Career Allow Rate
506 granted / 590 resolved
+23.8% vs TC avg
Moderate +13% lift
Without
With
+12.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 4m
Avg Prosecution
25 currently pending
Career history
615
Total Applications
across all art units

Statute-Specific Performance

§101
2.7%
-37.3% vs TC avg
§103
45.0%
+5.0% vs TC avg
§102
26.6%
-13.4% vs TC avg
§112
18.0%
-22.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 590 resolved cases

Office Action

§102 §103
DETAILED ACTION Claims 1-35 are pending in the application. Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1 and 9 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Tanaka et al (US 2019/0019835 A1). As per claim 1, Tanaka discloses an imaging device (fig. 1, solid-state imaging device 1) comprising: a plurality of pixel blocks each including a plurality of light-receiving pixels including color filters of same color, the plurality of light-receiving pixels being divided into a plurality of first pixel pairs each including two light-receiving pixels adjacent to each other in a first direction (figs. 3-7, pixel array unit 3, photodiodes 21, on-chip lens 31, color filter 32 having identical color, arranged in 2x2 format); a plurality of lenses provided at respective positions corresponding to the plurality of first pixel pairs (figs. 3-7, on-chip lens 31 are placed at respective positions corresponding to photodiodes 21); and a plurality of floating diffusion layers each disposed at a boundary between the two light-receiving pixels, of the plurality of first pixel pairs, adjacent to each other in the first direction, the plurality of floating diffusion layers each shared in the plurality of first pixel pairs (figs. 3-7, pixel array unit 3, floating diffusion (FD) 23 are placed at the edges (i.e. boundary) between photodiodes 21 of pixel array unit 3, FD 23 are also shared among the photodiodes 21, see para 0068-0078). As per claim 9, Tanaka further discloses the imaging device according to claim 1, wherein the plurality of light-receiving pixels is arranged cyclically in a second direction intersecting the first direction, with two light-receiving pixels adjacent to each other in the second direction being set as a second pixel pair (fig. 1 and 3-7, pixel array unit 3, photodiodes 21 are arranged sequentially (i.e. cyclically) in a first and second direction, thereby intersecting), and two of the second pixel pairs adjacent to each other in the first direction mutually have a mirror image structure (figs. 1 and 3-7, pixel array unit 3, photodiodes 21, have a mirror image structure to each other). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 14 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al (US 2019/0019835 A1) in view of Fettig et al (US 2016/0286108 A1). As per claim 14, the imaging device according to claim 1, wherein, in each of the plurality of pixel blocks, two of the first pixel pairs side by side in a second direction intersecting the first direction are arranged to be shifted in the first direction. Tanaka fails to teach the limitations as recited above in claim 14. However, Fettig discloses an image sensor comprised of microlens disposed of pixel pairs, wherein the pixel pairs may be shifted in any direction (Fettig, figs. 2A-2C, pixel pair 100, para 0034). Therefore, it would’ve been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the teachings of Tanaka in view of Fettig, as a whole, by incorporating the ability to shift pixels as taught by Fettig, into the image sensor as taught by Tanaka, because doing so would provide a more efficient way of controlling sensitivity of the image sensor. As per claim 15, the combined teachings of Tanaka in view of Fettig, as a whole, further discloses the imaging device according to claim 1, wherein the plurality of pixel blocks includes a first pixel block and a second pixel block (Tanaka, figs. 3-6, photodiodes 21 are arranged into multiple pixel units 3), the plurality of light-receiving pixels in the first pixel block is arranged in a first arrangement pattern (Tanaka, fig. 3-6, photodiodes 21 are arranged in a first arrangement pattern, i.e. green), and the plurality of light-receiving pixels in the second pixel block is arranged in a second arrangement pattern (Tanaka, fig. 3-6, photodiodes 21 are arranged in a second arrangement pattern, i.e. blue or red). Claims 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Tanaka et al (US 2019/0019835 A1) and Fettig et al (US 2016/0286108 A1), in further view of Kawai et al (US 2014/0307133 A1). As per claim 16, the imaging device according to claim 15, wherein the plurality of pixel blocks includes two of the first pixel blocks and two of the second pixel blocks arranged in two rows x two columns as a minimum repeating unit, and the two of the first pixel blocks and the two of the second pixel blocks are arranged on diagonal lines intersecting each other. The combined teachings of Tanaka in view of Fettig, as a whole, fail to disclose the limitation as recited above in claim 16. However, Kawai discloses a color imaging element 1 wherein the plurality of pixel blocks are arranged in two rows and two columns repeating, and diagonal lines that intersect each other (Kawai, fig. 1, color imaging element 1, para 0069 and 0080). Therefore, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to combine the teachings of Tanaka and Fettig, in further view of Kawai, as a whole, by incorporating the configuration of pixels of the imaging element as taught by Kawai, into the image sensor as taught by Tanaka and Fettig, because doing so would enhance the sensitivity of the image sensor. As per claim 17, the combined teachings of Tanaka and Fettig, in further view of Kawai, as a whole, further discloses the imaging device according to claim 16, wherein the number of the plurality of light-receiving pixels in the first pixel block is more than the number of the plurality of light-receiving pixels in the second pixel block (Kawai, fig. 1, color imaging element 1, the number of green pixels are more than the number of red pixels, para 0083), the plurality of light-receiving pixels included in the two of the first pixel blocks includes the color filters of green (Kawai, fig. 1, color imaging element 1, green pixels with green filters, para 0083), the plurality of light-receiving pixels included in one of the two of the second pixel blocks includes the color filters of red (Kawai, fig. 1, color imaging element 1, red pixels with red filters, para 0083), and the plurality of light-receiving pixels included in another of the two of the second pixel blocks includes the color filters of blue (Kawai, fig. 1, color imaging element 1, blue pixels with blue filters, para 0083). Allowable Subject Matter Claims 2-8, 10-13, and 18-35 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding claim 2, none of the prior art cited alone or in combination provides the motivation to teach the following claimed limitations, with emphasis that it is each claim, taken as a whole, including the interrelationships and interconnections between various claimed elements make them allowable over the prior art of record, the imaging device according to claim 1, further comprising: a plurality of light-receiving sections provided respectively in the plurality of light-receiving pixels and generating electric charge corresponding to a received light amount by photoelectric conversion; and a plurality of first transistors transferring the electric charge generated respectively in the plurality of light-receiving sections to the plurality of floating diffusion layers, wherein respective gates of the plurality of first transistors are arranged to be opposed to each other along the first direction with the plurality of respective floating diffusion layers 89interposed therebetween in the plurality of respective first pixel pairs, and each of the plurality of floating diffusion layers is disposed to be shifted in a normal direction with respect to a line segment passing through centers of the respective gates of the plurality of first transistors arranged to be opposed to each other along the first direction. Regarding claims 3-8, 10-13, and 22-26 depend from claim 2 and are allowable for the same reasons stated above. Regarding claim 18, none of the prior art cited alone or in combination provides the motivation to teach the following claimed limitations, with emphasis that it is each claim, taken as a whole, including the interrelationships and interconnections between various claimed elements make them allowable over the prior art of record, the imaging device according to claim 16, further comprising: a plurality of light-receiving sections provided respectively in the plurality of light-receiving pixels and generating electric charge corresponding to a received light amount by photoelectric conversion, a plurality of first transistors transferring the electric charge generated respectively in the plurality of light-receiving sections to the plurality of floating diffusion layers, and a plurality of second transistors provided, for each of the plurality of pixel blocks, along the first direction at positions different in a second direction from the plurality of first transistors, the second direction intersecting the first direction, wherein the plurality of floating diffusion layers, the plurality of first transistors, and the plurality of second transistors, in the minimum repeating unit, are arranged point-symmetrically with respect to a center of the minimum repeating unit in a plan view. Regarding claim 19, none of the prior art cited alone or in combination provides the motivation to teach the following claimed limitations, with emphasis that it is each claim, taken as a whole, including the interrelationships and interconnections between various claimed elements make them allowable over the prior art of record, the imaging device according to claim 16, wherein the plurality of floating diffusion layers, the plurality of first transistors, the plurality of second transistors, and a plurality of wiring lines coupled to a reference potential line that supplies a reference potential, which are provided in each of the two of the first pixel blocks and the two of the second pixel blocks, in the minimum repeating unit, are arranged point-symmetrically with respect to a center of the minimum repeating unit in a plan view. Regarding claims 20, 21, and 27-35 depend from claim 19 and are allowable for the same reasons stated above. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN H MOREHEAD III whose telephone number is (571)270-3845. The examiner can normally be reached M - F 0930-1800 EST. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Twyler Haskins can be reached at (571) 272-7406. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /JOHN H MOREHEAD III/Examiner, Art Unit 2639 /TWYLER L HASKINS/Supervisory Patent Examiner, Art Unit 2639
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Prosecution Timeline

Jan 29, 2024
Application Filed
Dec 27, 2025
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
86%
Grant Probability
98%
With Interview (+12.6%)
2y 4m
Median Time to Grant
Low
PTA Risk
Based on 590 resolved cases by this examiner. Grant probability derived from career allow rate.

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