DETAILED ACTION
Claims 1-20 are pending.
Notice of Pre-AIA or AIA Status
This Office Action is sent in response to Applicant’s Communication received on 1/26/2026 for application number 18/295,729.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4, 6-8, 12, 15, 17, 19, 20 are rejected under 35 U.S.C. 103 as being unpatentable over Fullerton et al. (US 2014/0359323 A1) in view of Culbert et al. (US 2015/0338892 A1).
Regarding claim 1, Fullerton teaches a method comprising:
determining, by a processor, a fan speed value based on aggregation of a first fan speed value and a second fan speed value (“A record 201 t sums up the total of the parameter records … [including] Fan and cooling related utilizations including, actual current usage,” par 0047 and “Fan usage, request, and utilization sums would be done in a tree fashion at each node of the tree illustrated in FIG. 1 c.” par 0049 and “cooling capacity can be turned changed (e.g., increase or slow fans).” Par 0021 and paragraph 50 and Figure 3) [the processor calculates the sum of fan utilizations (actual speed usage) across nodes], wherein the fan speed value is further based on at least one factor (“In step 305, the system obtains the desired resource (e.g. power, fans,) usage, based on computational requirements and priority between the requirements,” par 0050 and Figure 3);
transmitting the fan speed value instead of the first fan speed value and the second fan speed value to an operating system scheduler (“In step 306 the system calculates the resource allocation and returns it to the process. This resource allocation computation takes into account the resource hierarchies (e.g. the power and fan hierarchies) … [and] typically the scheduler needs to react” par 0050 -0055 and “A record 201 t sums up the total of the parameter records” par 0047 and “record 201 t summing usages and utilizations across processors into a single sum” par 0048 and par 0049) [the system records a single sum (aggregated fan speed value of the first and second fan speed values) and transmits this consolidated resource allocation (instead of the first fan speed and second fan speed value individually) to the process where the scheduler reacts to updated power limits];
determining a fan acoustic level based on the fan speed value (“A record 201 t sums up the total of the parameter records … [including] Acoustics and noise related utilizations including, actual current usage,” par 0047); and
However, Fullerton does not explicitly teach in response to receiving the fan speed value, adjusting, by the operating system scheduler, a power setting and a priority of a background process based on the fan acoustic level and a current priority of the background process.
In the analogous art, Culbert teaches in response to receiving the fan speed value, adjusting, by the operating system scheduler, a power setting and a priority of a background process based on the fan acoustic level and a current priority of the background process [the OS monitors the CPU load (“a software module (e.g., an operating system's kernel) determining a processor load of the .. system.” par 0012) then deciding its priority, relating to thread/background process priority (“If CPU load is low, decrease the CPU's priority” par 0135) and the acoustic level (“a CPU software driver manages CPU working states (e.g., speed, frequency, voltage) based on computation load, sensor measurements (e.g., CPU temperatures and CPU load levels), and various preferences and priorities (e.g., user preferences with respect to fan noise,” par 0042) to create a priority list of system controls ("The Priority Decider creates a sorted list of controls ranked in the order they should be changed” par 0114) which allows for throttling thread scheduling based on priority and adjusting CPU's working state to reduce power (“Controls are provided to... to put a CPU in a different working state, and to throttle thread scheduling.” par 0070); and paragraphs 53, 66-67, 132-147 and claim 48 and Figures 14-16].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Fullerton and Culbert before him before the effective filing date of the claimed invention, to have modified Fullerton to incorporate the teachings of Culbert to adjust performance levels of the threads and working states of the processors/devices to provide trade-off between performance and power usage while maintain thermal constraints to avoid damage or loss of data. (Culbert, paragraph 53)
Regarding claim 4, Fullerton and Culbert teach the method of claim 1. Culbert further teaches further comprising adjusting another power setting of a foreground process (“reduced heat generation (e.g., by adjusting the working states of the heat generating devices, such as CPU, GPU, hard drives, … and others) to provide the best performance for the current task.” Par 0011 and “a Graphics Processing Unit (GPU); the first working state includes a first swap interval; and, the second working state includes a second swap interval.” Par 0012) [the working states (power settings) are adjusted via swap intervals to optimize performance for current (foreground) task].
Regarding claim 6, Fullerton and Culbert teach the method of claim 1. Culbert further teaches wherein the at least one factor includes system state (“a first state of the data processing system is determined … and, the subset of control settings is determined from a decision to move the data processing system from the first state to a second state.” Par 0013 and “A thermal manager processes input data, including sensed information (e.g., temperature, CPU processing load, GPU processing load), detected conditions (e.g., battery charging, lid closed, sleep mode) and user preferences … to optimize and direct accordingly CPU and/or GPU processing levels, battery charging periods, fan speeds” par 0111).
Claim 17 corresponds to claim 6 and is rejected accordingly.
Regarding claim 7, Fullerton and Culbert teach the method of claim 1. Fullerton further teaches wherein the at least one factor includes thermal mode (“other processors in the rack can be commanded to generate less heat in order to control room temperature.” Par 0018 and “In step 503 the system assesses outside and inside temperatures of each PSU 102 a-n and the current heat loads, as well as available air conditioning or cooling performance.” Par 0053).
Claim 20 corresponds to claim 7 and is rejected accordingly.
Regarding claim 8, Fullerton and Culbert teach the method of claim 1. Culbert further teaches wherein the adjusting of the power setting is performed via an application programming interface (“software device drivers dynamically tweak power and performance. For example, a CPU software driver manages CPU working states (e.g., speed, frequency, voltage)” par 0042) [the software device drivers may correspond to an API].
Regarding claim 12, Fullerton teaches an information handling system (Figures 1 and 4), comprising: a processor (Figure 4, CPU 101a-p); and a memory storing code that when executed causes the processor to perform operations (“Each processor has its own complete computing system, with memory” par 0032).
The remainder of claim 12 corresponds to claim 1 and is rejected accordingly.
Regarding claim 15, Fullerton and Culbert teach the information handling system of claim 12. Fullerton further teaches wherein the at least one factor includes user context (“detection of departure of datacenter personnel (e.g. through badge readers) can cause the system to optimize the fans beyond the acoustic limit to some degree.” Par 0004) [the presence/lack of badge readers determine the user context factor for modulating fan/acoustic speeds and thresholds].
Claim 19 corresponds to claim 15 and is rejected accordingly.
Claims 2, 3, 5, 9-11, 13, 14, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Fullerton in view of Culbert and in further view of North et al. (US 11,199,886 B1).
Regarding claim 2, Fullerton and Culbert teach the method of claim 1. However, Fullerton and Culbert do not explicitly teach further comprising associating a weight to the at least one factor.
In the analogous art, North teaches further comprising associating a weight to the at least one factor (“Based on the value of user parameter 206, software system 202 can adjust EPP 204 and implement other power reduction schemes in different ways that are best suited for the current user's optimization configuration mode preference.” Col. 6, ll. 3-7 and “Depending on how the user has configured user optimization parameter 206, method 300 can take remedial action that is most appropriate to maintain the user's optimization preference.” Col. 6, ll. 50-54 and claim 1) [for determining remedial action, different preferences are given different importance/weights].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Fullerton, Culbert and North before him before the effective filing date of the claimed invention, to have modified Fullerton and Culbert to incorporate the teachings of North to associate weights with the factors to take appropriate action regarding the power reduction scheme to best maintain user’s preferences. (North, column 6)
Claim 13 corresponds to claim 2 and is rejected accordingly.
Regarding claim 3, Fullerton, Culbert and North teach the method of claim 2. North further teaches wherein the weight is based on a rank of the factor (“if the value of user optimization parameter 206 is set to one optimization mode, method 400 completes at block 405 where the first configuration parameter (EPP 204) can be adjusted to reduce power dissipation of the CPU by a first amount. If the value of user optimization parameter 206 is set to another optimization mode, method 400 completes at block 406 where the EPP 204 can be adjusted to reduce power dissipation of the CPU by a second amount.” Col. 7, ll. 33-41 and Figure 4) [user parameter 206 corresponds to the factor; the rank corresponds to its specific setting; the weight is determined by this rank as it dictates the specific amount of power dissipation].
Claim 14 corresponds to claim 3 and is rejected accordingly.
Regarding claim 5, Fullerton and Culbert teach the method of claim 1. However, Fullerton and Culbert do not explicitly teach wherein the at least one factor includes user intent.
In the analogous art, North teaches wherein the at least one factor includes user intent (“User optimization configuration parameter 206 provides a means for a user to specify their preferences regarding operation of system 100 that affect the user's experience.” Col. 4, ll. 52-54) [user optimization configuration parameter corresponds to user intent].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Fullerton, Culbert and North before him before the effective filing date of the claimed invention, to have modified Fullerton and Culbert to incorporate the teachings of North to consider user intent as a factor to take appropriate action regarding the power reduction scheme to best maintain user’s preferences. (North, column 6)
Claim 16 corresponds to claim 5 and is rejected accordingly.
Regarding claim 9, Fullerton and Culbert teach the method of claim 1. However, Fullerton and Culbert do not explicitly teach wherein the adjusting of the power setting includes adjusting a priority of a background task.
In the analogous art, North teaches wherein the adjusting of the power setting includes adjusting a priority of a background task (“EPP configuration parameter 204 can provide a means to regulate operation of CPU 102 by adjusting a base frequency of a primary clock signal at CPU 102, a boost (turbo) frequency of the primary clock signal, the rate at which the clock frequency is varied, a voltage level provided to CPU 102, and may include control of how many CPU cores are activated at a particular time. Accordingly, EPP parameter 204 can be used to configure the computational performance, and thus energy consumption, of system 100 over a range,” col. 4, ll. 30-39) [under BRI, these actions affect the computational performance available to all tasks, including background tasks, thereby adjusting their effective priority].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Fullerton, Culbert and North before him before the effective filing date of the claimed invention, to have modified Fullerton and Culbert to incorporate the teachings of North to adjust the priority of a background task to prevent unimportant tasks using the CPU, thus freeing up the CPU and improving system responsiveness.
Regarding claim 10, Fullerton, Culbert and North teach the method of claim 9. North further teaches wherein adjusting the priority of the background task includes lowering the priority of the background task (“a reduction of a value of EPP parameter 204 corresponds to a reduction in the computational performance and energy consumption of CPU 102.” Col. 4, ll. 49-51) [this shows lowering the effective priority of tasks competing for CPU resources].
Regarding claim 11, Fullerton, Culbert and North teach the method of claim 10. North further teaches further comprising subsequent to lowering the priority of the background task, restoring the priority of the background task in response to a change in the fan acoustic level (“Furthermore, method 300 can implement a means to increase power/performance of system 100 if the skin temperature or noise levels fall below a second predetermined level that is less than the maximum value utilized at decision block 302. For example, if the skin temperature or the acoustic level falls below the second predetermined value, the previous values of EPP parameter 204 can be incrementally restored and power reductions applied to subsystems 216 can be incrementally disabled, as shown at block 314.” Col. 6, ll. 59-67 and Figure 3) [the priority of tasks is restored after they were previously lowered].
Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Fullerton et al. (US20140359323A1) in view of Duenas (US 2023/0205301 A1).
Regarding claim 18, Fullerton teaches a non-transitory computer-readable medium (Figure 4) to store instructions that are executable to perform operations comprising:
determining a fan speed value based on a first fan speed value and a second fan speed value (“A record 201 t sums up the total of the parameter records … [including] Fan and cooling related utilizations including, actual current usage,” par 0047 and “Fan usage, request, and utilization sums would be done in a tree fashion at each node of the tree illustrated in FIG. 1 c.” par 0049 and “cooling capacity can be turned changed (e.g., increase or slow fans).” Par 0021 and paragraph 50 and Figure 3) [the processor calculates the sum of fan utilizations (actual speed usage) across nodes], wherein the fan speed value is further based on at least one factor (“In step 305, the system obtains the desired resource (e.g. power, fans,) usage, based on computational requirements and priority between the requirements,” par 0050 and Figure 3);
transmitting the fan speed value instead of the first fan speed value and the second fan speed value to an operating system scheduler (“In step 306 the system calculates the resource allocation and returns it to the process. This resource allocation computation takes into account the resource hierarchies (e.g. the power and fan hierarchies) … [and] typically the scheduler needs to react” par 0050 -0055 and “A record 201 t sums up the total of the parameter records” par 0047 and “record 201 t summing usages and utilizations across processors into a single sum” par 0048 and par 0049) [the system records a single sum (aggregated fan speed value of the first and second fan speed values) and transmits this consolidated resource allocation (instead of the first fan speed and second fan speed value individually) to the process where the scheduler reacts to updated power limits];
determining a fan acoustic level based on the fan speed value (“A record 201 t sums up the total of the parameter records … [including] Acoustics and noise related utilizations including, actual current usage, ” par 0047).
However, Fullerton does not explicitly teach in response to receiving the fan speed value, adjusting, by the operating system scheduler, allocation of computing resources to a workload based on the fan acoustic level and a priority of the background process.
In the analogous art, Duenas teaches in response to receiving the fan speed value, adjusting, by the operating system scheduler, allocation of computing resources to a workload based on the fan acoustic level and a priority of the background process (“the operating system adjusts a process scheduler to limit the amount of time the application runs… specified in the application power policy.” par 0057 and “In block 402 the PMF driver 400 receives … BIOS ACPI information 408 for dynamic power modes,” par 0052 and “the cooling policy specifies that that fan speed adjust to maintain a set temperature.” Par 0051 and “the PMF driver 400 proceeds to block 418 and dynamically adjusts the power mode” par 0053 and Figure 4) [the OS framework receives updated policy information containing fan speed information and thresholds (paragraph 31) which triggers the process scheduler to adjust the active time allocated to background processes].
It would have been obvious to a person having ordinary skill in the art, having the teachings of Fullerton and Duenas before him before the effective filing date of the claimed invention, to have modified Fullerton to incorporate the teachings of Duenas to adjust active time allotted to background processes to increase energy savings through smart adjustment of power modes. (Duenas, paragraph 66)
Response to Arguments
Applicant’s arguments, see pages 1-2, filed 1/26/2026, with respect to the rejection(s) of claim(s) 1, and 12 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Fullerton in view of Culbert under 35 U.S.C. 103 for claims 1 and 12. Fullerton teaches the aggregation fan speed values (utilization) and determining fan acoustic levels based on the fan speed values. Examiner respectfully points to the updated mapping of claims 1 and 12.
Applicant’s arguments with respect to claim(s) 18 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
No additional arguments were presented as to the remaining claims. As such, the rejection is maintained.
Conclusion
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/AYMAN FATIMA/Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176