DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 2, 6 and 16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Apel (Fig. 1); 7,148,748].
Regarding claim 1, Apel discloses an amplifier circuit comprising an envelope detector (26a, 26b, 3226a, 26b,) configured to detect an envelope for a first voltage (RF OUT) corresponding to an input RF signal (RF IN), a first transistor (34) configured to receive a value of the envelope through a control terminal (base terminal of the transistor 34) of the first transistor (34) and turn on based on the value of the envelope to sink a current from a first node (emitter terminal of the transistor 42) of the bias circuit (34, 40, 44, 46, 38, 52, 48, 42, 56), and a second transistor (42) connected between a power source (V+) and the first transistor (34) and including a control terminal (base terminal of the transistor 42) connected to the first node (emitter terminal of the transistor 42) of the bias circuit (34, 40, 44, 46, 38, 52, 48, 42, 56).
Regarding claim 2, wherein the bias circuit (34, 40, 44, 46, 38, 52, 48, 42, 56) comprises a third transistor (38) configured to supply a bias current (VREF1), and the first node (emitter terminal of the transistor 42) is connected to a control terminal (base terminal of the transistor 38) of the third transistor (38).
Regarding claim 6, wherein the power amplifier (Fig. 1) comprises a power transistor (16) configured to amplify and output the input RF signal (RFIN) and wherein the first voltage (RF OUT) corresponding to an input RF signal (RF IN) is a voltage of an RF signal (RFIN) amplified by the power transistor (16), and wherein the bias circuit (34, 40, 44, 46, 38, 52, 48, 42, 56) is configured to supply the bias current (VREF1) to the power transistor (16).
Regarding claim 16, Apel discloses an amplifier circuit comprising a first transistor (12) and a second transistor (16) configured to amplify an input RF signal (RFIN), one or more bias circuits (56, 52) configured to generate bias currents (VREF2, VREF1) and supply the generated bias currents (VREF2, VREF1) to the first transistor (12) and the second transistor (16), an envelope detector (26a, 26b, 32) configured to detect a voltage of an output RF signal (RF OUT) of the second transistor (16), and a protection circuit (36, 34, 40, 44, 46, 38, 48, 42) comprising a third transistor (42) and configured to sink a current from the one or more bias circuits (56, 52) when the detected voltage is greater than or equal to a predetermined value and wherein a control terminal of the third transistor (42) is connected to an output terminal (cathode terminal of the diode 32) of the envelope detector (26a, 26b, 32).
Allowable Subject Matter
Claims 3-5, 7-9, 17 and 18 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
Claims 10-15 are allowed.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Henry Choe whose telephone number is (703)774-4614. The examiner can normally be reached Mon-Fri 6:00 AM- 6:00 PM EST. Examiner interviews are available via telephone, in person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interview practice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea J Lindgren Baltzell can be reached on (571)272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
/HENRY CHOE/ Primary Examiner, Art Unit 2843
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