Prosecution Insights
Last updated: May 29, 2026
Application No. 18/303,476

CURRENT SENSOR WITH INPUT COMMON MODE VOLTAGE REDUCTION OR RE-REGISTRATION

Non-Final OA §103
Filed
Apr 19, 2023
Examiner
BARTOL, LANCE TORBJORN
Art Unit
2843
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Qualcomm Incorporated
OA Round
2 (Non-Final)
78%
Grant Probability
Favorable
2-3
OA Rounds
1m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 78% — above average
78%
Career Allowance Rate
36 granted / 46 resolved
+10.3% vs TC avg
Strong +29% interview lift
Without
With
+28.6%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
22 currently pending
Career history
79
Total Applications
across all art units

Statute-Specific Performance

§103
91.0%
+51.0% vs TC avg
§102
1.3%
-38.7% vs TC avg
§112
7.1%
-32.9% vs TC avg
Black line = Tech Center average estimate • Based on career data from 46 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Amendment The Amendment filed December 31, 2025 has been entered. Claims 1-30 remain pending in the application. Applicant’s amendments to the claims have overcome each and every 35 U.S.C. § 112 rejection previously presented in the Non-Final Office Action mailed October 2, 2025. Response to Arguments Applicant's arguments filed December 31, 2025 have been fully considered but they are not persuasive. Applicant argues, see pages 9-13, that previously presented prior art reference Chen et al. (Patent Publication Number CN 115,021,751 A), hereafter referred to as Chen, fails to disclose the claim limitation “wherein the first capacitor is coupled in parallel with the second capacitor.” Examiner respectfully disagrees. As disclosed in Fig. 1 of Chen, switching device 6 selectively couples the negative terminals of the first and second capacitors to Vcm, Vin, or Vip. When the first capacitor is selectively coupled to Vin and the second capacitor is selectively coupled to Vip, both the first and second capacitors will be coupled across Vin and Vip, and therefore being coupled in parallel. Therefore, applicant’s arguments are unconvincing and the rejections of claims 1-30 are maintained. Claim Interpretation The following is a quotation of 35 U.S.C. 112(f): (f) Element in Claim for a Combination. – An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The following is a quotation of pre-AIA 35 U.S.C. 112, sixth paragraph: An element in a claim for a combination may be expressed as a means or step for performing a specified function without the recital of structure, material, or acts in support thereof, and such claim shall be construed to cover the corresponding structure, material, or acts described in the specification and equivalents thereof. The claims in this application are given their broadest reasonable interpretation using the plain meaning of the claim language in light of the specification as it would be understood by one of ordinary skill in the art. The broadest reasonable interpretation of a claim element (also commonly referred to as a claim limitation) is limited by the description in the specification when 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is invoked. As explained in MPEP § 2181, subsection I, claim limitations that meet the following three-prong test will be interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph: (A) the claim limitation uses the term “means” or “step” or a term used as a substitute for “means” that is a generic placeholder (also called a nonce term or a non-structural term having no specific structural meaning) for performing the claimed function; (B) the term “means” or “step” or the generic placeholder is modified by functional language, typically, but not always linked by the transition word “for” (e.g., “means for”) or another linking word or phrase, such as “configured to” or “so that”; and (C) the term “means” or “step” or the generic placeholder is not modified by sufficient structure, material, or acts for performing the claimed function. Use of the word “means” (or “step”) in a claim with functional language creates a rebuttable presumption that the claim limitation is to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites sufficient structure, material, or acts to entirely perform the recited function. Absence of the word “means” (or “step”) in a claim creates a rebuttable presumption that the claim limitation is not to be treated in accordance with 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph. The presumption that the claim limitation is not interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, is rebutted when the claim limitation recites function without reciting sufficient structure, material or acts to entirely perform the recited function. Claim limitations in this application that use the word “means” (or “step”) are being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. Conversely, claim limitations in this application that do not use the word “means” (or “step”) are not being interpreted under 35 U.S.C. 112(f) or pre-AIA 35 U.S.C. 112, sixth paragraph, except as otherwise indicated in an Office action. The following claim limitations invoking 35 U.S.C. 112(f) are as follows: In claim 25, lines 1-2, consider the limitation “means for generating a first voltage including a first common mode voltage across a resistive device”. The corresponding structure described in the instant specification is the resistor RS (see Fig. 2A), implemented as a thin film resistor, a thick film resistor, a discrete resistor, or a FET resistor. In claim 25, lines 3-4, consider the limitation “means for transferring the first voltage including the first common mode voltage across first and second capacitors during a first phase of operation”. The corresponding structure described in the instant specification is the switching devices M1, M2, M3, and M6, and their corresponding control circuits (see Fig. 2A). In claim 25, lines 5-6, consider the limitation “means for re-referencing the first voltage across the first and second capacitors with a second common mode voltage during a second phase of operation”. The corresponding structure described in the instant specification is the switching devices M4 and M5, their corresponding control circuits, and the source of the target common mode voltage (see Fig. 2A). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-4, 6, 8, 10-11, 13-14, 17-18, and 20-28 are rejected under 35 U.S.C. 103 as being unpatentable over Spina (Patent Publication Number US 2022/0416740 A1), hereafter referred to as Spina, in view of Chen. Regarding claim 1, Spina discloses: An apparatus (Spina, Fig. 3), comprising: a resistive device (Fig. 3, 116); but fails to disclose a first capacitor selectively coupled in parallel with the resistive device; a second capacitor selectively coupled in parallel with the resistive device, wherein the first capacitor is coupled in parallel with the second capacitor; and a common mode voltage source selectively coupled to respective first terminals of the first and second capacitors. However, Chen teaches a first capacitor (Chen, Fig. 1, see “C1” in modified Fig. 1 below) selectively coupled in parallel with the resistive device (Fig. 1, see connection between C1 and Vip via switching devices 1 and 6); a second capacitor (Fig. 1, see “C2” in modified Fig. 1 below) selectively coupled in parallel with the resistive device (Fig. 1, see connection between C2 and Vin via switching devices 1 and 6), wherein the first capacitor is coupled in parallel with the second capacitor (Fig. 1, consider using switching device 6 to couple C1 to Vin and C2 to Vip, coupling C1 and C2 in parallel across Vin and Vip); and a common mode voltage source (Fig. 1, Vcm) selectively coupled to respective first terminals of the first and second capacitors (Fig. 1, see connection between Vcm and C1/C2 via switching device 6). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). PNG media_image1.png 259 519 media_image1.png Greyscale Regarding claim 2, Spina fails to disclose: further comprising a control circuit configured to: couple the resistive device in parallel with the first and second capacitors during a first phase of operation; decouple the resistive device from the first and second capacitors during a second phase of operation; and couple the common mode voltage source to the first terminals of the first and second capacitors during the second phase of operation. However, Chen further teaches further comprising a control circuit (Chen, Fig. 1, 6) configured to: couple the resistive device in parallel with the first and second capacitors during a first phase of operation (Fig. 1, consider switching device 1 closed and switching device 6 coupling C1 to Vin and C2 to Vip); decouple the resistive device from the first and second capacitors during a second phase of operation (Fig. 1, consider switching device 1 open and switching device 6 coupling C1 and C2 to Vcm); and couple the common mode voltage source to the first terminals of the first and second capacitors during the second phase of operation (Fig. 1, consider switching device 6 coupling C1 and C2 to Vcm). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 3, Spina fails to disclose: further comprising: a first switching device coupled between a first terminal of the resistive device and a second terminal of the first capacitor; a second switching device coupled between a second terminal of the resistive device and a second terminal of the second capacitor; a third switching device coupled between the first terminal of the first capacitor and the second terminal of the second capacitor; and a fourth switching device coupled between the first terminal of the second capacitor and the second terminal of the first capacitor; wherein the control circuit is configured to turn on the first, second, third, and fourth switching devices to couple the resistive device in parallel with the first and second capacitors during the first phase of operation. However, Chen teaches further comprising: a first switching device (Chen, Fig. 1, see instance of switching device 1 between Vip and C1) coupled between a first terminal of the resistive device and a second terminal of the first capacitor (Fig. 1, see connection between Vip and C1 via switching device 1); a second switching device (Fig. 1, see instant of switching device 1 between Vin and C2) coupled between a second terminal of the resistive device and a second terminal of the second capacitor (Fig. 1, see connection between Vin and C2 via switching device 1); a third switching device (Fig. 1, see path of switching device 6 between C1 and Vin) coupled between the first terminal of the first capacitor and the second terminal of the second capacitor (Fig. 1, see connection between C1 and C2 through switching device 6 and Vin); and a fourth switching device (Fig. 1, see path of switching device 6 and C2 and Vip) coupled between the first terminal of the second capacitor and the second terminal of the first capacitor (Fig. 1, see connection between C2 and C2 through switching device 6 and Vip); wherein the control circuit is configured to turn on the first, second, third, and fourth switching devices to couple the resistive device in parallel with the first and second capacitors during the first phase of operation (Fig. 1, consider switching device 1 closed and switching device 6 coupling C1 to Vin and C2 to Vip). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 4, Spina fails to disclose: wherein the first and second capacitors are polarized capacitors, wherein the first terminals of the first and second capacitors are negative terminals of the polarized capacitors, and wherein the second terminals of the first and second capacitors are positive terminals of the polarized capacitors. However, Chen further teaches wherein the first and second capacitors are polarized capacitors (Chen, Fig. 1, see that C1 and C2 are shown as polarized capacitors), wherein the first terminals of the first and second capacitors are negative terminals of the polarized capacitors (Fig. 1, see that terminals of C1/C2 coupled to switching device 6 are negative terminals), and wherein the second terminals of the first and second capacitors are positive terminals of the polarized capacitors (Fig. 1, see that terminals of C1/C2 coupled to switching device 1 are positive terminals). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 6, Spina fails to disclose: further comprising: a fifth switching device coupled between the first terminal of the first capacitor and the common mode voltage source; and a sixth switching device coupled between the first terminal of the second capacitor and the common mode voltage source; wherein the control circuit is configured to turn on the fifth and sixth switching devices to couple the common mode voltage source to the first terminals of the first and second capacitors during the second phase of operation. However, Chen further teaches further comprising: a fifth switching device (Chen, Fig. 1 see path of switching device 6 between C1 and Vcm) coupled between the first terminal of the first capacitor and the common mode voltage source (Fig. 1, see connection between C1 and Vcm via switching device 6); and a sixth switching device (Fig. 1, see path of switching device 6 between C2 and Vcm) coupled between the first terminal of the second capacitor and the common mode voltage source (Fig. 1, see connection between C2 and Vcm via switching device 6); wherein the control circuit is configured to turn on the fifth and sixth switching devices to couple the common mode voltage source to the first terminals of the first and second capacitors during the second phase of operation (Fig. 1, consider switching device 6 coupling C1 and C2 to Vcm). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 8, Spina further discloses: further comprising: a differential amplifier (Spina, Fig. 3, 120) including first (Fig. 3, see positive input of 120) and second differential inputs (Fig. 3, see negative input of 120); but fails to disclose: a seventh switching device coupled between the first switching device and the first differential input of the differential amplifier; and an eighth switching device coupled between the second switching device and the second differential input of the differential amplifier; wherein the control circuit is configured to turn on the seventh and eighth switching devices to couple the second terminals of the first and second capacitors to the first and second differential inputs during the second phase of operation, respectively. However, Chen further teaches a seventh switching device (Chen, Fig. 1, see instance of switching device 8 coupled to positive input of differential amplifier 4) coupled between the first switching device and the first differential input of the differential amplifier (Fig. 1, see connection between instance of switching device 1 coupled to Vip and positive input of differential amplifier 4 via switching device 8); and an eighth switching device (Fig. 1, see instance of switching device 8 coupled to negative input of differential amplifier 4) coupled between the second switching device and the second differential input of the differential amplifier (Fig. 1, see connection between instance of switching device 1 coupled to Vin and negative input of differential amplifier 4 via switching device 8); wherein the control circuit is configured to turn on the seventh and eighth switching devices to couple the second terminals of the first and second capacitors to the first and second differential inputs during the second phase of operation, respectively (Fig. 1, consider closing switching device 8 to couple C1 and C2 to differential amplifier 4). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 10, Spina further discloses: wherein the differential amplifier comprises an integrating differential amplifier (Spina, Fig. 3, see resistors 122, 124, 128, and 132 and capacitors 126 and 130 form an integrating structure for differential amplifier 120). Regarding claim 11, Spina further discloses: wherein the differential amplifier comprises: an operational amplifier (Spina, Fig. 3, 120) including the first and second differential inputs (Fig. 3, see positive and negative inputs of 120) and first and second differential outputs (Fig. 3, see negative and positive outputs of 120); a third capacitor (Fig. 3, 130) coupled between the first differential input and the first differential output (Fig. 3, see connection between positive input and negative output of 120 via capacitor 130); and a fourth capacitor (Fig. 3, 126) coupled between the second differential input and the second differential output (Fig. 3, see connection between negative input and positive output of 120 via capacitor 126). Regarding claim 13, Spina in view of Chen further discloses: wherein the third and fourth capacitors are in a connection relationship with the first and second capacitors such that an output voltage of the operational amplifier is related to a product of twice an input voltage of the operational amplifier and a ratio of a capacitance of the first or second capacitor to a capacitance of the third or fourth capacitor (consider inserting switched capacitor network of Chen between sensing resistor and differential amplifier inputs of Spina, and the resulting connection relationship between the capacitors C1 and C2 of Fig. 1 of Chen and the capacitors 126 and 130 of Spina, which results in an integrating differential amplifier with input and feedback capacitances). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 14, Spina further discloses: further comprising: a first voltage source (Spina, Fig. 3, 112) coupled to a first terminal of the resistive device (Fig. 3, see connection between voltage source 112 and resistor terminal 121); and a second voltage source (Fig. 3, 114) coupled to a second terminal of the resistive device (Fig. 3, see connection between voltage source 114 and resistor terminal 123). Regarding claim 17, Spina further discloses: further comprising: a voltage source (Spina, Fig. 3, 112) coupled to a first terminal of the resistive device (Fig. 3, see connection between 112 and resistor terminal 121); and a load (Fig. 3, 114) coupled to a second terminal of the resistive device (Fig. 3, see connection between 114 and resistor terminal 123). Regarding claim 18, Spina further discloses: wherein the resistive device comprises a resistor (Spina, Fig. 3, 116, see also Paragraph 22, lines 3-8). Regarding claim 20, Spina discloses: A method (Spina, Fig. 3), comprising: generating a first voltage including a first common mode voltage across a resistive device (Fig. 3, consider differential voltage generated by current across resistor 116); but fails to disclose transferring the first voltage including the first common mode voltage across first and second capacitors during a first phase of operation; and re-referencing the first voltage across the first and second capacitors with a second common mode voltage during a second phase of operation, wherein the first and second capacitors are coupled in parallel with each other. However, Chen teaches transferring the first voltage including the first common mode voltage across first and second capacitors during a first phase of operation (Chen, Fig. 1, consider closing switching device 1 to transfer input voltage across capacitors C1 and C2); and re-referencing the first voltage across the first and second capacitors with a second common mode voltage during a second phase of operation (Fig. 1, consider coupling switching device 6 to Vcm to capacitors C1 and C2), wherein the first and second capacitors are coupled in parallel with each other (Fig. 1, consider using switching device 6 to couple C1 to Vin and C2 to Vip, coupling C1 and C2 in parallel across Vin and Vip). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 21, Spina fails to disclose: wherein re-referencing the first voltage across the first and second capacitors with the second common mode voltage comprises applying the second common mode voltage to terminals of the first and second capacitors, respectively. However, Chen further teaches wherein re-referencing the first voltage across the first and second capacitors with the second common mode voltage comprises applying the second common mode voltage to terminals of the first and second capacitors, respectively (Chen, Fig. 1, consider coupling switching device 6 to Vcm to couple Vcm to capacitors C1 and C2). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 22, Spina fails to disclose: wherein the first and second capacitors are polarized capacitors, and the terminals of the first and second capacitors are negative terminals of the polarized capacitors. However, Chen further teaches wherein the first and second capacitors are polarized capacitors (Chen, Fig. 1, see that capacitors C1 and C2 are shown as polarized capacitors), and the terminals of the first and second capacitors are negative terminals of the polarized capacitors (Fig. 1, see that negative terminals of C1 and C2 are coupled to switching device 6). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 23, Spina fails to disclose: further comprising isolating the first and second capacitors from the resistive device during the second phase of operation. However, Chen teaches further comprising isolating the first and second capacitors from the resistive device during the second phase of operation (Chen, Fig. 1, consider opening switching device 1 to isolate capacitors C1 and C2 from the input voltage). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 24, Spina fails to disclose: further comprising generating a second voltage across differential inputs of a differential amplifier based on the first voltage including the second common mode voltage during the second mode of operation, wherein the second voltage is different than the first voltage. However, Chen further teaches further comprising generating a second voltage across differential inputs of a differential amplifier based on the first voltage including the second common mode voltage during the second mode of operation (Chen, Fig. 1, consider closing switching device 8 to couple capacitors C1 and C2 to inputs of differential amplifier 4), wherein the second voltage is different than the first voltage (Fig. 1, consider voltage flowing from Vcm through capacitors C1 and C2 to inputs of differential amplifier 4). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 25, Spina discloses: An apparatus (Spina, Fig. 3), comprising: means for generating a first voltage including a first common mode voltage across a resistive device (Fig. 3, consider differential voltage generated by current across resistor 116); but fails to disclose: means for transferring the first voltage including the first common mode voltage across first and second capacitors during a first phase of operation; and means for re-referencing the first voltage across the first and second capacitors with a second common mode voltage during a second phase of operation, wherein the first and second capacitors are coupled in parallel with each other. However, Chen teaches means for transferring the first voltage including the first common mode voltage across first and second capacitors during a first phase of operation (Chen, Fig. 1, consider closing switching device 1 to transfer input voltage across capacitors C1 and C2 and consider coupling capacitor C1 to Vin and C2 to Vip with switching device 6, consider that switch 1 and changeover switch 6 of Chen are equivalents to the switching devices of the instant application because they enable the same circuit connections [coupling C1/C2 between Vin/Vip and Vip/Vin], and would thus be interchangeable for the purposes of implementing a desired circuit configuration); and means for re-referencing the first voltage across the first and second capacitors with a second common mode voltage during a second phase of operation (Fig. 1, consider coupling switching device 6 to Vcm to capacitors C1 and C2, consider that changeover switch 6 of Chen is an equivalent to the switching devices of the instant application because they enable the same circuit connections [coupling C1/C2 to a reference Vcm], and would thus be interchangeable for the purposes of implementing a desired circuit configuration), wherein the first and second capacitors are coupled in parallel with each other (Fig. 1, consider using switching device 6 to couple C1 to Vin and C2 to Vip, coupling C1 and C2 in parallel across Vin and Vip). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). It also would have been obvious to one of ordinary skill in the art at the time of filing to have modified the changeover switches of Chen to be discrete switches, which would have the effect of enabling the use of simpler devices in the circuit of Spina. Regarding claim 26, Spina fails to disclose: wherein the means for re-referencing the first voltage across the first and second capacitors with the second common mode voltage is configured to apply the second common mode voltage to terminals of the first and second capacitors, respectively. However, Chen further teaches wherein the means for re-referencing the first voltage across the first and second capacitors with the second common mode voltage is configured to apply the second common mode voltage to terminals of the first and second capacitors, respectively (Chen, Fig. 1, consider coupling switching device 6 to Vcm to couple Vcm to capacitors C1 and C2). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). It also would have been obvious to one of ordinary skill in the art at the time of filing to have modified the changeover switches of Chen to be discrete switches, which would have the effect of enabling the use of simpler devices in the circuit of Spina. Regarding claim 27, Spina fails to disclose: wherein the first and second capacitors are polarized capacitors, and the terminals of the first and second capacitors are negative terminals of the polarized capacitors. However, Chen further teaches wherein the first and second capacitors are polarized capacitors (Chen, Fig. 1, see that capacitors C1 and C2 are shown as polarized capacitors), and the terminals of the first and second capacitors are negative terminals of the polarized capacitors (Fig. 1, see that negative terminals of C1 and C2 are coupled to switching device 6). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 28, Spina fails to disclose: wherein the means for transferring the first voltage including the first common mode voltage across the first and second capacitors is configured to isolate the first and second capacitors from the resistive device during the second phase of operation. However, Chen further teaches wherein the means for transferring the first voltage including the first common mode voltage across the first and second capacitors is configured to isolate the first and second capacitors from the resistive device during the second phase of operation (Chen, Fig. 1, consider opening switching device 1 to isolate capacitors C1 and C2 from the input voltage). Spina and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Chen to include the switched capacitor network of Chen between the sensing resistor and amplifier of Spina, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Claims 5, 7, and 9 are rejected under 35 U.S.C. 103 as being unpatentable over Spina in view of Chen as applied to claims 3, 6, and 8, respectively, above, and further in view of Trampitsch (Patent Publication Number US 2024/0120917 A1), hereafter referred to as Trampitsch. Regarding claim 5, Spina and Chen fail to disclose: wherein at least one of the first, second, third, and fourth switching devices comprises a field effect transistor (FET). However, Trampitsch teaches wherein at least one of the first, second, third, and fourth switching devices comprises a field effect transistor (FET) (Trampitsch, Fig. 3, see that switch T2 is implemented as a field effect transistor). Spina, Chen, and Trampitsch are all considered to be analogous to the claimed invention because they are in the same field of improving switched capacitor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina and Chen to incorporate the teachings of Trampitsch to implement the switches of Chen in the sensor of Spina as FET switches, which would have the effect of providing a well-known circuit implementation for the switches of Chen (Trampitsch, Paragraph 64). Regarding claim 7, Spina and Chen fail to disclose: wherein at least one of the fifth and sixth switching devices comprises a field effect transistor (FET). However, Trampitsch teaches wherein at least one of the fifth and sixth switching devices comprises a field effect transistor (FET) (Trampitsch, Fig. 3, see that switch T2 is implemented as a field effect transistor). Spina, Chen, and Trampitsch are all considered to be analogous to the claimed invention because they are in the same field of improving switched capacitor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina and Chen to incorporate the teachings of Trampitsch to implement the switches of Chen in the sensor of Spina as FET switches, which would have the effect of providing a well-known circuit implementation for the switches of Chen (Trampitsch, Paragraph 64). Regarding claim 9, Spina and Chen fail to disclose: wherein at least one of the seventh and eighth switching devices comprises a field effect transistor (FET). However, Trampitsch teaches wherein at least one of the seventh and eighth switching devices comprises a field effect transistor (FET) (Trampitsch, Fig. 3, see that switch T2 is implemented as a field effect transistor). Spina, Chen, and Trampitsch are all considered to be analogous to the claimed invention because they are in the same field of improving switched capacitor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina and Chen to incorporate the teachings of Trampitsch to implement the switches of Chen in the sensor of Spina as FET switches, which would have the effect of providing a well-known circuit implementation for the switches of Chen (Trampitsch, Paragraph 64). Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Spina in view of Chen as applied to claim 11 above, and further in view of Huynh (Patent Publication Number WO 2021/091947 A1), hereafter referred to as Huynh. Regarding claim 12, Spina and Chen fail to disclose: further comprising an analog-to-digital converter (ADC) coupled to the differential amplifier. However, Huynh teaches further comprising an analog-to-digital converter (ADC) (Huynh, Fig. 10, 910) coupled to the differential amplifier (Fig. 10, see connection between 910 and the differential amplifier). Spina, Chen, and Huynh are all considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Huynh to include an analog-to-digital converter at the output of the differential amplifier of Spina, which would have the effect of converting the output of the differential amplifier of Spina for use in a digital circuit (Huynh, Paragraph 10, lines 3-7). Claim 15 is rejected under 35 U.S.C. 103 as being unpatentable over Spina in view of Chen as applied to claim 14 above, and further in view of Jones et al. (Patent Publication Number US 2002/0180418 A1), hereafter referred to as Jones. Regarding claim 15, Spina and Chen fail to disclose: wherein the first voltage source comprises a battery charger, and the second voltage source comprises a battery. However, Jones teaches wherein the first voltage source comprises a battery charger (Jones, Fig. 1, 46), and the second voltage source comprises a battery (Fig. 1, 14). Spina, Chen, and Jones are all considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Jones to include the battery and battery charger of Jones as the voltage sources of Spina, which would have the effect of enabling using the circuit of Spina to charge a battery (Jones, Paragraph 17, lines 7-11). Claim 16 is rejected under 35 U.S.C. 103 as being unpatentable over Spina in view of Chen as applied to claim 14 above, and further in view of Cho et al. (Patent Publication Number US 2021/0067041 A1), hereafter referred to as Cho. Regarding claim 16, Spina and Chen fail to disclose: wherein the first voltage source comprises a power management integrated circuit (PMIC), and the second voltage source comprises a battery. However, Cho teaches wherein the first voltage source comprises a power management integrated circuit (PMIC) (Cho, Fig. 11, see connection between PMIC 1180 and current sensing device QBAT), and the second voltage source comprises a battery (Fig. 11, see connection between BAT and current sensing device QBAT). Spina, Chen, Cho are all considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Cho to include the PMIC and battery of Cho as the voltage sources of Spina, which would have the effect of enabling using the circuit of Spina to charge a battery (Cho, Paragraph 26, lines 9-19). Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Spina in view of Chen as applied to claim 1 above, and further in view of Lee et al. (Patent Publication Number US 2023/0417806 A1), hereafter referred to as Lee. Regarding claim 19, Spina in view of Chen fail to disclose: wherein the resistive device comprises a field effect transistor (FET). However, Lee teaches wherein the resistive device comprises a field effect transistor (FET) (Lee, Page 7, lines 10-11). Spina, Chen, and Lee are all considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Spina to incorporate the teachings of Lee to include a field effect transistor as the resistor sensor of Spina, which would have the effect of providing a well-known implementation for the current sense resistor of Spina. Claims 29-30 are rejected under 35 U.S.C. 103 as being unpatentable over Cho in view of Chen. Regarding claim 29, Cho discloses: A wireless communication device (Cho, Fig. 11), comprising: at least one antenna (Fig. 11, 1160); a transceiver (Fig. 11, Elements 1132, 1134, and 1150) coupled to the at least one antenna (Fig. 11, see connection between 1150 and 1160); an integrated circuit (IC) (Fig. 11, 1210) including one or more signal processing cores (Fig. 11, 1210) coupled to the transceiver (Fig. 11, see connection between 1210 and 1132); a battery (Fig. 11, BAT) coupled to the one or more signal processing cores (Paragraph 126, lines 15-19); and a current sensor (Fig. 11, QBAT) coupled to the battery (Fig. 11, see connection between QBAT and BAT), wherein the current sensor comprises: a resistive device (Fig. 11, consider resistance of transistor QBAT); but fails to disclose: a first capacitor selectively coupled in parallel with the resistive device; a second capacitor selectively coupled in parallel with the resistive device, wherein the first capacitor is coupled in parallel with the second capacitor; and a common mode voltage source selectively coupled to respective first terminals of the first and second capacitors. However, Chen teaches a first capacitor (Chen, Fig. 1, see “C1” in modified Fig. 1 above) selectively coupled in parallel with the resistive device (Fig. 1, see connection between C1 and Vip via switching devices 1 and 6); a second capacitor (Fig. 1, see “C2” in modified Fig. 1 above) selectively coupled in parallel with the resistive device (Fig. 1, see connection between C2 and Vin via switching devices 1 and 6), wherein the first capacitor is coupled in parallel with the second capacitor (Fig. 1, consider using switching device 6 to couple C1 to Vin and C2 to Vip, coupling C1 and C2 in parallel across Vin and Vip); and a common mode voltage source (Fig. 1, Vcm) selectively coupled to respective first terminals of the first and second capacitors (Fig. 1, see connection between Vcm and C1/C2 via switching device 6). Cho and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Cho to incorporate the teachings of Chen to include the switched capacitor network of Chen across the current sensor of Cho, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Regarding claim 30, Cho fails to disclose: wherein the current sensor further comprises a control circuit configured to: couple the resistive device in parallel with the first and second capacitors during a first phase of operation; decouple the resistive device from the first and second capacitors during a second phase of operation; and couple the common mode voltage source to the first terminals of the first and second capacitors during the second phase of operation. However, Chen further teaches wherein the current sensor further comprises a control circuit (Chen, Fig. 1, 6) configured to: couple the resistive device in parallel with the first and second capacitors during a first phase of operation (Fig. 1, consider switching device 1 closed and switching device 6 coupling C1 to Vin and C2 to Vip); decouple the resistive device from the first and second capacitors during a second phase of operation (Fig. 1, consider switching device 1 open and switching device 6 coupling C1 and C2 to Vcm); and couple the common mode voltage source to the first terminals of the first and second capacitors during the second phase of operation (Fig. 1, consider switching device 6 coupling C1 and C2 to Vcm). Cho and Chen are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier based sensor circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Cho to incorporate the teachings of Chen to include the switched capacitor network of Chen across the current sensor of Cho, which would have the effect of reducing power consumption (Chen, Page 4, Paragraph 2, lines 1-10). Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Shao et al. (Patent Publication Number US 2013/0076252 A1) discloses (Figs. 6A-B) a current sensing system comprising switched capacitors. THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lance T Bartol whose telephone number is (703)756-1267. The examiner can normally be reached Monday - Thursday 6:30 a.m. - 4:00 p.m. CT, Alternating Fridays 6:30 - 3:00. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Andrea Lindgren Baltzell can be reached at 571-272-5918. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /LANCE TORBJORN BARTOL/Examiner, Art Unit 2843 /ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
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Prosecution Timeline

Apr 19, 2023
Application Filed
Oct 02, 2025
Non-Final Rejection mailed — §103
Jan 01, 2026
Response Filed
Jan 27, 2026
Final Rejection mailed — §103
Mar 25, 2026
Response after Non-Final Action
May 11, 2026
Request for Continued Examination
May 13, 2026
Response after Non-Final Action

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Prosecution Projections

2-3
Expected OA Rounds
78%
Grant Probability
99%
With Interview (+28.6%)
3y 2m (~1m remaining)
Median Time to Grant
Moderate
PTA Risk
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