DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The amendment filed June 25, 2026 has been entered. Claims 1-28 remain pending in the application. Claims 11-25 are withdrawn from consideration. Applicant’s amendments to the claims and specification have overcome each and every objection and 35 U.S.C. § 112 rejection previously presented in the Non-Final Office Action mailed March 25, 2026.
Response to Arguments
Applicant’s arguments with respect to claims 1-3, 5-6, and 26 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Furthermore, applicant’s arguments with respect to the reason to combine references for claims 7-10 and 27-28 are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
Applicant's arguments filed June 25, 2026 have been fully considered but they are not persuasive.
Regarding applicant’s arguments with respect to claim 4, examiner notes that newly presented prior art reference Mao (Patent Number TW M541154 U), hereafter referred to as Mao, fully discloses the feature of an operational transconductance amplifier. Therefore, in response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). In this case, because Mao fully discloses the feature of an operational transconductance amplifier, previously presented prior art reference Kashmiri (Patent Publication Number US 2021/0156974 A1), as cited by applicant, hereafter referred to as Kashmiri, is not required to disclose this feature to make the combination work. Therefore, applicant’s arguments are unpersuasive and the rejection of claim 4 is maintained.
Regarding applicant’s arguments with respect to claims 7-10, applicant argues that previously presented prior art reference Nagata (Patent Publication Number JP 2012/221169 A), hereafter referred to as Nagata, fails to disclose a translinear loop that provides a DC bias current to a current mirror. Examiner respectfully disagrees.
Nagata does disclose this feature, as the translinear loop of Fig. 5 of Nagata provides gate potential control via an operational amplifier receiving the output of the translinear loop to the NMOS current mirror transistors M1 and M2 (in other words, DC bias control), based on setting the emitter potentials of the output transistors of the translinear loop to be equivalent. Therefore, applicant’s arguments are unpersuasive and the rejection of claims 7-10 is maintained.
Regarding applicant’s arguments with respect to claims 27-28, applicant argues that previously presented prior art reference Cui et al. (Patent Publication Number WO 2019/213973 A1), hereafter referred to as Cui, fails to disclose the features of observing a bandwidth or a transconductance of an operational transconductance amplifier while sweeping a current, setting a current source to a current corresponding to an observed predetermined bandwidth or transconductance, observing an output signal or setting a current source to a current corresponding to a smallest observed output signal. Examiner respectfully disagrees.
In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). In this case, Mao discloses the feature of an operational transconductance amplifier, while Cui teaches observing parameters of an amplifier while sweeping a current from a current source. Therefore, Cui is not required to disclose an operational transconductance amplifier to make the combination work. Furthermore, Cui does disclose the claimed features for an amplifier, namely observing a bandwidth or a transconductance of an amplifier while sweeping a current (Cui, Page 12, Paragraph 5, lines 3-8, consider that this section describes sweeping the gain [which depends on the transconductance] in a stepwise fashion), setting a current source to a current corresponding to an observed predetermined bandwidth or transconductance (Page 12, Paragraph 4, lines 1-10, consider that this section describes setting the transconductance based on the bias applied to the amplifier), observing an output signal or setting a current source to a current corresponding to a smallest observed output signal (Page 12, Paragraph 4, lines 1-10, consider that this section describes reducing components of the output signal based on the bias applied to the amplifier). Therefore, applicant’s arguments are unconvincing and the rejection of claims 27-28 is maintained.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-10 and 26-28 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claims 1 and 26 recite the limitation “a current at a bias input of the OTA” in lines 9-10 and 4, respectively. There is insufficient antecedent basis for this limitation in the claims. Amending the limitation to “a bias current at a bias input of the OTA” is sufficient to overcome this rejection, which is how the limitation will be treated for examination purposes. Claims 2-10 and 27-28 are likewise rejected under this logic by virtue of their dependencies on claims 1 and 26, respectively.
Claims 5, 27, and 28 recite the limitation "a bias input of the OTA" in lines 2, 3, and 3, respectively. There is insufficient antecedent basis for this limitation in the claims. Amending the limitation to “the bias input of the OTA” is sufficient to overcome this rejection, which is how the limitation will be treated for examination purposes. Claim 6 is likewise rejected under this logic by virtue of its dependency on claim 5.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-6 and 26 are rejected under 35 U.S.C. 103 as being unpatentable over Kashmiri in view of Mao.
Regarding claim 1, Kashmiri discloses:
An apparatus (Kashmiri, Fig. 15), comprising: a first transistor (Fig. 15, see P1 in modified Fig. 15 below) and a second transistor (Fig. 15, see P2 in modified Fig. 15 below) to provide a controlled current at the second transistor that is a copy of current at the first transistor (Paragraph 119, lines 1-6) when respective drain-source voltages of the first transistor and the second transistor are substantially equal (Paragraph 122, lines 1-7); and a feedback loop (Fig. 15, see P3 and A1 in modified Fig. 15 below) to set the respective drain-source voltages of the first transistor and the second transistor to be substantially equal (Paragraph 122, lines 1-7), but fails to disclose wherein a responsiveness of the feedback loop is proportional to a set transconductance of an operational transconductance amplifier (OTA) of the feedback loop, the set transconductance set by a current at a bias input of the OTA.
However, Mao teaches wherein a responsiveness of the feedback loop (Mao, Page 12, Paragraph 4, lines 14-19) is proportional to a set transconductance of an operational transconductance amplifier (OTA) of the feedback loop (Page 10, Paragraph 4, lines 8-11), the set transconductance set by a current at a bias input of the OTA (Page 10, Paragraph 4, lines 8-11).
Kashmiri and Mao are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified the regulating amplifiers of Kashmiri to be the operational transconductance amplifier of Mao, which would have the effect of reducing the power consumption of the circuit of Kashmiri (Mao, Page 12, Paragraph 4, lines 14-19).
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Regarding claim 2, Kashmiri in view of Mao further discloses:
wherein the feedback loop comprises: a pass transistor (Kashmiri, Fig. 15, see P3 in modified Fig. 15 above); and the OTA (Fig. 15, see A1 in modified Fig. 15 above), wherein the OTA to set a drain-source voltage of the pass transistor utilizing an output voltage generated by the OTA (Paragraph 122, lines 1-7).
Regarding claim 3, Kashmiri in view of Mao further discloses:
wherein the OTA to set the drain-source voltage of the pass transistor is at least partially responsive to a relationship between voltages at respective drains of the first transistor and the second transistor (Kashmiri, Paragraph 122, lines 1-7).
Regarding claim 4, Kashmiri in view of Mao further discloses:
wherein one of an inverting or non-inverting input of the OTA receives a drain voltage of the first transistor (Kashmiri, Fig. 15, see connection between A1 and drain of P1), and the other one of the inverting input or the non-inverting input of the OTA receives a drain voltage of the second transistor (Fig. 15, see connection between A1 and drain of P2).
Regarding claim 5, Kashmiri fails to disclose:
wherein the feedback loop comprises: a controlled current source coupled with a bias input of the OTA.
However, Mao further teaches wherein the feedback loop comprises: a controlled current source (Mao, Fig. 2, CS1) coupled with a bias input of the OTA (Fig. 2, see bias current Ibias1 from CS1 to rest of circuit of OTA 112).
Kashmiri and Mao are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified the regulating amplifiers of Kashmiri to be the operational transconductance amplifier of Mao, which would have the effect of reducing the power consumption of the circuit of Kashmiri (Mao, Page 12, Paragraph 4, lines 14-19).
Regarding claim 6, Kashmiri fails to disclose:
wherein the controlled current source is a variable current source to generate a current proportional to a control signal.
However, Mao further teaches wherein the controlled current source is a variable current source to generate a current proportional to a control signal (Mao, Fig. 2, consider that Ibias1 is controlled based on bias control signal VB4).
Kashmiri and Mao are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified the regulating amplifiers of Kashmiri to be the operational transconductance amplifier of Mao, which would have the effect of reducing the power consumption of the circuit of Kashmiri (Mao, Page 12, Paragraph 4, lines 14-19).
Regarding claim 26, Kashmiri discloses:
A method (Kashmiri, Fig. 15), comprising: setting respective drain voltages of a first transistor (Fig. 15, see P1 in modified Fig. 15 above) and a second transistor (Fig. 15, see P2 in modified Fig. 15 above) to be substantially equal (Paragraph 122, lines 1-7) and providing a controlled current at the second transistor that is a copy of a current at the first transistor (Paragraph 119, lines 1-6) when respective drain-source voltages of the first transistor and the second transistor are substantially equal (Paragraph 122, lines 1-7), but fails to disclose utilizing an operational transconductance amplifier (OTA) having a set bandwidth, the set bandwidth set by a current at a bias input of the OTA.
However, Mao teaches utilizing an operational transconductance amplifier (OTA) (Mao, Fig. 2, 112) having a set bandwidth (Page 12, Paragraph 4, lines 14-19), the set bandwidth set by a current at a bias input of the OTA (Page 12, Paragraph 4, lines 1-8).
Kashmiri and Mao are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified the regulating amplifiers of Kashmiri to be the operational transconductance amplifier of Mao, which would have the effect of reducing the power consumption of the circuit of Kashmiri (Mao, Page 12, Paragraph 4, lines 14-19).
Claims 7-10 are rejected under 35 U.S.C. 103 as being unpatentable over Kashmiri in view of Mao as applied to claim 1 above, and further in view of Nagata.
Regarding claim 7, Kashmiri further discloses:
comprising: a further first transistor (Kashmiri, Fig. 15, see N1 in modified Fig. 15 above) and a further second transistor (Fig. 15, see N2 in modified Fig. 15 above) to provide a further controlled current at the further second transistor that is a copy of a current at the further first transistor (Paragraph 119, lines 1-6) when the respective drain-source voltages of the further first transistor and the further second transistor are substantially equal (Paragraph 122, lines 1-7); a further feedback loop (Fig. 15, see N3 and A2 in modified Fig. 15 above) to set respective source voltages of the further first transistor and the further second transistor to be substantially equal (Paragraph 122, lines 1-7); but fails to disclose and a translinear loop to provide a DC bias current to the first transistor and the further first transistor.
However, Nagata teaches and a translinear loop (Nagata, Fig. 5, Q1-Q4) to provide a DC bias current to the first transistor and the further first transistor (Page 5, Paragraph 5, lines 6-8).
Kashmiri, Mao, and Nagata are both considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Kashmiri to incorporate the teachings of Nagata to include the translinear loop of Nagata in the circuit of Kashmiri, which would have the effect of controlling the bias current of the transistors of Kashmiri (Nagata, Page 5, Paragraph 5, lines 12-17).
Regarding claim 8, Kashmiri further discloses:
wherein the further first transistor and the further second transistor to provide the further controlled current at the further second transistor at least partially responsive to an input current received at an input terminal of the apparatus exhibiting a first current direction (Kashmiri, Paragraph 122, lines 1-7), wherein the first transistor and the second transistor to provide the controlled current at the second transistor at least partially responsive to the input current received at the input terminal of the apparatus exhibiting a second current direction (Paragraph 122, lines 1-7), wherein the second current direction is different than the first current direction (Fig. 15, consider different activations of transistors P1 and N1 in modified Fig. 15 above).
Regarding claim 9, Kashmiri further discloses:
wherein: the first transistor and the second transistor are PMOS transistors (Kashmiri, Fig. 15, see that P1 and P2 are PMOS transistors in modified Fig. 15 above); and the further first transistor and the further second transistor are NMOS transistors (Fig. 15, see that N1 and N2 are NMOS transistors in modified Fig. 15 above).
Regarding claim 10, Kashmiri further discloses:
wherein respective sources of the first transistor and the second transistor to receive a first supply voltage (Kashmiri, Fig. 15, see supply voltage coupled to P1 and P2 via Rdeg/MPb), and wherein the respective sources of the further first transistor and the further second transistor to receive a second supply voltage (Fig. 15, see ground voltage coupled to N1 and N2 via Rdeg/MNb), wherein the first supply voltage and the second supply voltage are different (Fig. 15, see that supply voltage and ground voltage are different).
Claims 27-28 are rejected under 35 U.S.C. 103 as being unpatentable over Kashmiri in view of Mao as applied to claim 26 above, and further in view of Cui.
Regarding claim 27, Kashmiri and Mao fail to disclose:
comprising: sweeping, in a stepwise increasing or decreasing manner, the current generated by a tuning current source coupled to a bias input of the OTA; observing one or more of bandwidth or transconductance of the OTA while sweeping the current generated by the tuning current source; and setting the tuning current source to a current corresponding to one or more of an observed predetermined bandwidth or an observed predetermined transconductance.
However, Cui teaches comprising: sweeping, in a stepwise increasing or decreasing manner, the current generated by a tuning current source coupled to a bias input of the OTA (Cui, Page 12, Paragraph 5, lines 3-8); observing one or more of bandwidth or transconductance of the OTA while sweeping the current generated by the tuning current source (Page 12, Paragraph 5, lines 3-8, see also Page 12, Paragraph 4, lines 1-6); and setting the tuning current source to a current corresponding to one or more of an observed predetermined bandwidth or an observed predetermined transconductance (Page 12, Paragraph 4, lines 6-10).
Kashmiri, Mao, and Cui are all considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Kashmiri to incorporate the teachings of Cui to include the bias circuit of Cui to bias the amplifiers of Kashmiri, which would have the effect of enabling varying the gain of the amplifiers of Kashmiri (Cui, Page 12, Paragraph 5, lines 1-2).
Regarding claim 28, Kashmiri fails to disclose:
comprising: sweeping, in a stepwise increasing or decreasing manner, the current generated by a current source coupled to a bias input of the OTA; observing an output signal at least partially based on the controlled current at the second transistor while sweeping the current generated by the current source; and setting the current source to the current corresponding to the smallest observed output signal.
However, Cui teaches comprising: sweeping, in a stepwise increasing or decreasing manner, the current generated by a current source coupled to a bias input of the OTA (Cui, Page 12, Paragraph 5, lines 3-8); observing an output signal at least partially based on the controlled current at the second transistor while sweeping the current generated by the current source (Page 12, Paragraph 5, lines 3-8, see also Page 12, Paragraph 4, lines 6-10); and setting the current source to the current corresponding to the smallest observed output signal (Page 12, Paragraph 4, lines 6-10).
Kashmiri, Mao, and Cui are all considered to be analogous to the claimed invention because they are in the same field of improving amplifier circuits. Therefore, it would have been obvious to one of ordinary skill in the art at the time of filing to have modified Kashmiri to incorporate the teachings of Cui to include the bias circuit of Cui to bias the amplifiers of Kashmiri, which would have the effect of enabling varying the gain of the amplifiers of Kashmiri (Cui, Page 12, Paragraph 5, lines 1-2).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Bell et al. (Patent Publication Number CN 105,339,857 A) discloses (Fig. 1A) a bidirectional current mirror transistor amplifier.
Basilico et al. (Patent Publication Number US 2020/0186098 A1) discloses (Fig. 6) an inverting amplifier.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Lance T Bartol whose telephone number is (703)756-1267. The examiner can normally be reached Monday - Thursday 6:30 a.m. - 4:00 p.m. CT, Alternating Fridays 6:30 - 3:00.
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/LANCE TORBJORN BARTOL/Examiner, Art Unit 2843
/ANDREA LINDGREN BALTZELL/Supervisory Patent Examiner, Art Unit 2843
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