DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
Examiner acknowledges the amendments made to claims 1 and 3-5. Claims 6 and 12-18 stand as withdrawn. No new claims have been added.
Response to Arguments
Applicant's arguments filed 04/23/2026 have been fully considered but they are not persuasive.
Applicant notes that the corresponding of layer [109] as the second semiconductor layer part and the layer [103] as the third semiconductor layer part is incorrect. Applicant state states the correspondence of layers 109 and 103 of Kawashima is incorrect due to the layers [109] and [103] of Kawashima having the same impurity type. Examiner notes that in the rejection of claim 1, Kawashima is not relied upon for the n-type differing impurity doping as claimed.
Page 10 of the remarks filed on 04/23/2026 notes that the Applicant believes the allegation of the combination of Kawashima and Wierer relies on improper hindsight reasoning. In response to applicant's argument that the examiner's conclusion of obviousness is based upon improper hindsight reasoning, it must be recognized that any judgment on obviousness is in a sense necessarily a reconstruction based upon hindsight reasoning. But so long as it takes into account only knowledge which was within the level of ordinary skill at the time the claimed invention was made, and does not include knowledge gleaned only from the applicant's disclosure, such a reconstruction is proper. See In re McLaughlin, 443 F.2d 1392, 170 USPQ 209 (CCPA 1971).
Applicant cites Paragraph [0033] of Wierer as teaching away from including holes in a p-type layer and in an active layer. Examiner notes the disadvantages disclosed in paragraph [0033] of Wierer are in regard to Fig. 1 of Wierer which is not relied upon in the rejection of claim 1.
Further, even if paragraph [0033] of Wierer was relied upon for the rejection, Kawashima already discloses dry etching and lithography for forming the photonic crystal pattern in paragraph [0099] of Kawashima. Therefore, the primary reference of Kawashima does not teach away from etching of a p-type material as cautioned in Wierer Fig. 1.
Paragraph [0048] of Wierer also discloses that the bottom of holes [122] are selected to be placed as close to the active region as possible.
Claim Interpretation
Examiner notes claim 1 as a “Product-by-Process” claim as outlined in MPEP § 2113. Specifically, the limitation recited in lines 13 and 14 of claim 1 that reads “the third semiconductor layer part is directly bonded to the fourth semiconductor layer part”. Examiner notes that the limitation noted above is describing a direct bonding process used to bond the third semiconductor layer part and the fourth semiconductor layer part.
MPEP § 2113 (I) states , “[E]ven though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process.” Therefore, the prior art used to reject claim 1 does not have to directly disclose the process of directly bonding the third semiconductor layer part and the fourth semiconductor layer part as long as the product of the prior art shares the same structure as implied by the process step outlined in claim 1. Therefore, direct bonding process implies a direct physical contact of the third and fourth semiconductor layer parts, which is shown in the prior art rejection of claim 1 below.
Further, Examiner notes lines 15 and 16 of claim 1 reads “at least one of the third semiconductor layer part or the fourth semiconductor layer part comprises a photonic crystal”. Examiner notes that elected species 1a disclosed in Figs. 1A,2 and 3 only shows the third semiconductor layer part comprising a photonic crystal. Therefore, for the purposes of examination in the instant application, the only interpretation of the optional limitation of lines 15 and 16 of claim 1 that is shown in the elected species 1a is understood to be “the third semiconductor layer part comprises a photonic crystal structure” as shown in the prior art rejection of claim 1 below.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1,3,5,7,9 and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Kawashima et al. (hereinafter Kawashima) (US 20100246625 A1) in view of Wierer et al. (hereinafter Wierer) (US 20050082545 A1) and further in view of Lipson et al. (hereinafter Lipson) (US 6810056 B1)
Regarding claim 1, Kawashima discloses in Fig. 1
A semiconductor laser [100] (Paras. [0029]) comprising:
a first semiconductor layer part [108] (Para. [0030]) comprising a semiconductor layer of a first conductivity type [n-type Fig. 1] (Paras. [0030,0082]);
an active layer [104] (Para. [0030]) disposed on the first semiconductor layer part [108] (Para. [0030]);
a second semiconductor layer part [109] (Para. [0081]) disposed on the active layer [104] (Para. [0030]) and comprising a semiconductor layer of a second conductivity type [p-type] (Para. [0030]);
a third semiconductor layer part [103] (Para. [0030]) disposed on the second semiconductor layer part [109] and comprising a semiconductor layer (Para. [0030,0035]); and
a fourth semiconductor layer part [106] (Para. [0030]) disposed on the third semiconductor layer part [103] and comprising a semiconductor layer (Para. [0030]) containing a second concentration of an impurity (Para. [0045]),
wherein:
the third semiconductor layer part [103] is directly bonded to the fourth semiconductor layer part [106] (See Fig. 1), and
the third semiconductor layer part [103] comprise a photonic crystal (Para. [0034]) that includes holes [102] (Para. [0035]) located in t the third semiconductor layer part [103] (Para. [0035])
Kawashima fails to disclose,
The third semiconductor layer part containing a first concentration of an impurity of the first conductivity type (n-type) and,
The fourth semiconductor layer part containing a second concentration of an impurity of the first conductivity type (n-type)
the second concentration being lower than the first concentration
the second semiconductor layer part and the third semiconductor layer part comprise a photonic crystal that includes holes located in the second semiconductor layer part and the third semiconductor layer part
Wierer discloses in Fig. 2,
a photonic crystal layer [7] (Para. [0035]) doped with an n-type impurity (Para. [0035]) and a tunnel junction structure [1] (Para. [0036]) over a p-type layer [116] (Para. [0035]) disposed on an active region [112] (Para. [0035])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the tunnel junction structure below the photonic crystal structure of Kawashima as shown in Wierer and to n-type dope the layers of Kawashima between the top contact and tunnel junction structure as shown in Wierer for the purpose of more effective current spreading and improved carrier mobility. (Wierer Para. [0042])
Examiner notes that when the tunnel junction structure and n-doping of Wierer is implemented into the device of Kawashima, the interpretation of the third semiconductor layer part is layer [6] of Wierer as a first layer of the third semiconductor layer part comprising a first n-type concentration and layer [101] of Kawashima as a second layer of the third semiconductor layer part comprising a photonic crystal structure.
Therefore, the combination of Wierer and Kawashima discloses the limitation of “the second concentration [concentration of Kawashima 106 Fig. 1] (Kawashima Para. 0045]) being lower than the first concentration [concentration of Wierer 6 Fig. 2] (Wierer Para. [0036]).
Kawashima in view of Wierer fails to disclose,
the second semiconductor layer part and the third semiconductor layer part comprise a photonic crystal that includes holes located in the second semiconductor layer part and the third semiconductor layer part
Lipson discloses in Fig. 3,
A lower end of a hole [316] (Col. 5, lines 59-66) constituting a photonic crystal extending to an active region [306] (Col. 5, lines 59-66)
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the photonic crystal depth of Lipson as the depth of the hole constituting the photonic crystal of the modified device of Kawashima for the purpose of varying the modes emitted by the device. (Lipson Col. 5, line 67 and Col. 6, lines 1-3)
Regarding claim 3, Kawashima in view of Wierer and Lipson as applied to claim 1 above further discloses
wherein:
upper ends of the holes [Kawashima 102] (Kawashima Para. [0035]) constituting the photonic crystal are located in a bonding face [Kawashima 106 to 101 Fig. 1] of the fourth semiconductor layer part [Kawashima 106 Fig. 1].
Regarding claim 5, Kawashima in view of Wierer and Lipson disclose the device outlined in the rejection of claim 1 and further discloses,
wherein:
lower ends of the holes [Kawashima 102 Fig. 1] constituting the photonic crystal (Kawashima Para. [0035]) are located in the second semiconductor layer part (Lipson Fig. 3, Col. 5, lines 59-66).
Regarding claim 7, Kawashima in view of Wierer and Lipson as applied to claim 1 above further discloses
wherein:
the third semiconductor layer part [Kawashima 103 Fig. 1, Wierer 6 Fig. 2] and the fourth semiconductor layer part [Kawashima 106 Fig. 1] are made of the same material [InGaN materials Kawashima Paras. (0035,0062)] (Wierer Para. [0036]).
Regarding claim 9, Kawashima in view of Wierer and Lipson as applied to claim 1 above further discloses
wherein:
the first semiconductor layer part [Kawashima 108 Fig. 1] (Kawashima Para. [0082], the second semiconductor layer part [Kawashima 109 Fig. 1] (Kawashima Paras. [0032,0098]), the third semiconductor layer part [Kawashima 101 Fig. 1, Wierer 6 Fig. 2], and the fourth semiconductor layer part [Kawashima 106 Fig. 1] (Kawashima Para. [0062]) are each a nitride semiconductor layer part (Kawashima Para.[0029], Wierer Para. [0036]).
Regarding claim 11, Kawashima in view of Wierer and Lipson as applied to claim 1 above further discloses
wherein:
the first conductivity type is n-type (Kawashima Para. [0030]) and the second conductivity type is p-type (Kawashima Para. [0030]).
Claim 2,4,8 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Kawashima in view of Wierer and Lipson as applied to claim 1 above, and further in view of Xin et. al (hereinafter Xin) (US 20070029541 A1).
Regarding claim 2, Kawashima in view of Wierer a and Lipson s applied to claim 1 above further discloses
wherein:
the third semiconductor layer part [Kawashima 101 Fig. 1, Wierer 6 Fig. 2] (Kawashima Para. [0035]) comprises:
a first layer [Wierer 6 Fig. 2] (Wierer Para. [0036]), which is the semiconductor layer containing the first concentration of the impurity (Wierer Para. [0036]) of the first conductivity type [n-type] (Wierer Para. [0036]), and
a second layer [Kawashima 101 Fig. 1] (Kawashima Para. [0035]), which is a semiconductor layer [Kawashima Para. (0035)] containing a third concentration of the impurity [Kawashima Para. (0045)] of the first conductivity type [n-type] (Wierer Para. [0035]), the third concentration [Kawashima concentration of 101 Fig. 1] being lower than the first concentration [concentration of Wierer 6 Fig. 2], [Kawashima Para. (0045), Wierer Para. [0036]), wherein:
the first layer [Wierer 6 Fig. 2] and the second layer [Kawashima 101 Fig. 1] are disposed successively from the second semiconductor layer part [Kawashima 109 Fig. 1] side (Kawashima Para. [0030]).
Kawashima in view of Wierer and Lipson fails to disclose,
the third concentration being higher than the second concentration
Xin discloses in Fig. 5,
a top n-type layer [502] (Para. [0037]) with a second concentration (Paras. [0047,0048]) lower than a first concentration of a highly doped n-layer [504] (Paras. [0037,0047,0048])
It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to implement the n-type doping level of Xin into the top n-type layer of Kawashima in view of Wierer and Lipson for the purpose of lowering contact resistance and improving hole injection efficiency. (Xin Para. [0039])
Regarding claim 4, Kawashima in view of Wierer, Lipson and Xin as applied to claim 2 above further discloses
wherein:
upper ends of the holes [Kawashima 102] (Kawashima Para. [0035]) constituting the photonic crystal are located in a bonding face [Kawashima 106 to 101 Fig. 1] of the fourth semiconductor layer part [Kawashima 106 Fig. 1].
Regarding claim 8, Kawashima in view of Wierer, Lipson and Xin as applied to claim 2 above further discloses
wherein:
the third semiconductor layer part [Kawashima 103 Fig. 1, Wierer 6 Fig. 2] and the fourth semiconductor layer part [Kawashima 106 Fig. 1] are made of the same material [InGaN materials Kawashima Paras. (0035,0062)] (Wierer Para. [0036]).
Regarding claim 10, Kawashima in view of Wierer, Lipson and Xin as applied to claim 2 above further discloses
wherein:
the first semiconductor layer part [Kawashima 108 Fig. 1] (Kawashima Para. [0082], the second semiconductor layer part [Kawashima 109 Fig. 1] (Kawashima Paras. [0032,0098]), the third semiconductor layer part [Kawashima 101 Fig. 1, Wierer 6 Fig. 2], and the fourth semiconductor layer part [Kawashima 106 Fig. 1] (Kawashima Para. [0062]) are each a nitride semiconductor layer part (Kawashima Para.[0029], Wierer Para. [0036]).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Examiner notes (US 20130252360 A1) which discloses a photonic crystal structure with holes that extend through multiple layers of the device. See PTO-892 form.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to HUNTER J NELSON whose telephone number is (571)270-5318. The examiner can normally be reached Mon-Fri. 8:30am-5:00 ET.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at (571) 272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/H.J.N./Examiner, Art Unit 2828 /TOD T VAN ROY/Primary Examiner, Art Unit 2828
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