DETAILED ACTION
Authorization for Internet Communications
The examiner encourages Applicant to submit an authorization to communicate with the examiner via the Internet by making the following statement (from MPEP 502.03):
“Recognizing that Internet communications are not secure, I hereby authorize the USPTO to communicate with the undersigned and practitioners in accordance with 37 CFR 1.33 and 37 CFR 1.34 concerning any subject matter of this application by video conferencing, instant messaging, or electronic mail. I understand that a copy of these communications will be made of record in the application file.”
Please note that the above statement can only be submitted via Central Fax, Regular postal mail, or EFS Web (PTO/SB/439).
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Examiner Notes
Examiner cites particular columns and line numbers in the references as applied to the claims below for the convenience of the applicant. Although the specified citations are representative of the teachings in the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested that, in preparing responses, the applicant fully consider the references in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the examiner.
¶ [0113] of specification, excludes signals from computer readable storage media, therefore, no 101 rejection was given for computer readable storage media.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
The following is a quotation of the first paragraph of pre-AIA 35 U.S.C. 112:
The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor of carrying out his invention.
Claims 1-17, and 21-23 are rejected under 35 U.S.C. 112(a) or 35 U.S.C. 112 (pre-AIA ), first paragraph, as failing to comply with the written description requirement. The claim(s) contains subject matter which was not described in the specification in such a way as to reasonably convey to one skilled in the relevant art that the inventor or a joint inventor, or for applications subject to pre-AIA 35 U.S.C. 112, the inventor(s), at the time the application was filed, had possession of the claimed invention.
Regarding claim 1, 8, and 15, recite “wherein the buffer states are encoded in memory associated with each buffer” do not appear to be supported in applicants’ specification. ¶ [0040] discloses that “the buffer states are encoded in the respective buffers” and does not state it is encoded in memory. It does not appear to be the same thing, as applicant noted it is only associated with each buffer.
Claims 2-7, 9-14, 16-17, 21-23 are rejected based on dependency to independent claims 1, 8, and 15.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-17, and 21-23 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Regarding claim 1, 8, and 15, recite “wherein the buffer states are encoded in memory associated with each buffer” and examiner cannot discern what it means after reading the specification. Applicant stated in interview dated 6/16/2026, that memory is a buffer, therefore, why is there a need to state encoded in memory associated with each buffer? Applicant could not disclose to examiner what the amendment means, therefore, examiner is giving the limitation its broadest meaning of buffer states stored in memory.
Claims 2-7, 9-14, 16-17, 21-23 are rejected based on dependency to independent claims 1, 8, and 15.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 1-17, and 21-23 are rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more.
Step 1: Regarding claim 1, this part of the eligibility analysis evaluates whether the claim falls within any statutory category. MPEP §2106.03. The claim recites method steps; thus, the claim is directed to a process which is one of the statutory categories of invention.
Step 2A Prong 1: This part of the eligibility analysis evaluates whether the claim recites a judicial exception. As explained in MPEP 2106.04(II) and the October 2019 Update, a claim “recites” a judicial exception when the judicial exception is “set forth” or “described” in the claim.
The limitations “providing a set of buffer states representing different contents of the buffer respectively, the set of buffer states comprising an initial state representing a content of the unused buffer and subsequent states representing the outputs of the sequence of components respectively, wherein the application component is configured to use the buffer in case the buffer is in the state representing the output required by the application component; sorting the buffer states in order of the sequence of components, wherein the sorting is circular so that a final state is followed by the initial state; assigning to the buffers the initial state before execution of the application” as drafted, recite functions that, under its broadest reasonable interpretation, covers functions that could reasonably be performed in the mind, including with the aid of pen and paper, but for the recitation of generic computer components. That is, the limitations as drafted, are functions that, under its broadest reasonable interpretation, recite the abstract idea of a mental process. The limitations encompass a human mind carrying out the functions through observation, evaluation, judgment and/or opinion, or even with the aid of pen and paper. Thus, these limitations recite and fall within the “Mental Processes” grouping of abstract ideas. See MPEP §2106.04(a)(2). Accordingly, claim 1 recites a judicial exception (i.e. an abstract idea).
Step 2A, Prong 2, This part of the eligibility analysis evaluates whether the claim as a whole integrates the recited judicial exception into a practical application of the exception. This evaluation is performed by (a) identifying whether there are any additional elements recited in the claim beyond the judicial exception, and (b) evaluating those additional elements individually and in combination to determine whether the claim as a whole integrates the exception into a practical application. 2019 PEG Section III(A)(2), 84 Fed. Reg. at 54-55.
In this case, this judicial exception is not integrated into a practical application. The claim recites the following additional elements “the application comprising a sequence of components, the first component of the sequence being configured to store output data in an unused buffer, each subsequent component of the sequence being configured to use a buffer comprising an output provided by the component preceding said subsequent component,” “wherein the buffer states are encoded in memory associated with each buffer” are recited at a high-level of generality such that it amounts no more than mere instructions to apply the exception using a generic computer component, or merely a generic computer or generic computer components to perform the judicial exception. Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f).
The additional element “A method for execution of an application using buffers, repeatedly executing the application; and changing during execution of the application a current state of a buffer of the buffers to a subsequent state in case a transition condition is fulfilled, wherein the transition condition requires that a current application component using the buffer finishes,” and “wherein the buffer states are updated automatically during the execution of the application,” fails to meaningfully limit the claim because the element is applying the method for execution, thus is categorized as insignificant extra solution activity, thus not practical application under prong 2. Accordingly, the additional elements do not integrate the recited judicial exception into a practical application, and the claim is therefore directed to the judicial exception. See MPEP 2106.05(f).
Step 2B, This part of the eligibility analysis evaluates whether the claim as a whole amounts to significantly more than the recited exception, i.e., whether any additional element, or combination of additional elements, adds an inventive concept to the claim. MPEP 2106.05.
As discussed above with respect to integration of the abstract idea into a practical application, the additional elements of the “the application comprising a sequence of components, the first component of the sequence being configured to store output data in an unused buffer, each subsequent component of the sequence being configured to use a buffer comprising an output provided by the component preceding said subsequent component” and “wherein the buffer states are updated automatically during the execution of the application,” are merely a generic computer or generic computer components to apply the judicial exception which cannot provide an inventive concept.
The claims include additional elements “A method for execution of an application using buffers, repeatedly executing the application; and changing during execution of the application a current state of a buffer of the buffers to a subsequent state in case a transition condition is fulfilled, wherein the transition condition requires that a current application component using the buffer finishes,” and “wherein the buffer states are updated automatically during the execution of the application,” that are not sufficient to amount to significantly more than the judicial exception because they are essentially regarding data gathering and applying method for execution. Under step 2B, the courts have identified data gathering as well understood routine and conventional. See MEPE 2106.05d.
Accordingly, the claim does not appear to be patent eligible under 35 USC 101.
Claims 2, is a dependent claim rejected for the same reasons as claim 1. Furthermore, the claims include additional elements “wherein the final state represents the output of the second last component of the sequence” This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 3, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “wherein the final state represents the output of the second last component of the sequence after the last component of the sequence finishes” This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 4, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “wherein the transition condition further requires that the buffer having the current state is the first buffer of a minimum number of buffers having the final state.” This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 5, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “wherein the transition condition further requires that the buffer having the current state remains in that final state for a minimum period of time or until it reaches a maximum size.”
This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 6, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “ wherein the transition condition further requires that the buffer having the current state remains in that final state for a minimum period of time or until it reaches a maximum size”.
This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 7, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements ” wherein the changing of the current state is performed by the current application component.” This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 8, is an independent product claim and is rejected for the same reasons as claim 1. In particular, the claim recites additional elements – A computer program product for execution of an application using buffers, one or more computer-readable storage media and program instructions stored on the one or more computer-readable storage media--. The computer program product, media-- is recited at a high-level of generality (i.e., as a generic product, media) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, the additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
Claim 9 -14, are dependent product claims corresponding to 2-7, respectively and are rejected for the same reasons.
Claim 15, is an independent system claim and is rejected for the same reasons as claim 1. In particular, the claim recites additional elements – A computer system for execution of an application using buffers, one or more computer processors; one or more computer readable storage media; and program instructions stored on the computer readable storage media for execution by at least one of the one or more processors--. The system ais recited at a high-level of generality (i.e., as a generic system, processor, media) such that it amounts no more than mere instructions to apply the exception using a generic computer component. Accordingly, the additional element does not integrate the abstract idea into a practical application because it does not impose any meaningful limits on practicing the abstract idea. The claim is directed to an abstract idea.
Claims 16-17 are dependent system claims corresponding to claim 2-3, respectively and are rejected for the same reasons.
Claim 21, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “further comprising: generating a data structure comprising pointers to the buffers; providing, for each buffer state, an iterator configured to traverse the data structure; assigning each iterator to a pointer identifying:(i) an earliest buffer having the state corresponding to the iterator, or (ii) if no such buffer exists, a buffer having a preceding state that will next transition to the state; and providing to an application component the pointer associated with the iterator of a requested buffer state.”
This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely an additional abstract idea.
Claim 22, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “wherein each application component is restricted to processing only buffers having a corresponding state associated with that application component, and waits when no such buffer is available.” This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim 23, is a dependent claim rejected for the same reasons as claim 1. Furthermore, claims include additional elements “wherein transitioning a buffer from a final state to the initial state requires that at least a threshold number of buffers remain in the final state.” This additional element does not amount to a practical application, nor recite significantly more than a judicial exception, is merely data gathering which the court have identified as well understood, routine, and conventual activity. See MPEP 2106.05(d).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1, 2, 3, 7, 9, 10, 14, 16 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Carraway et al. (U.S. PG PUB 2021/037-180) in view of McMillen et al. (U.S. PG PUB 2005/0273450).
Regarding claim 1, Carraway teaches a method for execution of an application using buffers (see ¶[0013] dynamic circular buffer), the application comprising a sequence of components, the first component of the sequence being configured to store output data in an unused buffer (note: unused buffer according to applicants specification is an available buffer, see ¶ [0018] of applicant’s specification, therefore ¶ [0088] describes circular buffer capturing states of player data, etc, since it is available), each subsequent component of the sequence being configured to use a buffer comprising an output provided by the component preceding said subsequent component (see ¶[0088] “In one or more implementations, maintaining the circular buffer includes capturing a plurality of states of player data for the player at corresponding points in time over the predetermined period of time. In one or more implementations, obtaining the current circular buffer includes capturing a current state of player data for the player including physics data and metadata for the player at a timestamp associated with a determined conclusion of the incident. Obtaining the current circular buffer may further include updating the circular buffer by including the current state of player data and discarding a least recent state of player data from the circular buffer since the data is collected over a period of time, then each subsequent component is also being captured”), the method comprising:
providing a set of buffer states representing different contents of the buffer respectively, the set of buffer states comprising an initial state representing a content of the unused buffer and subsequent states representing the outputs of the sequence of components respectively, wherein the application component is configured to use the buffer in case the buffer is in the state representing the output required by the application component (see ¶[0024] “As used herein, a “captured state” or “player state” may refer to a snapshot or state of a player within the simulation environment at a given point in time. In particular, a captured state may refer to a captured state of a player at a corresponding point in time indicating physics data and metadata for the player at the corresponding point in time. For instance, in the context of a racing simulation application, a state of a player may include any number of signals descriptive of movement, user inputs, position, user metadata, or any data relevant to the player (or other player involved in an incident) at the given point in time. As used herein, a “current state” or “current snapshot” may refer to a most recent captured state for a player within the simulation environment.”);
wherein the buffer states are encoded in memory associated with each buffer (see ¶[0097] “Instructions 605 and data 607 may be stored in the memory 603. The instructions 605 may be executable by the processor 601 to implement some or all of the functionality disclosed herein. Executing the instructions 605 may involve the use of the data 607 that is stored in the memory 603. Any of the various examples of modules and components described herein may be implemented, partially or wholly, as instructions 605 stored in memory 603”, see ¶[0042]), and wherein the buffer states are updated automatically during the execution of the application (see ¶[0058] “For example, in one or more implementations, the simulation application 118 incrementally updates the circular buffer based on sampled player states as the player states are captured by the simulation application 118. For example, the simulation application 118 may simply append each captured player state to an end of a current version of the circular buffer 206 while removing a least frequent captured player state.”);
sorting the buffer states in order of the sequence of components, wherein the sorting is circular so that a final state is followed by the initial state (see ¶[0087] “circular buffer”); assigning to the buffers the initial state before execution of the application (see ¶[0026] “In one or more embodiments, the adjudication system generates a circular buffer including player data over a period of time. As used herein, a “circular buffer” refers to a series of captured states for a player over a predetermined period of time (e.g., 10, 15 seconds). For instance, a circular buffer may refer to a running buffer including snapshots taken over a predetermined period. As will be discussed in further detail herein, a “current circular buffer” or “current version of a circular buffer” may refer interchangeably to a circular buffer including a current captured state (e.g., a most recently captured state) for a player and a plurality of captured states for the player dating back the predetermined duration of time or a predetermined number of captured states. (e.g., 15 seconds and/or 180 captured states). In one or more embodiments described herein, a current circular buffer refers to a circular buffer as it exists as an identified conclusion of an incident. Further detail in connection with obtaining a current version of a circular buffer is discussed below.”).
Carraway does not expressly disclose, however, McMillen teaches repeatedly executing the application (see ¶ [0258] “Accordingly, repeated execution of the state machine 1400 becomes faster and more efficient when compared to the same state machine in which stall conditions may occur at each of states 4, 6, 7, 8, and 11.”);
and changing during execution of the application a current state of a buffer of the buffers to a subsequent state in case a transition condition is fulfilled (see ¶ [0143] “In FIG. 6c, the curved arcs indicate the presence of a base address field in the non-terminal instructions that points to the memory location of the first instruction in a next-state block of the state to which the transition is being made. Each terminal instruction has a solid straight line segment arrow that indicates a transition 695 back to the initial state. Because these instructions contain information unique to the terminal states to which they're associated, they are not all identical. Only those terminal format instructions associated with transitions to the same terminal state are identical, such as Terminal #3 and Terminal #4 in FIG. 6b which both cause transition to (virtual) terminal state 11. Each failure transition, all of which are identical, has a dashed straight line segment arrow that indicates a transition 695 back to the initial state.”),
wherein the transition condition requires that a current application component using the buffer finishes (see ¶ [0292] “Once the algorithm completes, states 4, 6, 7, 8, and 11, will have been updated with the output information corresponding to the regular expression numbers shown in dotted line triangles in FIG. 14a. Because of the tree structure of state machine 1400, there are no updating conflicts, so none of the portions of RemoveStall algorithm 1500 that detect conflict and handle restoration are used (e.g., FIGS. 15c and 15e).”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway by adapting McMillen for processing data applications using buffers and state machines (see ¶[0081] of McMillen).
Regarding claim 2, Carraway teaches wherein the final state represents the output of the second last component of the sequence (see ¶[0078] “In one or more embodiments, the adjudication model outputs a simple determination of fault or not at fault. However, the adjudication model may be trained to output other metrics.”).
Regarding claim 3, Carraway teaches wherein the final state represents the output of the second last component of the sequence after the last component of the sequence finishes (see ¶ [0090] “In one or more embodiments, the series of acts 500 further include applying the adjudication model to the current version of the circular buffer to determine a metric of fault for the player in relation to the incident between the player and the one or more additional players within the simulation environment. In one or more implementations, the adjudication model includes a machine learning model trained to receive an input including a plurality of states of player data for the given player over a duration of time and generate an output including the fault determination for the given player based on the player data from the plurality of states.”).
Regarding claim 7, Carraway teaches wherein the changing of the current state is performed by the current application component (see ¶[0013] “As an illustrative example, an adjudication system may generate a dynamic circular buffer (or simply “circular buffer”) that includes captured states of player data over a predetermined period of time within a virtual simulation environment. The adjudication system may detect or otherwise identify an incident between a player (e.g., a vehicle) and one or more additional players (e.g., additional vehicle(s)). In response to the incident, the adjudication system can generate an updated circular buffer including captured states of player data over the predetermined period of time dating back from a conclusion of the incident. The adjudication system can further provide the updated circular buffer to an adjudication model trained to output a fault determination for a given player based on a sequence of recently captured states of player data for the given player.”).
Regarding claim 8, is an independent product claim corresponding to method claim 1, and is rejected for the same reasons. In addition, Carraway teaches a computer program product for execution of an application using buffers, one or more computer-readable storage media and program instructions stored on the one or more computer-readable storage media (see ¶[0047]).
Regarding 9, 10, 14, correspond with claims 2, 3, and 7, respectively. Therefore, they are rejected for the same reasons.
Regarding claim 15, is an independent system claim corresponding to method claim 1, and is rejected for the same reasons. In addition, Carraway teaches a computer system for execution of an application using buffers, one or more computer readable storage media; and program instructions stored on the computer readable storage media for execution by at least one of the one or more processors (see ¶ [0047]).
Regarding 16, and 17, correspond with claims 2, and 3, respectively. Therefore, they are rejected for the same reasons.
Claim(s) 4, and 11 are rejected under 35 U.S.C. 103 as being unpatentable over Carraway et al. (U.S. PG PUB 2021/037-180) in view of McMillen et al. (U.S. PG PUB 2005/0273450), as applied to claim 1, further in view of Brewerton et al. (U.S. PG PUB 2013/0198571).
Regarding claim 4, Carraway and McMillen do not expressly disclose, however, Brewerton teaches wherein the transition condition further requires that the buffer having the current state is the first buffer of a minimum number of buffers having the final state (see ¶[0042] “As illustrated, the first FIFO buffer 310a includes a first input data signature buffer 330a configured to store first input data signatures received from the signature generation unit 305, a first input address signature buffer 330b configured to store first input address signatures received from the signature generation unit 305, a first CPU state signature buffer 330c configured to store first CPU state signatures received from the signature generation unit 305, a first output data signature buffer 330d configured to store first output data signatures received from the signature generation unit 305, and a first output address signature buffer 330e configured to store first output address signatures received from the signature generation unit 305.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway and McMillen by adapting Brewerton for managing state of buffers (see ¶[0042] and [0043] of Brewerton).
Regarding claims 11, correspond with claim 4 above. Therefore, they are rejected for the same reasons.
Claim(s) 5, 6, 12, 13, and 23 are rejected under 35 U.S.C. 103 as being unpatentable over Carraway et al. (U.S. PG PUB 2021/037-180) in view of McMillen et al. (U.S. PG PUB 2005/0273450), as applied to claim 1, 8, and 15 above, further in view of Cheng et al. (U.S. PG PUB 2022/0350386).
Regarding claim 5, Carraway and McMillen do not expressly disclose, however, Cheng teaches wherein the transition condition further requires that the buffer having the current state remains in that final state for a minimum period of time or until it reaches a maximum size (see ¶ [0041] “The remaining registers 0x45 to 0x47 show the FSM 220 remained in state 0 for the remaining time.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway and McMillen by adapting Cheng to ease the effort of debugging, the historical transferred state data recorded in the storage buffer of the CPLD may be read when the system is powered on or powered off, and when an abnormality occurs (see ¶[0026] of Cheng).
Regarding claim 6, Carraway and McMillen do not expressly disclose, however, Cheng teaches the method further comprising: using data stored in the buffer in the final state to perform debugging of the application (see ¶[0027] “FIG. 1 shows a computer system 100 that executes an FSM-based routine that stores the FSM state data to facilitate debugging of the computer system 100”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway and McMillen by adapting Cheng to ease the effort of debugging, the historical transferred state data recorded in the storage buffer of the CPLD may be read when the system is powered on or powered off, and when an abnormality occurs (see ¶[0026] of Cheng).
Regarding claims 12 and 13, correspond with claims 5 and 6 above, respectively. Therefore, they are rejected for the same reasons.
Regarding claim 23, Carraway and McMillen do not expressly disclose, however, Cheng teaches wherein transitioning a buffer from a final state to the initial state requires that at least a threshold number of buffers remain in the final state (see ¶ [0041] “The remaining registers 0x45 to 0x47 show the FSM 220 remained in state 0 for the remaining time.”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway and McMillen by adapting Cheng to ease the effort of debugging, the historical transferred state data recorded in the storage buffer of the CPLD may be read when the system is powered on or powered off, and when an abnormality occurs (see ¶[0026] of Cheng).
Claim(s) 21-22 are rejected under 35 U.S.C. 103 as being unpatentable over Carraway et al. (U.S. PG PUB 2021/037-180) in view of McMillen et al. (U.S. PG PUB 2005/0273450), as applied to claim 1, further in view of Johnson et al. (U.S. PG PUB 2012/0131309)
Regarding claim 21, Carraway, McMillen do not expressly disclose, however, Johnson teaches further comprising:
generating a data structure comprising pointers to the buffers (see ¶[0396] “This hosted-program function 1710, in turn, generally comprises a number of sub-sections, which are create object instances 1712, setup object state 1714 and 1716 (which includes dataflow pointers, circular-buffer addressing context, and parameter initialization)”);
providing, for each buffer state, an iterator configured to traverse the data structure (see ¶ [0427] “The traverse function 1708 is generally the inner loop of the iterator 602, created by code autogeneration. Typically, it updates circular-buffer addressing states for the iteration, and then calls each algorithm instance in an order that satisfies data dependencies. Here, the traverse function 1708 is shown for "simple_ISP". This function 1708 is passed four parameters:”);
assigning each iterator to a pointer identifying: (i) an earliest buffer having the state corresponding to the iterator (see ¶[0421] “the initial pointer into the buffer, which depends on "delay_offset" and the buffer size;”), or (ii) if no such buffer exists, a buffer having a preceding state that will next transition to the state; and
providing to an application component the pointer associated with the iterator of a requested buffer state (see ¶[0439] “The remaining statements create a pointer to the traverse function 1708 and call the iterator (i.e., 602) with this pointer. The pointer is used to call traverse function 1708 within the main body of the iterator (i.e., 602).”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway and McMillen by adapting Johnson to enable organization of buffers (see ¶ [0468] of Johnson).
Regarding claim 22, Carraway, McMillen do not expressly disclose, however, Johnson teaches wherein each application component is restricted to processing only buffers having a corresponding state associated with that application component, and waits when no such buffer is available (see ¶[0593] “The context to the right of the left boundary responds to this notification by sending its own SP to the thread, containing its own destination ID. This information, and the fact that the permission has been received, is stored in the thread's destination descriptor, replacing the destination ID of the left-boundary context (which is now either unused or stored in a private data buffe”).
Hence, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the teachings of Carraway and McMillen by adapting Johnson to enable organization of buffers (see ¶ [0468] of Johnson).
Response to Arguments
Applicant's arguments filed 6/2/2026 have been fully considered but they are not persuasive.
Regarding 101 rejections, applicants argue the claims cannot be performed in the mind, such as providing a set of buffer states” and states that the application may be controller to access the set of buffers, and changing a buffer state, and execution of buffer states.
Examiner disagrees. Examiner can provide a buffer state on pen and paper such as buffer is empty, buffer is full, buffer has one element, and thus can be done in the mind. The changing of buffer state can be done in the mind as well, for example, change buffer state from full to empty, etc. The execution of a buffer would be just an “apply it” step to the abstract idea and does not add significantly more nor a practical application.
Regarding 103 rejections, applicants argue the Carraway does not disclose “the application component is configured to use the buffer in case the buffer is in the state representing the output by the application component. Applicant also argues the combination improperly redefines the term state, one being player data, the other being state machine.
Examiner disagrees. Carraway teaches this by disclosing states of player data in the circular buffer, the application being the gaming application. Thus, player data is an output of the application component.
Examiner disclosed Carraway to show a plurality of buffer states, i.e. player states, while disclosing McMillen to show that execution an application and changing state is not a new concept (i.e. going from one state to another). Examiner is not changing the meaning of the term “state.” Thus, the rejection of the claim is a combined teaching of the prior arts.
Interview Requests
In accordance with 37 CFR 1.133(a)(3), requests for interview must be made in advance. Interview requests are to be made by telephone (571-270-7848) call or FAX (571-270-8848). Applicants must provide a detailed agenda as to what will be discussed (generic statement such as “discuss §102 rejection” or “discuss rejections of claims 1-3” may be denied interview). The detail agenda along with any proposed amendments is to be written on a PTOL-413A or a custom form and should be faxed (or emailed, subject to MPEP 713.01.I / MPEP 502.03) to the Examiner at least 5 business days prior to the scheduled interview. Interview requests submitted within amendments may be denied because the Examiner was not notified, in advance, of the Applicant Initiated Interview Request and due to time constraints may not be able to review the interview request to prior to the mailing of the next Office Action.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Ali-Santosa et al. (U.S. PG PUB 2004/0003148) teaches a buffer block allocation table as well as a buffer allocation table may be provided to handle a buffer request in a system management controller. When a buffer request is received, the buffer block allocation table may be scanned entry-by-entry to find an available buffer block. once one its located, it is marked as taken. Then, the corresponding buffer block in the buffer allocation table is scanned entry-by-entry looking for one that is available. If one is found, it is used for the buffer request. If one cannot be found, the system may return to the buffer block allocation table and continue with the next entry. This process may repeat until an available buffer is found.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to CARINA YUN whose telephone number is (571)270-7848. The examiner can normally be reached Mon, Tues, Thurs, 9-4 (EST).
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to call.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Kevin Young can be reached on (571) 270-3180. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
Carina Yun
Patent Examiner
Art Unit 2194
/KEVIN L YOUNG/Supervisory Patent Examiner, Art Unit 2194
Prosecution Insights