Prosecution Insights
Last updated: April 19, 2026
Application No. 18/308,044

METHOD OF MANUFACTURING SILICON CARBIDE SEMICONDUCTOR DEVICE

Final Rejection §103§112
Filed
Apr 27, 2023
Examiner
MCCALL SHEPARD, SONYA D
Art Unit
2898
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Fuji Electric Co. Ltd.
OA Round
2 (Final)
93%
Grant Probability
Favorable
3-4
OA Rounds
2y 3m
To Grant
97%
With Interview

Examiner Intelligence

Grants 93% — above average
93%
Career Allow Rate
1082 granted / 1164 resolved
+25.0% vs TC avg
Minimal +4% lift
Without
With
+3.6%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
24 currently pending
Career history
1188
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
47.3%
+7.3% vs TC avg
§102
36.1%
-3.9% vs TC avg
§112
13.0%
-27.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1164 resolved cases

Office Action

§103 §112
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant’s arguments with respect to claim(s) 1 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 1, 4, 5 and 7 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Regarding claim 1, the metes and bounds of the claimed invention are vague and ill-defined as a result of the uncertainty in the different boundaries and new limitations “and performing a heat treatment at a temperature that is less than 900 degrees C after the deposition process, wherein in the deposition process, the LaAlO3 film is formed in direct contact with a surface of the semiconductor substrate, and the temperature of the heat treatment is at least 700 degrees C.” The claim is indefinite because the temperature of the heat treatment at a temperature less than 900 degrees C (line 11) provides temperatures that are lower than 700 degrees C and a temperature at least 700 degrees C (line 17) provides for temperatures that are higher than 900 degrees C. For examination purposes, the examiner interprets the temperature of the heat treatment to be 700 degrees C to 900 degrees C. Claims 4, 5 and 7 are rejected because of their dependency on claim 1. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim(s) 1, 4-5 and 7 is/are rejected under 35 U.S.C. 103 as being unpatentable over Cooper et al. US 2019/0386124 in view of Huang et al., "Characterization of Al2O3/LaAlO3/SiO2 Gate Stack on 4H-SiC After Post-Deposition Annealing", IEEE trans. Electron Devices. Vol. 68 No. 4 pp. 2133-2137, further in view of Feng et al., “The Study of Electrical Properties for Multilayer La2O3/Al2O3 Dielectric Stacks and LaAlO3 Dielectric Film Deposited by ALD”, Nanoscale Research Letters (2017) 12:230. PNG media_image1.png 429 760 media_image1.png Greyscale Cooper et al. US 2019/0386124 Regarding claim 1, Cooper et al. in Fig. 13 and [0141]-[0155] discloses a method of manufacturing a silicon carbide semiconductor device [0142] including an insulated gate that includes a gate electrode 914 and a gate insulating film 916 including a LaAlO3 film [0146] formed in direct contact with a surface of the semiconductor substrate, the method comprising: forming the gate insulating film 916 on a semiconductor substrate [0142]-[0143] containing silicon carbide. Cooper et al. does not expressly disclose forming the gate insulating film including repeatedly depositing a La2O3 atomic layer film alternating with an Al2O3 atomic layer film, wherein the La2O3 atomic layer film is deposited first, using an atomic layer deposition method, as a deposition process, thereby forming the LaAlO3 film as the gate insulating film, and performing a heat treatment at a temperature that is less than 900 degrees C after the deposition process. Huang et al. (see the Introduction and Design of Experiments) teaches a method of forming an Al2O3/LaAlO3/SiO2 Gate Stack on 4H-SiC by repeatedly depositing a La2O3 atomic layer film alternating with an Al2O3 atomic layer film, wherein the La2O3 atomic layer film is deposited first, using an atomic layer deposition method, as a deposition process, thereby forming the LaAlO3 film and performing a post-deposition annealing (PDA) in O2 ambient at 700 degrees C and 800 degrees C. Huang et al. further teaches that the gate stacks allow devices to be operated at a higher electric field, enable a sufficiently high energy barrier at the interface with SiC, and provide for a better ohmic contact in SiC technology. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Huang et al. in the method of forming the silicon carbide semiconductor device of Cooper et al., as the court has held that choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007). Cooper et al. in view of Huang et al. does not expressly teach a multilayer structure including LaAlO3 film. However, Feng et al. in Fig. 1 and page 3 teaches a multilayer LaAlO3 (La2O3/Al2O3) stack, in direct contact with a substrate, exhibiting high breakdown voltage from the lower trapped charges density, since structural defects lead to the possibility to generate a conductor path in a gate dielectric. Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to incorporate the teachings of Huang et al. in the method of forming the silicon carbide semiconductor device of Cooper et al., as the court has held that choosing from a finite number of identified, predictable solutions, with a reasonable expectation of success is prima facie obvious. KSR Int'l Co. v. Teleflex Inc., 550 U.S. 398, 415-421, 82 USPQ2d 1385, 1395-97 (2007). Regarding claim 4, Cooper et al. in view of Huang et al. teaches the method of manufacturing the silicon carbide semiconductor device according to claim 1. Huang et al. (see the Design of Experiments) teaches wherein the forming the gate insulating film further includes, after the deposition process but before the heat treatment, forming, as a part of the gate insulating film, an Al2O3 film on the LaAlO3 film. Regarding claim 5, Cooper et al. in view of Huang et al. teaches the method of manufacturing the silicon carbide semiconductor device according to claim 1. Huang et al. (see the Design of Experiments) teaches wherein the heat treatment is performed under a gas atmosphere containing oxygen. Regarding claim 7, Cooper et al. in view of Huang et al. teaches the method of manufacturing the silicon carbide semiconductor device according to claim 1. Huang et al. (see the Design of Experiments) teaches wherein the temperature of the heat treatment is at most 800 degrees C. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to SONYA D MCCALL-SHEPARD whose telephone number is (571)272-9801. The examiner can normally be reached M-F: 8:30 AM-5:00 PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio J. Maldonado can be reached at (571)272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Sonya McCall-Shepard/Primary Examiner, Art Unit 2898
Read full office action

Prosecution Timeline

Apr 27, 2023
Application Filed
Nov 13, 2025
Non-Final Rejection — §103, §112
Feb 11, 2026
Response Filed
Feb 27, 2026
Final Rejection — §103, §112
Apr 09, 2026
Interview Requested

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
93%
Grant Probability
97%
With Interview (+3.6%)
2y 3m
Median Time to Grant
Moderate
PTA Risk
Based on 1164 resolved cases by this examiner. Grant probability derived from career allow rate.

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