Prosecution Insights
Last updated: October 25, 2026
Application No. 18/308,322

ELECTROSTATIC DISCHARGE DEVICES

Final Rejection §102
Filed
Apr 27, 2023
Examiner
GRAY, AARON J
Art Unit
2897
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Globalfoundries Singapore Pte. Ltd.
OA Round
2 (Final)
82%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
99%
With Interview

Examiner Intelligence

Grants 82% — above average
82%
Career Allowance Rate
429 granted / 521 resolved
+14.3% vs TC avg
Strong +30% interview lift
Without
With
+29.8%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
34 currently pending
Career history
557
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
53.0%
+13.0% vs TC avg
§102
28.5%
-11.5% vs TC avg
§112
15.7%
-24.3% vs TC avg
Black line = Tech Center average estimate • Based on career data from 521 resolved cases

Office Action

§102
Detailed Action Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim(s) 1-5, 9-12 and 20 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Zhan et. Al. (US 20190103396 A1 hereinafter Zhan). Regarding claims 1 and 20, Zhan teaches in Figs. 12 and/or 19, which are related by [0078], with associated text a structure comprising: a semiconductor material (114 and/or 116 and 120) of a first dopant type (embodiment where 114 is N-type the same as 108 [0045], Fig. 12); a first well 150 comprising a second dopant type (P-type [0051]) in the semiconductor material (Fig. 12); a floating well 162 in the first well, the floating well comprising the first dopant type (Fig. 12, [0059]); and a diffusion region (172 or 174) of the second dopant type above (here up is considered to be in the direction from 162 to 174 or 172 the claim would not necessarily require above to be in any particular direction) the floating well and in electrical contact to the first well (Fig. 12, [0062]), wherein the floating well overlaps with the first well and the diffusion region (they are overlapped in the the direction from 162 to 174 or 172 Fig. 12). Regarding claim 2, Zhan teaches the first dopant type is an n+ dopant and the second dopant type is a p+ dopant (see doping types in claim 1 above). Regarding claim 3, Zhan teaches the first well comprises an internal well resistance ([0051]) electrically connecting to a cathode (190 and 186) and the diffusion region adjacent to the floating well (Fig. 12, [0066]), and further comprising a shallow trench isolation structure 136 directly adjacent to the floating well and the diffusion region (there are no similar structures between 162 or 174 and 136 Fig. 12 so that they are directly adjacent the claim would not necessarily require direct contact) . Regarding claim 4, Zhan teaches a n+ type buried layer 208 below the first well (Fig. 19, [0078]) and a second well 254 of the second dopant type and a third well (structure corresponding to 172 in Fig. 19) of the first dopant type within the first well (Figs. 12 and 19 [0051] and [0062]). Regarding claim 5, Zhan teaches the buried layer is a discontinuous buried layer (208 Fig. 19) split by regions (portions of 235 between 223, 219 and 221 here 116 and 118 are relied upon for the semiconductor material and the embodiment where 214 is p-type is relied upon Figs. 12 and 19, [0045]) of an opposite dopant type to the buried layer (Figs. 12 and 19, [0045]). Regarding claim 9, Zhan teaches a PNPN device ((device made up of Q3 and Q2 including p-well 150, 154 [0051], n-type regions 114, 118 [0046], pwell 144 [0049] and n-region 166 [0061], Fig. 12) connecting to an anode (190 and 184) and electrically connecting to the first well through the n+ type buried layer (Fig. 19). Regarding claim 10, Zhan teaches the PNPN device is a vertical silicon controlled rectifier (SCR) PNPN device (Fig. 19, [0071]). Regarding claim 11, Zhan teaches the first well comprises an internal resistance electrically connecting to the diffusion region adjacent to the floating well and a base ([0051]), with a second diffusion region 169 in the first well connecting to an emitter (Fig. 12, [0059]) and a third diffusion region (164 and 118) connecting to a collector (Fig. 12, [0059]). Regarding claim 12, Zhan teaches a shallow trench isolation structure 136 ([0048]) between the emitter and an n+ well 118 in which is located the third diffusion region connecting to the collector (Fig. 12, [0059]). Claim(s) 1-4, 6-8 and 20 is/are rejected under 35 U.S.C. 102(a)(1)/102(a)(2) as being anticipated by Salcedo et. Al. (US 20140225228 A1 hereinafter Salcedo). Regarding claims 1 and 20, Salcedo teaches in Fig. 6A-6B with associated text a structure comprising: a semiconductor material (91 82e and/or 82a) of a first dopant type (P-type [0085], Fig. 6A-6B); a first well (94a and 84b) comprising a second dopant type (N-type [0085], 6A-6B) in the semiconductor material (Fig. 6A-6B); a floating well 92 in the first well (the floating well is surrounded by the first well Fig. 6A and is therefore interpreted to be in it), the floating well comprising the first dopant type (P-type Fig. 6A-6B, [0085]); and a diffusion region 85c of the second dopant type above the floating well and in electrical contact to the first well (Fig. 6A-6B, [0085]), wherein the floating well overlaps with the first well and the diffusion region (they are overlapped in the direction parallel to the primary surface of the device Fig. 6A-6B). Regarding claim 3, Zhan teaches the first well comprises an internal well resistance (71 as shown in Fig. 5B electrically connecting to a cathode 61 (61 is the N-type cathode terminal of the SCR formed by bipolar transistors 63 and 65 as shown in Fig. 5B [0068]) and the diffusion region (85c is directly connected to the first well 94a Fig. 6B and is therefore connected to the internal well resistance), and further comprising a shallow trench isolation structure 88 directly adjacent to the floating well and the diffusion region (Fig. 6B). . Regarding claim 4, Zhan teaches a n+ type buried layer 89 below the first well (Fig. 6B, [0085]) and a second well 94b of the second dopant type and a third well 82c of the first dopant type within the first well (Figs. 6A-6B [0085]). Regarding claim 6, Zhan teaches an n+ diffusion region 85b within the first well, the n+ diffusion region and the first diffusion region connecting to the cathode (85c is connected to the cathode through the well 94a Fig. 6B and 5B), and a n-buried region 89 below the semiconductor material, a P+ semiconductor substrate 81 below the semiconductor material and the n-buried region and wherein the semiconductor material is epitaxial semiconductor material (Fig. 6B, [0085]). Regarding claim 7, Zhan teaches the shallow trench isolation structure between the n+ diffusion region and the first diffusion region, wherein the n+ diffusion region, the first well and the semiconductor material (here the semiconductor material is interpreted to be 82a form a vertical NPN device 66 and the shallow trench isolation structure extending into the first well, the second well and the third well and overlapping into the semiconductor material (Figs. 5B and 6B). Regarding claim 8, Zhan teaches a diode in series with the internal well resistance, the diode forming between the n+ diffusion region and the first well (the first well having the internal resistance abuts the p-type floating well 92 so that they inherently form a diode (Figs. 6B and 5B). Response to Arguments Applicant's arguments filed 07.27.2026 have been fully considered but they are not persuasive. Regarding the arguments on page 8 Zhan teaches a diffusion region 85c of the second dopant type above (here up is considered to be in the direction from 162 to 174 or 172 the claim would not necessarily require above to be in any particular direction as such devices can be arranged to have any orientation) the floating well and in electrical contact to the first well (Fig. 12, [0062]), wherein the floating well overlaps with the first well and the diffusion region (they are overlapped in the direction from 162 to 174 or 172 Fig. 12 the claim would not necessarily require them to overlap in a direction perpendicular to a primary surface of the device for example). Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to AARON J GRAY whose telephone number is (571)270-7629. The examiner can normally be reached Monday-Friday 9am-4pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Toledo Fernando can be reached on 5712721867. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /AARON J GRAY/Examiner, Art Unit 2897
Read full office action

Prosecution Timeline

Apr 27, 2023
Application Filed
Apr 27, 2026
Non-Final Rejection mailed — §102
Jul 27, 2026
Response Filed
Sep 29, 2026
Final Rejection mailed — §102 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
82%
Grant Probability
99%
With Interview (+29.8%)
2y 6m (~0m remaining)
Median Time to Grant
Moderate
PTA Risk
Based on 521 resolved cases by this examiner. Grant probability derived from career allowance rate.

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