DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Continued Examination Under 37 CFR 1.114
A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 2/6/2026 has been entered.
Response to Amendment
The amendments filed on 2/6/2026 does not put the application in condition for allowance.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
(a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention.
Claim(s) 11-16, and 31-44 is/are rejected under 35 U.S.C. 102a1 and a2 as being anticipated by Skeete (US Pub No. 2018/0226515)
Regarding Claim 11, 31, 37-38, and 44, Skeete et al. teaches an electronic device [Abstract], comprising:
a semiconductor die [124, Fig. 3, 0033] having opposite first and second sides [first side is toward the top, and the second side is toward to bottom] , a semiconductor layer [100, Fig. 3, 0021] extending to the first side [Fig. 3], a circuit component in the semiconductor layer [thermostat functionality can be integrated into semiconductor die, 0036], a metallization structure [222, 212, 262, and 272, Fig. 3, 0034] extending from the semiconductor layer to the second side, and a thermoelectric cooler [310, Fig. 3, 0025], the thermoelectric cooler including a thermal channel [304 and 300, Fig. 3, 0022] configured to control a temperature of the circuit component [0036],
a conductive control terminal [inner 230, Fig. 3, see annotated figure below, 0019-0020] along the second side, and a conductive reference terminal [outer 230, Fig. 3, see annotated figure below, 0019-0020] that laterally surrounds the conductive control terminal [inner 230, Fig. 3, see annotated figure below, 0019-0020] along the second side [Fig. 3];
a conductive lead [340, Fig. 3, 0027] coupled to the circuit component of the semiconductor die [124, Fig. 3, 0033]; and
a package structure [264, Fig. 3, 0027] that encloses a portion of the semiconductor die [124, Fig. 3, 0033].
Examiner used circles to show conductive control terminal, and rectangles to show conductive reference terminals
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Regarding Claim 12, 32, and 39, Skeete et al. is relied upon for the reasons given above, Skeete et al. teaches wherein:
the conductive reference terminal is a first conductive bump along the second side; and
the conductive control terminal is a second conductive bump along the second side [See rejection above, 0019-0020].
Regarding Claim 13, 33, and 40, Skeete et al. is relied upon for the reasons given above, Skeete et al. teaches wherein the thermal channel includes an array of further conductive bumps [See each 301, 306, and 308, Fig. 3, 0022-0023] spaced apart from one another along the second side and arranged in rows along a first direction and columns along an orthogonal second direction [Fig. 3, 0048, the device of Skeete et al. would have a three-dimensional shape];
the array of further conductive bumps laterally surrounds the conductive control terminal along the second side [some of the conductive bumps laterally surround the conductive control terminals in a plan view]; and
the conductive reference terminal laterally surrounds the array of further conductive bumps along the second side [See figure 3, 0033, some of the conductive reference terminals laterally surround the array further conductive bumps in a plan view]
Regarding Claim 14, 34, and 41, Skeete et al. is relied upon for the reasons given above, Skeete et al. teaches wherein:
the thermal channel includes a conductive lattice structure along the second side [300 and 304, Fig. 3, are in series with alternative conductivities, forming a conductive lattice];
the conductive lattice structure laterally surrounds the conductive control terminal along the second side [a portion of the conductive lattice laterally surrounds the conductive control terminal in a plan view]; and
the conductive reference terminal laterally surrounds the conductive lattice structure along the second side [a portion of the reference terminal laterally surrounds the conductive lattice in a plan view]
Regarding Claim 15, 35, and 42, Skeete et al. is relied upon for the reasons given above, Skeete et al. teaches wherein: the thermal channel [300 and 304, Fig. 3, 0044] includes an array of conductive bumps [301 and 308, Fig. 3, 0022-0023] spaced apart from one another along the second side and arranged in rows along a first direction and columns along an orthogonal second direction [Fig. 3, 0048, the device of Skeete et al. would have a three-dimensional shape];
the array of conductive bumps laterally surrounds the conductive control terminal along the second side [See annotated figure above, some of the array of conductive bumps surround the conductive control terminal in a plan view]; and
the conductive reference terminal laterally surrounds the array of conductive bumps along the second side [See annotated figure above, some of the conductive reference terminal laterally surrounds the array of conducive bumps along the second side in a plan view]
Regarding Claim 16, 36, and 43, Skeete et al. is relied upon for the reasons given above, Skeete et al. teaches wherein:
the thermal channel includes a conductive lattice structure along the second side [300 and 304, Fig. 3, are in series with alternative conductivities, forming a conductive lattice];
the conductive lattice structure laterally surrounds the conductive control terminal along the second side [See annotated figure above, some of the conductive lattice structure laterally surrounds the conductive control terminal in a plan view]; and
the conductive reference terminal laterally surrounds the conductive lattice structure along the second side [See annotated figure above, some of the conductive reference terminal laterally surrounds the conductive lattice structure along the second side in a plan view].
Response to Arguments
Applicant's arguments filed 2/6/2026 have been fully considered but they are not persuasive. Examiner respectfully disagrees.
Regarding the arguments about reference number 100 is a substate and not a layer, and substrate 100 as being more than one layer. Examiner notes the claim limitations does not require the semiconductor layer as being only one layer, the semiconductor layer is open to being made of more than one layer.
Regarding the arguments about the circuit components, Skette et al. teaches current through TEC 310 is controlled by semiconductor die 124. Semiconductor die 124 receives feedback from a temperature image sensor on image sensor IC 324 [0036] and the thermostat functionality can be integrated into image sensor IC 324, semiconductor die 124, or a separate temperature controller chip may be included as part of package 372 [0036].
The interpretation of the conductive control terminal and the conductive reference terminals are consistent with the specification.
Regarding the arguments about Claim 13, Skeete et al. teaches wherein the thermal channel includes an array of further conductive bumps [See each 301, 306, and 308, Fig. 3, 0022-0023] spaced apart from one another along the second side and arranged in rows along a first direction and columns along an orthogonal second direction [Fig. 3, 0048, the device of Skeete et al. would have a three-dimensional shape];
the array of further conductive bumps laterally surrounds the conductive control terminal along the second side [some of the conductive bumps laterally surround the conductive control terminals in a plan view]; and
the conductive reference terminal laterally surrounds the array of further conductive bumps along the second side [See figure 3, 0033, some of the conductive reference terminals laterally surround the array further conductive bumps in a plan view]
Regarding the arguments about Claim 14, Skeete et al. teaches wherein:
the thermal channel includes a conductive lattice structure along the second side [300 and 304, Fig. 3, are in series with alternative conductivities, forming a conductive lattice];
the conductive lattice structure laterally surrounds the conductive control terminal along the second side [a portion of the conductive lattice laterally surrounds the conductive control terminal in a plan view]; and
the conductive reference terminal laterally surrounds the conductive lattice structure along the second side [a portion of the reference terminal laterally surrounds the conductive lattice in a plan view]
Regarding the arguments about Claim 15, Skeete et al. teaches wherein: the thermal channel [300 and 304, Fig. 3, 0044] includes an array of conductive bumps [301 and 308, Fig. 3, 0022-0023] spaced apart from one another along the second side and arranged in rows along a first direction and columns along an orthogonal second direction [Fig. 3, 0048, the device of Skeete et al. would have a three-dimensional shape];
the array of conductive bumps laterally surrounds the conductive control terminal along the second side [See annotated figure above, some of the array of conductive bumps surround the conductive control terminal in a plan view]; and
the conductive reference terminal laterally surrounds the array of conductive bumps along the second side [See annotated figure above, some of the conductive reference terminal laterally surrounds the array of conducive bumps along the second side in a plan view]
Regarding the arguments about Claim 16, Skeete et al. teaches wherein:
the thermal channel includes a conductive lattice structure along the second side [300 and 304, Fig. 3, are in series with alternative conductivities, forming a conductive lattice];
the conductive lattice structure laterally surrounds the conductive control terminal along the second side [See annotated figure above, some of the conductive lattice structure laterally surrounds the conductive control terminal in a plan view]; and
the conductive reference terminal laterally surrounds the conductive lattice structure along the second side [See annotated figure above, some of the conductive reference terminal laterally surrounds the conductive lattice structure along the second side in a plan view].
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to MICHAEL Y SUN whose telephone number is (571)270-0557. The examiner can normally be reached 9AM-7PM.
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/MICHAEL Y SUN/Primary Examiner, Art Unit 1728