Prosecution Insights
Last updated: April 19, 2026
Application No. 18/308,618

LIGHT-EMITTING DEVICE AND LIGHT-EMITTING MODULE

Non-Final OA §102§103§112
Filed
Apr 27, 2023
Examiner
MUNDI, JASMIN KAUR
Art Unit
2828
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Nichia Corporation
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds
2y 6m
To Grant

Examiner Intelligence

Grants only 0% of cases
0%
Career Allow Rate
0 granted / 0 resolved
-68.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
6 currently pending
Career history
6
Total Applications
across all art units

Statute-Specific Performance

§103
61.1%
+21.1% vs TC avg
§102
11.1%
-28.9% vs TC avg
§112
27.8%
-12.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§102 §103 §112
Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Priority Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55. Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application JP 2022-079881, filed on 05/17/2022. Translation of the certified copy is required to perfect the priority claim made for this application. Acknowledgment is made of applicant’s claim for foreign priority under 35 U.S.C. 119 (a)-(d). The certified copy has been filed in parent Application JP 2022-075624, filed on 04/30/2022. Translation of the certified copy is required to perfect the priority claim made for this application. Information Disclosure Statement The information disclosure statement (IDS) which we application on 04/27/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention. Claims 8 and 10 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 8 recites the limitation "a plurality of the submounts" in line 46. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this limitation will be read as “a plurality of submounts”. Claim 10 recites the limitation "the same outer shape” in line 65. There is insufficient antecedent basis for this limitation in the claim. For purposes of examination, this limitation will be read as “a same outer shape”. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim 1 is rejected under 35 U.S.C. 102(a)(1) as being anticipated by Inoue et al. (U.S. Patent Application No. 2013/0240942), hereinafter Inoue. PNG media_image1.png 659 1171 media_image1.png Greyscale Annotated Fig. 14A-I PNG media_image2.png 736 1263 media_image2.png Greyscale Annotated Fig. 14A-II PNG media_image3.png 737 1177 media_image3.png Greyscale Annotated Fig. 14A-III PNG media_image4.png 777 1402 media_image4.png Greyscale Annotated Fig. 14A-IV Regarding Claim 1, Inoue teaches a light-emitting device (paragraph [0002]) comprising: a submount (Figs. 14A-B, mounting substrate “101”) having a mounting surface (Figs. 14A-B, top surface of mounting substrate “101”), the submount including wiring patterns (Figs. 14A-B, interconnect electrodes “102”) arranged on the mounting surface, the wiring patterns including a first region and a second region connected to the first region at a first position on the mounting surface (Annotated Fig. 14A-I, top left corner of the semiconductor laser element); a semiconductor laser element (Fig. 14A-B, “100) disposed on the first region of the wiring patterns (Annotated Fig. 14A); and a protective element (Figs. 14A-B, “121”) disposed on the second region of the wiring patterns (Annotated Fig. 14A-I); a width of the first region of the semiconductor laser element in the first direction is greater than a width of the semiconductor laser element and equal to or less thana first distance (see explanation below); a length of the first region of the wiring patterns in a second direction; Fig. 14A, second direction a-axis) between the first position and a distal end of the first region (Annotated Fig. 14A-III, see explanation below) is a second distance (Annotated Fig. 14A-III), the second direction being perpendicular to the first direction (Fig. 14A see a-axis and c-axis), the second region is arranged on an opposite side of the first region with respect to the first position in a top view (Annotated Fig. 14A-I); a maximum width of the second region in the first direction is greater than the width of the first region in the first direction at the first position (see explanation below) and an interval in the second direction between the semiconductor laser element and the protective element is greater than 0 µm and less than 170 µm (Fig. 6B, for length L = 200 µm and thickness T= 10 µm of the semiconductor laser element the minor radius β along a-axis defining the distance to the protective element is less than 150 µm). Regarding the remaining limitations in Claim 1, we will first show from the teachings of Inoue that a width of the first region of the wiring patterns in a first direction (Annotated Fig. 14A-II) is greater than a width of the semiconductor laser element in the first direction (Annotated Fig. 14A-II, see L) and equal to or less than a first distance. Inoue teaches the major axis radius α = 2   L 2 + 2 T L π and minor axis radius β =   L 2 + 2 T L π where T is the thickness of the semiconductor laser element and L is its side length respectively (paragraph [0145]). For T and L Inoue provides T ≤ 150 µm , and 200 µm ≤ L ≤1000 µm (paragraph [0154]) and presents values of α and β when T = 10 µ m ,   100   µ m ,   and 200   µ m (Fig. 6A-B). The Examiner considers T = 10 µ m and L = 200 µm until further modified. From this it follows α = 237   µ m and β = 118   µ m when rounded to the nearest whole. As presented in Annotated Fig. 14A-I, the Examiner considers the first and second regions bound by the light intensity ellipse with major axis radius α (along c-axis) and minor axis β (along the a-axis). As in Annotated Fig. 14A-II, for examination purposes the width of the first region in the first direction is the measure of the line segment starting at the midpoint of the top horizontal edge of the semiconductor laser element, and ending at the lower boundary of the ellipse along the major axis diameter. Thus, the width of the first region of the wiring patterns in the first direction being used for examination is α + L 2 which for α = 237   µ m ,     L = 200   µ m , is 337 µm. Note that any other such width of the first region of the wiring patterns in the first direction is less than the width of the first region of the wiring patterns in the first direction used for examination purposes. Inoue teaches that the sides of the semiconductor light element are of length L such that the Examiner considers the width of the semiconductor laser element in the first direction as L = 200   µ m . We take the first distance to be the width of the first region of the wiring pattern in the first direction being used for examination purposes, i.e. 337 µm. Therefore, the width of the first region in a first direction 337   µ m   is greater than a width of the semiconductor laser element in the first direction L= 200 µm and equal to a first distance of 337 µm. Since any other such width of the first region of the wiring patterns in the first direction is less than the width of the first region of the wiring patterns in the first direction used for examination purposes, any other width of the first region of the wiring patterns in the first direction besides that used for examination purposes would be less than the first distance 337 µm. Altogether, the teachings of Inoue show a width of the first region of the wiring patterns in a first direction is greater than a width of the semiconductor laser element in the first direction and can be equal to or less than a first distance. Secondly, from the teachings of Inoue there is provided a distance from a first position (Annotated Fig. 14A-III , the center of the left vertical edge of the semiconductor laser element) out to the distal end of the first region that is a second distance (Annotated Fig. 14A-III). Lastly, we will show from the teachings of Inoue that the maximum width of the second region in the first direction is greater than the width of the first region in the first direction at the first position. As depicted in Annotated Figure 14A-IV are the following points: boundary point P, boundary point Q, first position R, point S, and origin O (0,0). Additionally, the Examiner considers the measure of the line segment P Q - as the maximal width of the second region in the first direction, and the measure R S - as the width of the first region in the first direction at the first position. The Examiner considers T = 200 µ m   (Fig. 6A-B), and L = 200 µm (paragraph [0154]), Fig. 6A-B) until further modified. From this it follows α = 391   µ m and β = 195   µ m when rounded to the nearest whole, and the coordinate pairs are now boundary point P( - 100   µ m ,   336   µ m ), boundary point Q( - 100 µ m , -   336   µ m ), first position R (0 µ m , 100 µ m ), S ( 100   µ m ,   - 391 µ m ), and the O(0 µ m , 0   µ m ) at the center of the semiconductor laser element. Consider the ellipse formed by the first and second regions and centered about the center of the semiconductor laser element regions in Annotated Fig. 14A- II. Given a major axis radius α= 391 µ m , and minor axis radius β = 195 µ m , the ellipse can be defined by the equation a 2 ( 195   µ m ) 2 +   C 2 ( 391   µ m ) 2 = 1 where 𝕒 and C are the a-axis and c-axis coordinates respectively of any point (𝕒, C ) on the boundary of the ellipse. We can see by substituting the coordinates of P( - 100   µ m ,   336   µ m ) ( - 100 µ m ) 2 ( 195   µ m ) 2 +   ( 336   µ m ) 2 ( 391   µ m ) 2 ≈ 1.001 that P, and by implication Q would be boundary points on the ellipse as defined within the rounding errors of α and β. Then, | P Q - | = 336 µ m + 336 µ m = 672 µ m and R S - = 100 µ m + 391 µ m = 491   µ m when rounded to the nearest whole. Therefore, as shown by the teachings of Inoue, | P Q - | > | R S - | demonstrates the maximum width of the second region in the first direction is greater than the width of the first region in the first direction at a first position. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claims 2, 6, and 7 are rejected under 35 U.S.C. 103 as being unpatentable by Inoue in view of Miura et. al (U.S. Patent Application No. 2020/0235548), hereinafter Miura. Regarding Claim 2, Inoue teaches the device of Claim 1. Inoue teaches a second distance (see explanation below). For purposes of examination the first region considered is the area of the semiconductor laser element, such that the second distance is just the side length L of the semiconductor laser element. (paragraph [0145]), and the length of the semiconductor laser element in the second direction is just the side length of the semiconductor laser element L (paragraph [0145]). Inoue does not teach that the second distance is equal to or more than a value acquired by subtracting a length of a portion of the semiconductor laser element protruding from the mounting surface of the submount such that a light emission surface is spaced apart from the mounting surface in the top view from a length of the semiconductor laser element in the second direction. Miura teaches a portion of the length of the semiconductor laser element protruding from the mounting surface of the submount (Fig. 4, see top horizontal edge of semiconductor laser element “31” spaced apart from the top horizontal edge of submount underneath it by some length) such that a light emission surface is spaced apart in the top view (Fig. 4, see top horizontal edge of semiconductor laser element “31” spaced apart from the top horizontal edge of submount underneath it) from a length of the semiconductor laser element in the second direction (Fig. 4, direction parallel to the vertical edges of the semiconductor laser element). Thus, the second distance is more than the value acquired by subtracting the length of the protrusion of the semiconductor laser element from the length of the semiconductor laser element in the second direction, i.e., subtracting the length of the protrusion of the semiconductor laser element from the second distance. It would have been obvious before the effective filing date of the claimed invention to modify the teachings of Inoue by protruding the semiconductor laser element from the submount as taught by Miura, yielding the predictable result that the dimensions of the semiconductor laser element and submount in the direction of the protrusion increases without increasing the dimension of the submount. This would provide a larger interval for the protective element which as taught by Miura (Abstract) is placed on a light traveling side of the of the laser light with respect to the emitting end surface of the semiconductor laser element. Regarding Claim 6, Inoue as modified by Miura teaches the device of Claim 2. Inoue teaches an interval in the second direction between the semiconductor laser element and the protective element (Fig. 14A, β, see explanation below) is in a range (Fig. 6B). Inoue further teaches a major radius α and minor radius β define an ellipse representing the light intensity which is centered at the center of the semiconductor light element, where the major radius α is along the c-axis and minor radius β is along the a-axis. (Fig. 14A); that the length of the semiconductor laser element can be used to control the measures of the major radius α and minor radius β (paragraph [0076]); that the protective element is placed along the a-axis and is astride the interior and exterior of the ellipse (paragraph [0236], Fig 14A); that the length of the semiconductor laser element is directly proportional to the minor radius β, such that increasing the length of the semiconductor laser element increases its interval β to the protective element along the a-axis direction (Fig. 6B); that when T < L, β is less than when T = L (Fig. 6B). From these teachings the Examiner considers the minor radius β as an interval between the semiconductor laser chip and protective element, in a second direction (a-axis direction, Fig. 14A). Inoue does not teach that the interval in the second direction between the semiconductor laser element and the protective element is within an interval of 50 to 100 µm. From the teachings of Inoue, the interval β between the semiconductor laser element and the protective element is a result-effective variable, as decreasing β can be done maximally when T < L, such that the proportion of high polarization region (paragraph [0155]; Fig. 14A, region “2”) to low polarization region (paragraph [0156]; Fig. 14A, region “3”) of the light intensity ellipse can be controlled (paragraph [0152]). Thus, the interval between the protective element and semiconductor laser element can be minimized so that the light ellipse is substantially high polarization region (paragraph [0152], case of T < L). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the interval between the semiconductor laser element and the protective element as a result-effective variable. Furthermore, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at an interval of 50 to 100 µm, in order to place the protective element astride the outside of the light-intensity ellipse and a low polarization region inside the ellipse on the surface of the light-emitting device as taught by Inoue (paragraph [0156]) with substantially high polarization on the surface on the light-emitting device. See MPEP 2144.05. Regarding Claim 7, Inoue as modified by Miura teaches the device of Claim 2. Inoue teaches an interval in the second direction between the semiconductor laser element and the protective element (Fig. 14A, β, see explanation below) is in a range (Fig. 6B). Inoue further teaches a major radius α and minor radius β define an ellipse representing the light intensity which is centered at the center of the semiconductor light element, where the major radius α is along the c-axis and minor radius β is along the a-axis. (Fig. 14A); that the length of the semiconductor laser element can be used to control the measures of the major radius α and minor radius β (paragraph [0076]); that the protective element is placed along the a-axis and is astride the interior and exterior of the ellipse (paragraph [0236], Fig 14A); that the length of the semiconductor laser element is directly proportional to the minor radius β, such that increasing the length of the semiconductor laser element increases its interval β to the protective element along the a-axis direction (Fig. 6B); that when T < L, β is less than when T = L (Fig. 6B). From these teachings the Examiner considers the minor radius β as an interval between the semiconductor laser chip and protective element, in a second direction (a-axis direction, Fig. 14A). Inoue does not teach that the interval in the second direction between the semiconductor laser element and the protective element is within an interval of greater than 0 µm and 80 µm or less. From the teachings of Inoue, the interval β between the semiconductor laser element and the protective element is a result-effective variable, as decreasing β can be done maximally when T < L, such that the proportion of high polarization region (paragraph [0155]; Fig. 14A, region “2”) to low polarization region (paragraph [0156]; Fig. 14A, region “3”) of the light intensity ellipse can be controlled (paragraph [0152]). Thus, the interval between the protective element and semiconductor laser element can be minimized so that the light ellipse is substantially high polarization region (paragraph [0152], case of T < L). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to vary, through routine optimization, the interval between the semiconductor laser element and the protective element as a result-effective variable. Furthermore, one of ordinary skill in the art would have had a reasonable expectation of success to arrive at an interval of greater than 0 µm and 80 µm or less, in order to place the protective element astride the outside of the light-intensity ellipse and a low polarization region inside the ellipse on the surface of the light-emitting device as taught by Inoue (paragraph [0156]) with substantially high polarization on the surface on the light-emitting device. See MPEP 2144.05. Claim 5 and 8 are rejected under 35 U.S.C. 103 as being unpatentable by Inoue, in view of Nakagaki et al. (U.S. Patent Application No. 2020/0227888), hereinafter Nakagaki. PNG media_image5.png 490 725 media_image5.png Greyscale Annotated Fig. 5 Regarding Claim 5, Inoue teaches the device of Claim 1. Inoue appears to teach that the protective element has a length in the second direction (Annotated Fig. 14A-I, horizontal edges of the protective element “121”) less than the width of the semiconductor laser element (Annotated Fig. 14A-I, horizontal edges of the semiconductor laser element “100”), but does not clearly disclose it. Inoue does not teach that the protective element has a width in the first direction greater than the width of the semiconductor laser element. Nakagaki appears to teach that the protective element has a width in the first direction (Annotated Fig. 5, edge parallel to the first direction of the protective element present on the right of the semiconductor laser element “170”) greater than the width of the semiconductor laser element (Annotated Fig. 5, edge parallel to the first direction of semiconductor laser element “170”), but does not clearly disclose it. Modifying a device size without clearly changing its function has been found to be obvious (see MPEP 2144.04 IV). Therefore it would have been obvious before the effective filing date of the claimed invention to modify the device of Inoue with the teachings of Nakagaki, so that the protective element has both a width in the first direction greater than the width of the semiconductor laser element and a length in the second direction less than the width of the semiconductor laser element as each reference has demonstrated the approximate teachings of, and in light of MPEP 2144.04 IV it would be obvious to modify the sizes to obtain device sizes to fit the given packaging dimensions. PNG media_image6.png 541 721 media_image6.png Greyscale Annotated Fig. 4 Regarding Claim 8, Inoue as modified by Nakagaki teaches the device of Claim 1. Nakagaki further teaches a plurality of the submounts including the submount (Fig. 4, “160” ), the plurality of the submounts are disposed side by side in the first direction (Annotated Fig. 4-I, “160”) ; a plurality of semiconductor laser elements including the semiconductor laser element (Fig. 4, “170”), the plurality of semiconductor laser elements being respectively disposed on the plurality of submounts (Fig. 4); and a plurality of protective elements including the protective element (Fig. 4, 175”), the plurality of protective elements being respectively disposed on the plurality of submounts (Fig. 4). It would have been obvious before the effective filing date of the claimed invention to: add more semiconductor laser elements in the device of Inoue as taught by Nakagaki to increase the light output of the device; add more protective elements in the device of Inoue as taught by Nakagaki to protect each of the additional semiconductor light elements; add more submounts in the device of Inoue as taught by Nakagaki to help heat sink each of the additional semiconductor laser elements. Claim 3 is rejected under 35 U.S.C. 103 as being unpatentable by Inoue, in view of Enomoto et al. (U.S. Patent Application 2023/0108294), hereinafter Enomoto. Regarding Claim 3, Inoue teaches the device of Claim 1. Inoue does not teach that the protective element is disposed in a position not passed by an imaginary line that passes through a light-emitting point of the semiconductor laser element and that is parallel to the second direction in the top view. Enomoto teaches that the protective element is disposed in a position not passed by an imaginary line that passes through a light-emitting point of the semiconductor laser element and that is parallel to the second direction in the top view (Fig. 13D, protective element “50”, imaginary line “L2”, light-emitting element “20”). It would have been obvious to someone having ordinary skill in the art before the effective filing date of the claimed invention to dispose the protective element in such a way as taught by Enomoto in the light-emitting device as taught by Inoue in order to reduce the overall size of the light-emitting structure as taught by Enomoto (paragraph [0146]). Claims 9-10 are rejected under 35 U.S.C. 103 as being unpatentable by Inoue, in view of Kozuru (U.S. Patent Application No. 2020/0194974, applicant provided prior art). Regarding Claim 9, Inoue teaches the device of Claim 1. Inoue does not teach the configuration of that device into a light-emitting module comprising: a first light-emitting device including a first package and including a plurality of first semiconductor laser elements including the semiconductor laser element a second light-emitting device including a second package and including one or more second semiconductor laser elements; and a wiring substrate on which the first light-emitting device and the second light- emitting device are mounted, wherein a number of the second semiconductor laser elements in the second light-emitting device is less than a number of the first semiconductor laser elements in the first light- emitting device. Kozuru teaches a light-emitting module comprising: a first light-emitting device including a first package (paragraph [0061]), and including a plurality of first semiconductor laser elements including the semiconductor laser element (paragraph [0061]); a second light-emitting device including a second package (paragraph [0061]), and including one or more second semiconductor laser elements (paragraph [0061]); and a wiring substrate on which the first light-emitting device and the second light-emitting device are mounted (paragraph [0138], “mounting substrate” having “connection patterns”), wherein a number of the second semiconductor laser elements in the second light-emitting device is less than a number of the first semiconductor laser elements in the first light-emitting device (Abstract). It would have been obvious to someone having ordinary skill in the art before the effective filing date of the claimed invention to: utilize the device as taught by Inoue and in the module as taught by Kozuru for the benefit of emitting multiple wavelengths of light, each from a distinct source device and increasing the overall light output of the light-emitting structure; to use specifically two of the light-emitting devices of Inoue in the module as taught by Kozuru for the benefit of dual-color emission if emitting at different wavelengths and better thermal management by distributing the light output if emitting one wavelength across two devices; to use less semiconductor light-emitting elements in one light-emitting device than another device in the module for the benefit of balancing the external quantum efficiencies of different colors of light, or to reduce heat density in part of the module when both devices are emitting the same light; adding packaging to the light-emitting device of Inoue in the module as taught by Kozuru for the benefit of additional heat dissipation for each of the individual light-emitting devices, as the wiring substrate helps heat sink both of them. Regarding Claim 10, Inoue and Kozuru teaches the device of Claim 9. Kozuru further teaches that the first package and the second package have the same outer shape. (paragraph [0062]). It would have been obvious before the effective filing date of the claimed invention for the packages of each device in the module of Inoue and Kozuru to have the same shape as further taught by Kozuru for the benefit of having the connection patterns of each light-emitting device including each package to the wiring substrate be identical. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable by Inoue and Kozuru, in view of Arik et al. (NPL, “Thermal Management of LEDs: Package to System”), hereinafter Arik. Regarding Claim 11, Inoue and Kozuru teaches the device of Claim 9. Kozuru further teaches that the first light-emitting device includes a plurality of first submounts including the submount (paragraph [0061]), and the first semiconductor laser elements are respectively disposed on the plurality of first submounts (Figs. 3A-B, submounts “23”, semiconductor laser elements “22”), and the second light-emitting device includes one or more second submounts (paragraph [0061]), and the one or more semiconductor laser elements are respectively disposed on the one or more second submounts (Figs. 2A-B, submounts “23”, semiconductor laser elements “22”). It would have been obvious before the effective filing date of the claimed invention to: add more semiconductor laser elements in the device of Inoue and Kozuru as further taught by Kozuru to increase the light output of the device; add more first submounts and second submounts in the module of Inoue and Kozuru as further taught by Kozuru, to help heat sink the additional first semiconductor laser elements in the first device and additional second semiconductor laser elements in the second device of the module. Inoue and Kozuru do not teach that the first and second submounts are different shapes. Arik teaches different submount shapes are already familiar in the art as related to the thermal stress management of the semiconductor laser element (Fig 8. left image with chip LED on square submount, right image with chip LED on octagon submount). It would have been obvious before the effective filing date of the claimed invention to modify the module of Inoue and Kozuru so that the first submounts and second submounts are different shapes as taught by Arik, in order to make each light-emitting device fit better in its packaging. In re Dailey, 357 F.2d 669, 149 USPQ 47 (CCPA 1966) establishes precedent that such a change in the shape was a matter of choice which a person having ordinary skill in the art would have been found obvious. See MPEP 2144.04. Allowable Subject Matter Claims 4 & 12 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. The following reference teaches a similar light-emitting device with electrically connected semiconductor light elements and protective elements: Kozuru et al. US 2020/0264500 Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASMIN KAUR MUNDI whose telephone number is (571)272-9755. The examiner can normally be reached Monday - Thursday, 8a.m. - 6 p.m. ET. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, MinSun Harvey can be reached at (571) 272-1835. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /J.K.M./Examiner, Art Unit 2828 /TOD T VAN ROY/Primary Examiner, Art Unit 2828
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Prosecution Timeline

Apr 27, 2023
Application Filed
Feb 05, 2026
Non-Final Rejection — §102, §103, §112
Mar 25, 2026
Interview Requested
Apr 08, 2026
Examiner Interview Summary
Apr 08, 2026
Applicant Interview (Telephonic)

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