DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 2, 4, 5, 7-9, 11 and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Chinese document CN214281372U (see machine translation).
Re claim 1, the document discloses a wireless battery module monitoring system having, at least a flexible printed circuit (FPC) (para n0089) including: a first insulating layer (para n0021, n0073); and a conductive layer (para n0021 and n0086-n0087) defining a plurality of traces arranged in a first predetermined pattern (traces in predetermined pattern are inherent features of circuit board. They connect components, are conductive and are laid in pattern); a battery module monitoring circuit 20 connected to at least one of the plurality of traces of the FPC; a wireless transceiver 201 (para n0076) connected to at least one of the plurality of traces of the FPC at a location remote from the battery module monitoring circuit; and an antenna 1013 connected to the wireless transceiver (para n0076, n0086). [battery monitor unit 20 is disposed on separate circuit boards (i.e. remote location) as first and second antenna (para n0075-n0077).
Re claims 2 and 9, the document further discloses the antenna is one of: mounted on the FPC and connected to the wireless transceiver; and implemented by at least one of the plurality traces of the conductive layer of the FPC and connected to the wireless transceiver (para n0076, n0086 and n0089).
Re claims 4 and 11, the document further discloses the FPC includes a second insulating layer, and the conductive layer is arranged between the first insulating layer and the second insulating layer (para n0087: The second layer is disposed between the first layer and the third layer. The first layer and the third layer are insulating layers. The second layer is a circuit layer).
Re claim 5, the document further discloses a measuring circuit arranged on the FPC, connected to at least one of the plurality of traces and to the battery module monitoring circuit, and configured to measure at least one of module voltage, cell voltage, cell temperature and impedance (para 0024: the battery monitoring unit further includes an analog front-end chip, a second main control chip, a second wireless transceiver chip, and a second multiplexer. The analog front-end chip collects battery pack status information of at least one battery pack and generates a battery pack status signal; para n0026: the battery pack status information includes the voltage of each battery in the battery pack and/or the battery pack temperature).
Re claim 7, the document further discloses a battery enclosure including a plurality of battery cells (para n002); a frame; and the wireless battery module monitoring system of claim 1 arranged on the frame in the battery enclosure (para n0075).
Re claim 8, the document disclose a wireless battery module monitoring system having, inter alia, a first printed circuit board (PCB) (para n0013 and n0086); a battery module monitoring circuit arranged on the first PCB (para n0013); a first flexible printed circuit (FPC) including a first insulating layer and a first conductive layer (para n0086 and 0089)defining a plurality of first traces arranged in a first predetermined pattern (traces in predetermined pattern are inherent features of circuit board. They connect components, are conductive and are laid in pattern), a wireless transceiver arranged on the first FPC at a location remote from the first PCB, and connected to at least one of the plurality of first traces; and an antenna connected to the wireless transceiver (para n0076 and n0086). [battery monitor unit 20 is disposed on separate circuit boards (i.e. remote location) as first and second antenna (para n0075-n0077).
Re claim 19, the document further discloses a plurality of battery cells (para n002); a frame; a battery enclosure; and the wireless battery module monitoring system of claim 8 arranged on the frame in the battery enclosure (para n0075).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 3, 6, 10 and 12-18 are rejected under 35 U.S.C. 103 as being unpatentable over Chinese document CN214281372U (see machine translation).
Re claims 3, 10 and 17, the document is silent on the traces being milled. It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have shaped the trace with any metal working method including laser cutting, waterjet cutting, milling etc. since it has been held to be within the general skill of a worker in the art to select a known materiale on the basis of its suitability for the intended use as a matter of obvious design choice.
Re claims 6 and 16, the document is silent on having one of trace of the conductive layer connected to at least one of busbar, cell busbar or temperature sensor. Official notice taken of the fact that having a conductive layer connected to the busbar would create a ground for the circuit. It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have included a connection to a ground such as a busbar to ensure proper grounding for a circuit.
Re claim 12, the document does not disclose the first PCB is arranged adjacent to the edge of the first FPC and is connected to one pad of the PCB (a pad is an inherent feature of circuit boards where terminal points/leads are terminus for traces). It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have two or more circuit boards be arranged on the edge or adjacent to each other since it has been held that rearranging parts of an invention involves only routine skill in the art.
Re claim 13, the document does not disclose the first PCB is mounted above the first FPC and is soldered to one of the traces. It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have two or more circuit boards be arranged on top or in any position with respect to each other since it has been held that rearranging parts of an invention involves only routine skill in the art.
Re claim 14, the document further discloses a measuring circuit arranged on the first PCB+, connected to at least one of the plurality of traces and to the battery module monitoring circuit, and configured to measure at least one of module voltage, cell voltage, cell temperature and impedance (para n0024: the battery monitoring unit further includes an analog front-end chip, a second main control chip, a second wireless transceiver chip, and a second multiplexer. The analog front-end chip collects battery pack status information of at least one battery pack and generates a battery pack status signal; para n0026: the battery pack status information includes the voltage of each battery in the battery pack and/or the battery pack temperature).
Re claim 15, the document is silent on having a second FPC including a second insulating layer and second conducting layer defining a plurality of second traces arranged in a second predetermined pattern, wherein at least one of the plurality of second traces defines a resistor connected to at least one pad of the first PCB. Official notice is taken of the fact that having multiple FPCs would allow for different or common grouping of components into their own FPC for easy replacement. It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have multiple circuit boards for grouping common components together and since it has been held that mere duplication of the essential working parts of a device involves only routine skill in the art. In addition, official notice is taken of the fact that having a resistor connected to a pad of the traces on the PCB would allow for design flexibility or preventing damage to the circuit board. It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have included a resistor to one of the pads of the FPC to prevent any damage to the board from overvoltage or short.
Re claim 18, the document is silent on having the wireless transceiver mounted on a second PCB attached to the first FPC. It would have been well within the skill of one versed in the art, before the effective filing date of the claimed invention, to have mounted the wireless transceiver on any circuit board since it has been held that rearranging parts of an invention involves only routine skill in the art.
Conclusion
Any inquiry concerning this communication should be directed to the Examiner at the below-listed number. The Examiner can normally be reached on Mon-Thu from 7:00am-5:00pm.
The Examiner’s SPE is Taelor Kim and he can be reached at 571.270.7166. The fax number for the organization where this application is assigned is 571.273.8300.
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/EDWARD TSO/Primary Examiner, Art Unit 2859 571.272.2087