Prosecution Insights
Last updated: July 17, 2026
Application No. 18/308,902

INNER-LOOP CONTROL FOR MULTI-LEVEL CONVERTER

Non-Final OA §103
Filed
Apr 28, 2023
Examiner
AHMAD, SHAHZEB K
Art Unit
2838
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Cirrus Logic International Semiconductor Ltd.
OA Round
3 (Non-Final)
80%
Grant Probability
Favorable
3-4
OA Rounds
0m
Est. Remaining
84%
With Interview

Examiner Intelligence

Grants 80% — above average
80%
Career Allowance Rate
308 granted / 387 resolved
+11.6% vs TC avg
Minimal +5% lift
Without
With
+4.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 3m
Avg Prosecution
17 currently pending
Career history
400
Total Applications
across all art units

Statute-Specific Performance

§101
0.3%
-39.7% vs TC avg
§103
76.0%
+36.0% vs TC avg
§102
11.2%
-28.8% vs TC avg
§112
6.8%
-33.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 387 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments The Applicant has not amended the claims and rather presented a set of arguments pointing out their rationale of why they believe the prior art references presented by the Examiner do not teach the currently recited claim limitations. Applicant's arguments filed on 01/06/2026 have been fully considered but they are not persuasive. The Applicant presents the argument that Zhang (US 2015/0163882 A1) in view of Wang (US 2019/0369183 A1) does not teach the limitations of “a loop filter configured to… correct for unmodeled errors in the feedback current measurement signal to generate the control parameter” and “a first feedforward block configured to generate a first offset to the control parameter based on a slew rate of the reference current signal.” recited in claim 1 and similarly recited in claim 10. The Applicant has presented six arguments within their set of arguments presented which have been reproduced below one by one and addressed accordingly. The first argument presented by the Applicant is seen on page 7 of the submitted remarks and is reproduced below: The Office Action alleges that Zhang teaches "a loop filter configured to ... correct for unmodeled errors in the feedback current measurement signal to generate the control parameter." However, this is not the case. Zhang does not disclose "correct for unmodeled errors in the feedback current measurement signal" with a loop filter that generates the control parameter defining the converter's state sequence. Zhang's controller includes an error computation unit, a regulation unit, a feedforward compensation unit, and an addition unit. The regulation unit outputs a regulation signal based on the difference between a reference current signal (IREF) and a feedback signal (IS), and the feedforward unit outputs a signal based on IREF. Nothing in Zhang identifies unmodeled measurement errors (e.g., estimation bias, cycle-averaged ripple) in the feedback current measurement, nor does Zhang's regulation unit "correct" those errors in a manner that produces the converter's control parameter. The claimed loop filter's express function is more than generic proportional-integral regulation; it is a filter response that uses feedback to compensate for unmodeled measurement error before generating the control parameter that "defines a state sequence of a power converter." The Examiner respectfully disagrees and would like to start off by pointing out that although the claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). Based on that the claims are given and interpreted under the broadest reasonable interpretation (BRI). Zhang discloses a control loop in which a feedback current signal is compared with a reference current signal and a regulation signal is generated based on the resulting error. Such feedback control loops inherently compensate for variations, disturbances, and inaccuracies in the measured signal which includes noise, ripple, bias and other unmodeled effects. In the immediate case of Zhang, the control loop compensates for regulation issues and ensuring an ample output is outputted. Under the BRI, the claimed limitation “correcting for unmodeled errors” encompasses the inherent operation of a feedback loop that processes a measured signal to reduce deviation from a reference. The claim as currently recited does require explicit identification or modeling of specific error sources, nor does it recite a particular filtering structure beyond a functional result. The second argument presented by the Applicant is seen on page 7 of the submitted remarks and is reproduced below: Zhang's disclosure of generating a "control signal" to adjust an operating frequency or duty cycle for an LED driver is not the same as the claimed loop filter correcting measurement error to produce the control parameter D that deterministically sequences converter states at fixed frequency. The Examiner respectfully disagrees and would like to start by pointing out that Zhang’s control signal (Figure 2 Component IC) controls the operation of the switching elements within the power converter (Figure 2 Component 210). Furthermore, Zhang recites in Paragraph 0033 “the control signal IC generated from the controller 230a may regulate the load current signal IL outputted from the converter 210 to a setting current value by regulating an operating frequency or a duty cycle of the converter 210”. The claim language “control parameter that defines a state sequence” is broad and does not impose structural limitations distinguishing it from conventional control signals used to drive switching converters nor does it recite any limitations regarding fixed frequency. The third argument presented by the Applicant is seen on pages 7-8 of the submitted remarks and is reproduced below: Further, Zhang's feedforward compensation is not based on the "slew rate of the reference current signal" nor does it generate a "first offset to the control parameter." Zhang's feedforward compensation signal is generated "according to the reference current signal," and in operation, the controller adds the regulation and feedforward signals to produce a control signal. The Office Action suggests Zhang inherently operates on the "absolute value" of the reference current because IREF is positive, but that is immaterial to Claim 1 and does not supply the claimed slew-rate basis. Zhang nowhere teaches computing a slew rate of IREF or using slew rate as the basis of a feedforward offset. The Examiner respectfully disagrees and would like to start off by pointing out one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). While Zhang does not explicitly disclose using a slew rate, Wang teaches generating pulse width modulated gate signals based on both an amplitude and a slew rate of a reference current signal. Based on that Wang demonstrates that the slew rate of a reference current signal is a known control parameter in power electronic systems. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate the use of a slew rate parameter as taught by Wang for the purpose of improving transient response and dynamic performance of the converter. The fourth argument presented by the Applicant is seen on page 8 of the submitted remarks and is reproduced below: Similarly, Wang does not disclose a "first feedforward block configured to generate a first offset to the control parameter based on a slew rate of the reference current signal" within a converter loop that defines a state sequence. Wang's system is a gradient amplifier controller in a magnetic resonance imaging device. The controller in Wang generates pulse width modulated gate signals "based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115." In Wang, slew rate is merely one of several inputs to a pulse width modulation (PWM) generator that directly drives the gradient bridge amplifiers. That is materially different from the claimed additive feedforward path: an offset applied to a control parameter that itself defines the state sequence of a power converter. Wang's controller logic operates at very high power and current in an MRI gradient driver, and its PWM generation incorporates multiple amplitudes and diagnostic functions unrelated to the claimed fixed- frequency, inner-loop, state-sequencing control of a multi-level DC-DC converter. The Examiner respectfully disagrees, Wang discloses generating control signals for driving a power stage based on multiple inputs which includes the slew rate of a reference signal. Whether such signals are called or characterized as offsets, modulation inputs or control signals does not change the fact that the signal is used as a control parameter. The claims do not recite a specific mathematical operation or structural configuration for applying the “offset,” and therefore encompasses a broad range of ways in which a slew rate derived signal influences the control parameter. It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to incorporate Wang’s slew rate-based signal into Zhang’s control path, including as an added element or otherwise combined component to the change, modify or influence the resulting control parameter. The fifth argument presented by the Applicant is seen on page 8 of the submitted remarks and is reproduced below: Further, the proposed combination lacks motivation. The proposed combination would require wholesale rearchitecture of Wang's PWM generation into a claimed "first feedforward block" that produces an offset to a separate control parameter produced by Zhang's regulation loop. There is no teaching or suggestion to decompose Wang's PWM logic into an additive feedforward offset applied to a control parameter D; nor is there a teaching to reorient Zhang's controller away from LED illumination to an inner-loop converter state sequencing architecture with fixed switching frequency and feedforward offsetting. Absent hindsight, a person of ordinary skill would not be motivated to retrofit MRI gradient amplifier slew-rate heuristics into Zhang's LED lighting controller to create a new, non-disclosed control path that generates a feedforward "offset to the control parameter" based solely on slew rate. The Examiner respectfully disagrees because Zhang and Wang are both directed to control systems for regulating current in power electronic circuits. The underlying principles of feedback control, feedforward compensation and modulation of switching devices are common across both Zhang and Wang. It has been held that a prior art reference must either be in the field of the inventor' s endeavor or, if not, then be reasonably pertinent to the particular problem with which the inventor was concerned, in order to be relied upon as a basis for rejection of the claimed invention. See In re Oetiker, 977 F.2d 1443, 24 USPQ2d 1443 (Fed. Cir. 1992). In this case, both references address improving control of current in electrical systems including dynamic response and accuracy. Therefore, one of ordinary skill in the art before the effective filing date of the claimed invention would have found it obvious to apply control techniques from Wang to the system of Zhang to improve performance. The sixth argument presented by the Applicant is seen on page 9 of the submitted remarks and is reproduced below: Moreover, Zhang and Wang are non-analogous art and different problem domains. Zhang addresses rapid light regulation and converter efficiency in LED lighting; Wang addresses diagnosing and controlling gradient amplifiers in MRI systems, including thermal stress mitigation and online impedance diagnosis. The constraints, signal models, and control objectives materially differ from the claimed inner-loop control for multi-level DC-DC converters used in personal audio and similar electronic devices. The references solve different problems with different architectures and, without impermissible hindsight, would not be combined to yield the claimed solution. Thus, even if individual elements were cherry-picked from the references, the Office Action does not articulate a persuasive reason to combine Zhang and Wang to arrive at the claimed architecture. Wang's teaching is embedded in an MRI gradient amplifier system, with PWM generation based on slew rate and amplitudes to control magnetic field gradients; Zhang's system is an LED lighting controller with feedforward based on IREF magnitude and a regulation loop adjusting duty or frequency. The claimed invention addresses a different problem-high- bandwidth, stable inner-loop control of a multi-level DC-DC converter with fixed frequency and deterministic state sequencing-by a particular combination of loop filter error correction and a slew-rate-based feedforward offset to the control parameter. The proposed combination would require substantial redesign of both references and relies on hindsight gleaned from the application's teachings. In addition, because Wang's PWM output depends on both the amplitude of the reference and of the filtered coil current-rather than a pure slew-rate basis-and is not disclosed as an additive offset to a separately computed control parameter that defines converter state sequences, there is no reasonable expectation of success in grafting Wang's approach into Zhang's controller to achieve the claimed functional result. The Examiner respectfully disagrees and as pointed out above in response to applicant's argument that Zhang and Wang are nonanalogous art, it has been held that a prior art reference must either be in the field of the inventor's endeavor or, if not, then be reasonably pertinent to the particular problem with which the inventor was concerned, in order to be relied upon as a basis for rejection of the claimed invention. See In re Oetiker, 977 F.2d 1443, 24 USPQ2d 1443 (Fed. Cir. 1992). In this case, Zhang and Wang are both directed to control systems for regulating current in power electronic circuits. The underlying principles of feedback control, feedforward compensation and modulation of switching devices are common across both Zhang and Wang. Both references address improving control of current in electrical systems including dynamic response and accuracy. Wang teaches that the slew rate of the reference current signal directly influences the generated control signals. This shows using slew rate as a control input affecting the operation of the system. The claims as currently recited do not require a specific form of mathematical offset or a particular point of insertion within the control loop. Therefore, Wang’s teaching of the use of a slew rate to influence control signals reasonably meter the claimed limitation. Furthermore, adapting Wang’s teaching of slew rate-based control signal to be applied to an offset to Zhang’s control parameter would have been within ordinary skill in art. Based on the reasoning provided above the Examiner the rejection under 35 U.S.C. 103 is maintained and made final. Claim Rejections In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-3, 6, 10-12 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 2015/0163882 A1) in view of Wang (US 2019/0369183 A1). Regarding claim 1, Zhang teaches a control circuit (Figure 2 Component 230a) for generating a control parameter (Figure 2 Component IC) that defines a state sequence of a power converter (Figure 2 Component 210), comprising: a loop filter (Figure 2 Components 231) configured to, based on an error signal (Figure 2 Component IE) between a reference current signal (Figure 2 Component IREF) and a feedback current measurement signal (Figure 2 Component IS), correct for unmodeled errors in the feedback current measurement signal to generate the control parameter (Paragraph 0040); and a first feedforward block (Figure 2 Component 232) configured to generate a first offset (Figure 2 Component IF) to the control parameter based on the reference current signal (Figure 2 Component IF is generated based on the value of Component IREF). Zhang does not teach the first forward block configured to generate the first offset based on a slew rate. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 2, Zhang and Wang teach all the limitations of claim 1. Zhang further teaches wherein the first feedforward block generates the first offset based on an absolute value of the reference current signal (Figure 1 Component 232 generates Component IF based on IREF and IREF is a reference current that is always a positive number thus inherently Component 232 would generate Component IF based on the absolute value of Component IREF). Zhang does not teach wherein the first feedforward block generates the first offset based on the slew rate of the reference current signal. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 3, Zhang and Wang teach all the limitations of claim 1. Zhang further teaches wherein the first feedforward block generates the first offset based on an absolute value of the reference current signal (Figure 1 Component 232 generates Component IF based on IREF and IREF is a reference current that is always a positive number thus inherently Component 232 would generate Component IF based on the absolute value of Component IREF). Zhang does not teach wherein the first feedforward block generates the first offset based on the slew rate, implied changes to a state of the power converter, and current values of the state of the power converter. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”), wherein the feedforward block generates the signal based on the slew rate, implied changes to a state of the power converter, and current values of the state of the power converter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 6, Zhang and Wang teach all the limitations of claim 1. Zhang does not teach a feedforward correction block configured to generate a second offset to the error signal to compensate for an expected error introduced by the first offset. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”), and a feedforward correction block configured to generate a second offset to the error signal to compensate for an expected error introduced by the first offset (Figure 3 Component 328). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 10, Zhang teaches a method (Figure 2) for generating a control parameter (Figure 2 Component IC) that defines a state sequence of a power converter (Figure 2 Component 210), comprising: based on an error signal (Figure 2 Component IE) between a reference current signal (Figure 2 Component IREF) and a feedback current measurement signal (Figure 2 Component IS), correcting with a loop filter (Figure 2 Component 231) for unmodeled errors in the feedback current measurement signal to generate the control parameter (Paragraph 0040); and generating with a first feedforward block (Figure 2 Component 232) a first offset (Figure 2 Component IF) to the control parameter based on the reference current signal (Figure 2 Component IF is generated based on the value of Component IREF). Zhang does not teach generating the first offset based on the slew rate of the reference current signal. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 11, Zhang and Wang teach all the limitations of claim 10. Zhang further teaches generating the first offset based on an absolute value of the reference current signal (Figure 1 Component 232 generates Component IF based on IREF and IREF is a reference current that is always a positive number thus inherently Component 232 would generate Component IF based on the absolute value of Component IREF). Zhang does not teach generating the first offset based on the slew rate. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 12, Zhang and Babazadeh teach all the limitations of claim 10. Zhang further teaches generating the first offset based on an absolute value of the reference current signal (Figure 1 Component 232 generates Component IF based on IREF and IREF is a reference current that is always a positive number thus inherently Component 232 would generate Component IF based on the absolute value of Component IREF). Zhang does not teach generating the first offset based on the slew rate, implied changes to a state of the power converter, and current values of the state of the power converter. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”), wherein the feedforward block generates the signal based on the slew rate, implied changes to a state of the power converter, and current values of the state of the power converter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Regarding claim 15, Zhang and Wang teach all the limitations of claim 10. Zhang does not teach generating, with a feedforward correction block, a second offset to the error signal to compensate for an expected error introduced by the first offset. Wang teaches a control circuit (Figures 1-3 Component 102) for generating a control parameter (Figure 3 Component 308 output signals) that define a state sequence of a power converter (Figures 1-3 Component 104; Component 104 is seen in further detail in Figure 4), comprising: a loop filter configured to, based on an error signal (Figure 3 Component 322 output) between a reference current signal (Figures 1-3 Component 124) and a feedback current signal (Figures 1-3 Component 115), generate the control parameter; and a feedforward block generating a signal based on a slew rate and absolute value of the reference current signal to help generate the control parameter (Paragraph 0025 “the pulse width modulated gate signals are generated based on a slew rate and an amplitude of the reference current signal 124 and an amplitude of the filtered coil current signal 115. The term “slew rate” refers to a rate at which an amplitude of the reference current signal 124 is varied with respect to time. The gradient magnetic field generated across the gradient coil 112 is controlled based on the generated pulse width modulated gate signals”), and a feedforward correction block configured to generate a second offset to the error signal to compensate for an expected error introduced by the first offset (Figure 3 Component 328). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate using a slew rate parameter to generate the first offset as taught by Wang. The advantage of this design is that it counteracts the effect of nonlinearities within the converter leading to a more efficient loop control. Claims 4 and 13 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 2015/0163882 A1) in view of Wang (US 2019/0369183 A1) and in further view of Garrett (US 2021/0313936 A1). Regarding claim 4, Zhang and Wang teach all the limitations of claim 1. Zhang does not teach a second feedforward block configured to generate a second offset to the control parameter based on an input voltage to and an output voltage from the power converter. Garrett teaches a control circuit (Figure 12), comprising: a second feedforward block (Figure 12 Component 131) configured to generate a second offset (Figure 12 Component 131 output) to the control parameter (Figure 12 Component di) based on an input voltage to and an output voltage from the power converter (Figure 12 Component 131 output is based on Component Vin and Vout based on the value of Va coming in from Component 110). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a second feedforward block based on the input and output voltages as taught by Garrett. The advantage of this design is that it suppresses the impact of variations of the input voltage and the output voltage. Regarding claim 13, Zhang and Wang teach all the limitations of claim 10. Zhang does not teach generating a second offset to the control parameter, with a second feedforward block, based on an input voltage to and an output voltage from the power converter. Garrett teaches a control circuit (Figure 12), comprising: a second feedforward block (Figure 12 Component 131) configured to generate a second offset (Figure 12 Component 131 output) to the control parameter (Figure 12 Component di) based on an input voltage to and an output voltage from the power converter (Figure 12 Component 131 output is based on Component Vin and Vout based on the value of Va coming in from Component 110). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a second feedforward block based on the input and output voltages as taught by Garrett. The advantage of this design is that it suppresses the impact of variations of the input voltage and the output voltage. Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 2015/0163882 A1) in view of Wang (US 2019/0369183 A1) and in further view of Weida (US 2015/0263609 A1). Regarding claim 5, Zhang and Wang teach all the limitations of claim 1. Zhang does not teach a trajectory generator that generates the reference current signal based on a target current signal and the control parameter. Weida teaches a control circuit (Figure 4), comprising: a loop filter (Figure 4 Component 33) configured to generate a control parameter (Figure 4 Component d); a trajectory generator (Figure 4 Component 36) that generates a reference current signal (Figure 4 Component Iref’) based on a target current signal (Figure 4 Component Iref) and the control parameter (Figure 4 Component 36 outputs Iref’ based on Component Iref and Component d through Component 34.1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a trajectory generator as taught by Weida. The advantage of this design is that the system is adjustable based on the needs of the system thus enhancing the usability of the system over a range of load demands. Regarding claim 14, Zhang and Wang teach all the limitations of claim 10. Zhang does not teach generating the reference current signal based on a target current signal and the control parameter. Weida teaches a control circuit (Figure 4), comprising: a loop filter (Figure 4 Component 33) configured to generate a control parameter (Figure 4 Component d); a trajectory generator (Figure 4 Component 36) that generates a reference current signal (Figure 4 Component Iref’) based on a target current signal (Figure 4 Component Iref) and the control parameter (Figure 4 Component 36 outputs Iref’ based on Component Iref and Component d through Component 34.1). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a trajectory generator as taught by Weida. The advantage of this design is that the system is adjustable based on the needs of the system thus enhancing the usability of the system over a range of load demands. Claims 7 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 2015/0163882 A1) in view of Wang (US 2019/0369183 A1) and in further view of Silva (US 9630526 B1). Regarding claim 7, Zhang and Wang teach all the limitations of claim 1. Zhang does not teach a gain adjustment block configured to scale the control parameter based on an inverse of an input voltage to the power converter. Silva teaches a control method, comprising: a gain adjustment block configured to scale the control parameter based on an inverse of an input voltage to the power converter (Col. 1 Lines 41-45). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a gain adjustment block as taught by Silva. The advantage of this design is that the transfer functions are independent from the input voltage. Regarding claim 16, Zhang and Wang teach all the limitations of claim 10. Zhang does not teach scaling the control parameter based on an inverse of an input voltage to the power converter. Silva teaches a control method, comprising: a gain adjustment block configured to scale the control parameter based on an inverse of an input voltage to the power converter (Col. 1 Lines 41-45). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a gain adjustment block as taught by Silva. The advantage of this design is that the transfer functions are independent from the input voltage. Claims 8-9 and 17-18 are rejected under 35 U.S.C. 103 as being unpatentable over Zhang (US 2015/0163882 A1) in view of Wang (US 2019/0369183 A1) and in further view of Lawrence (US 2021/0367517 A1). Regarding claim 8, Zhang and Wang teach all the limitations of claim 1. Zhang does not teach a measurement block configured to estimate the feedback current measurement signal. Lawrence teaches a control circuit (Figure 5 Components 42+44+46+48) for a power converter (Figure 5 Component 20), comprising a measurement block and an averaging block to estimate and average the feedback current measurement signal (Figure 5 Component 44; Paragraph 0067). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a measurement and averaging circuit as taught by Lawrence. The advantage of this design is that it ensures a controlled control loop and no bouncing current measurements based on load demand changing drastically thus enhancing the efficiency of the converter. Regarding claim 9, Zhang and Wang teach all the limitations of claim 8. Zhang does not teach an averaging block to average the feedback current measurement signal. Lawrence teaches a control circuit (Figure 5 Components 42+44+46+48) for a power converter (Figure 5 Component 20), comprising a measurement block and an averaging block to estimate and average the feedback current measurement signal (Figure 5 Component 44; Paragraph 0067). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a measurement and averaging circuit as taught by Lawrence. The advantage of this design is that it ensures a controlled control loop and no bouncing current measurements based on load demand changing drastically thus enhancing the efficiency of the converter. Regarding claim 17, Zhang and Wang teach all the limitations of claim 10. Zhang does not teach estimating the feedback current measurement signal with a measurement block. Lawrence teaches a control circuit (Figure 5 Components 42+44+46+48) for a power converter (Figure 5 Component 20), comprising a measurement block and an averaging block to estimate and average the feedback current measurement signal (Figure 5 Component 44; Paragraph 0067). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a measurement and averaging circuit as taught by Lawrence. The advantage of this design is that it ensures a controlled control loop and no bouncing current measurements based on load demand changing drastically thus enhancing the efficiency of the converter. Regarding claim 18, Zhang and Wang teach all the limitations of claim 17. Zhang does not teach averaging the feedback current measurement signal. Lawrence teaches a control circuit (Figure 5 Components 42+44+46+48) for a power converter (Figure 5 Component 20), comprising a measurement block and an averaging block to estimate and average the feedback current measurement signal (Figure 5 Component 44; Paragraph 0067). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the teachings of Zhang to incorporate a measurement and averaging circuit as taught by Lawrence. The advantage of this design is that it ensures a controlled control loop and no bouncing current measurements based on load demand changing drastically thus enhancing the efficiency of the converter. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to Shahzeb K. Ahmad whose telephone number is (571)272-0978. The examiner can normally be reached Monday - Friday 8 A.M. to 5 P.M.. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached at 571-270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Shahzeb K Ahmad/Examiner, Art Unit 2838 /THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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Prosecution Timeline

Apr 28, 2023
Application Filed
Jun 04, 2025
Non-Final Rejection mailed — §103
Aug 13, 2025
Response Filed
Oct 20, 2025
Non-Final Rejection mailed — §103
Jan 06, 2026
Response Filed
Apr 30, 2026
Final Rejection mailed — §103
Jun 10, 2026
Response after Non-Final Action

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
80%
Grant Probability
84%
With Interview (+4.7%)
2y 3m (~0m remaining)
Median Time to Grant
High
PTA Risk
Based on 387 resolved cases by this examiner. Grant probability derived from career allowance rate.

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