DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Response to Amendment
The Amendments to the Claims submitted on January 29, 2026 appear to overcome the Objections to the Claims. Therefore, the Objections to the Claims are withdrawn.
Claim Interpretation
The claims refer to “non-volatile memory”. As defined in the specification, this comprises “flash memory, read-only memory (ROM), programmable read-only memory (PROM), erasable programmable read-only memory (EPROM) and electronically erasable programmable read-only memory (EEPROM) memory” (paragraph 3, lines 10-13).
Based on this definition, this is how the phrase “non-volatile memory” will be interpreted in the claim language for purpose of consideration on the merits.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claim(s) 2, 10, and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Lary et al. (US 2012/0239859), hereafter referred to as Lary’859 in view of Fomin et al. (US 2020/0319820, filing date April 2, 2019), hereafter referred as Fomin’820.
Referring to independent claim 2, Lary’859 teaches an apparatus, comprising: at least one host interface (controller 106 includes a main data pathway 116 to facilitate transfer of write data from the host device 102 to the storage array 108, and to facilitate the return of previously stored readback data from the storage array 108 to the host device 102, see figure 3 and paragraph 30, lines 1-5); a logic circuit coupled to the at least one host interface (one or more policy processors 118, see figure 3 and paragraph 31, line 1) configured to: identify a dataset hosted in a first memory device and having an access pattern (access patterns can be identified, paragraph 44, lines 5-6; HDD memory space 164, which is the combined available memory of all of the M HDDs, see figure 6 and paragraph 42, lines 3-4); and move the dataset from the first memory device to a second memory device (when the system detects a subsequent launching of that application, it can quickly operate to move those data sets that may be requested in the near future to the faster SSD memory space 162 (fast pool) in anticipation of such usage, see figure 6 and paragraph 45, lines 1-4).
Lary’859 does not appear to explicitly teach the first and second memory devices as both being non-volatile.
However, Fomin’820 teaches a first non-volatile memory device (low-endurance solid state drives (SSDs) for read-intensive data, paragraph 30, lines 12-13) and a second non-volatile memory device (higher-endurance SSDs for write-intensive data, paragraph 30, line 13).
Lary’859 and Fomin’820 are analogous because they are both drawn to the same inventive field of distributed storage.
Prior to the effective filing date of the claimed invention, it would have been obvious to one of ordinary skill in the art, having the teachings of Lary’859 and Fomin’820 before them, to modify the apparatus of Lary’859 to include the non-volatile memory devices of Fomin’820 by implementing the “memory spaces” as SSDs.
The motivation for doing so would have been that it is a simple substitution of SSDs in lieu of HDDs. Such a modification would be a substitution of one known part for another which can serve an equivalent purpose. This modification would not require undue effort, or have undesired results.
Therefore, it would have been obvious to combine Lary’859 and Fomin’820 to bring about the invention as claimed.
Note that independent claims 10 and 17 contain the corresponding limitations of claim 2 as shown above; therefore, they are rejected using the same reasoning accordingly.
Response to Arguments
Applicant’s arguments, see “35 U.S.C. 102”, filed January 29 2026, with respect to the rejection(s) of claim(s) 2, 10, and 17 under 35 U.S.C. 102 have been fully considered and are persuasive in view of the amendments related to said arguments. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of the combination of Lary’859 and Fomin’820.
The Applicant’s amendments to the claims have been considered to overcome the previous rejection under 35 U.S.C. 102. However, based on the amendments, it is determined that the claims would have been obvious in view of the combination of Lary’859 and Fomin’820, as shown above.
Therefore, the independent claims 2, 10, and 17 are now rejected under 35 U.S.C. 103 based on the amendments.
Allowable Subject Matter
Claims 3-9, 11-16, and 18-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
The following is a statement of reasons for the indication of allowable subject matter:
As to claim 3, the prior art of record does not appear to anticipate, explicitly teach, or fairly suggest wherein after the identification of the dataset having the access pattern, the address map is configured to host the dataset on the second memory device.
Further, it would not have been obvious to one of ordinary skill in the art to combine the above limitation with the remaining limitations of the claim.
While Hirasata (US 2005/0235108) discloses extracting random, sequential, or other access patterns, and allocating a cache area for each pattern; and Rao et al. (US 9,250,819) discloses wherein data segments may be stored in an order that is more likely to reflect future access patterns , these references do not anticipate or explicitly teach the subject matter determined to be allowable.
Note that claims 11 and 18 contain the corresponding limitations of claim 3 as shown above; therefore, they are considered to be allowable by the same reasoning accordingly.
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
Hirasata (US 2005/0235108) discloses extracting random, sequential, or other access patterns, and allocating a cache area for each pattern.
Rao et al. (US 9,250,819) discloses wherein data segments may be stored in an order that is more likely to reflect future access patterns.
However, these references do not anticipate or explicitly teach the subject matter determined to be allowable.
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JOHN B ROCHE whose telephone number is (571)270-1721. The examiner can normally be reached Monday-Friday, 10:30 - 7.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Henry Tsai can be reached at (571)272-4176. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/J.B.R/Examiner, Art Unit 2184
/HENRY TSAI/Supervisory Patent Examiner, Art Unit 2184