Prosecution Insights
Last updated: October 04, 2026
Application No. 18/309,111

SiC EPITAXIAL WAFER AND METHOD FOR MANUFACTURING SAME

Final Rejection §103
Filed
Apr 28, 2023
Priority
Jun 28, 2017 — JP 2017-126744 +2 more
Examiner
GREGORIO, GUINEVER S
Art Unit
1732
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Resonac Holdings Corporation
OA Round
3 (Final)
73%
Grant Probability
Favorable
4-5
OA Rounds
0m
Est. Remaining
92%
With Interview

Examiner Intelligence

Grants 73% — above average
73%
Career Allowance Rate
615 granted / 842 resolved
+8.0% vs TC avg
Strong +18% interview lift
Without
With
+18.5%
Interview Lift
resolved cases with interview
Typical timeline
3y 2m
Avg Prosecution
38 currently pending
Career history
869
Total Applications
across all art units

Statute-Specific Performance

§101
1.8%
-38.2% vs TC avg
§103
58.9%
+18.9% vs TC avg
§102
9.0%
-31.0% vs TC avg
§112
20.0%
-20.0% vs TC avg
Black line = Tech Center average estimate • Based on career data from 842 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Arguments Applicant's arguments filed 06/25/2026 have been fully considered but they are not persuasive. In response to applicant's argument that the prior art does not teach the unexpected results “it is possible to decrease the number of outer edge interface dislocations which are caused when a SiC epitaxial film having a large thickness is formed on a 4H-SiC single crystal substrate” the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Applicant then argues the primary art Hansen fails to disclose the characteristics: (vi) The slope of the bevel part has a width of 150 µm or more and (vii) The SiC epitaxial film has a film thickness of 20 µm or more. The Office does not dispute Hansen does not disclose the slope of the bevel part has a width of 150 µm or more. The previous Office action states, “Hansen et al. does not teach wherein the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more” and therefore cited the secondary, Axus, to teach the limitation. Applicant then argues “It is not clear that Hansen suggests the characteristic (vii). As described in the Office Action, Hansen discloses in paragraph 0069 that the back side of the wafer may become rougher in some applications where the epitaxial film deposited is thick (10-100+ µm). However, in Example 5 and Example 6 (paragraphs 0083 and 0084) of Hansen, epitaxial films with a target thickness 15 um or 5 um were used. Accordingly, Applicant submits that a SiC epitaxial film having a thickness of 15 um or less is intended in the invention of Hansen.” Applicant’s argument is not persuasive because a prior art reference is not limited to its specific working examples or preferred embodiments but rather constitutes prior art for everything it fairly discloses to one of ordinary skill in the art (see In re Lamberti, 545 F.2d 747, 192 USPQ 278 (CCPA 1977)). Hansen explicitly teaches in paragraph 0069 that the epitaxial film deposited can be thick, specifically defining this as "10-100+ µm”. Furthermore, the mention of increased roughness at these higher thicknesses does not constitute a "teaching away" from the claimed range. Hansen teaches “To return the backside of the wafer to its pre-epitaxy condition, polishing of the substrate is done with silica or alumina abrasives, cloth pads and temperature in the range of 30-60° C” and therefore roughness is not an issue for a thicker deposit. Because Hansen explicitly discloses a thickness range of as 10-100+ µm, which overlaps with the claimed range of a SiC epitaxial film having a film thickness of 20 µm or more a prima facie case of obviousness is maintained. As set forth in MPEP 2144.05, in the case where the claimed range “overlap or lie inside ranges disclosed by the prior art”, a prima facie case of obviousness exists, In re Wertheim, 541 F.2d 257, 191 USPQ 90 (CCPA 1976); In re Woodruff, 919 F.2d 1575, 16 USPQ2d 1934 (Fed. Cir. 1990). Applicant reiterates the argument “Hansen fails to suggest the unexpected excellent characteristics of the present invention regarding outer edge interface dislocation” which as stated supra is not persuasive because the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Regarding the secondary Axus, Accordingly, Axus may suggest the characteristics (v) and (vi) however, Axus fails to suggest the characteristics (i) to (iv) and (vii). Applicant’s argument is not persuasive because the secondary was cited to teach the characteristics (v) and (vi) and modify Hansen. Applicant then argues that Axus fails to suggest the unexpected excellent characteristics of the present invention regarding outer edge interface dislocation which as stated supra is not persuasive because the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Applicant reiterates the unexpected excellent effects of the present invention are not suggested in Hansen and Axus but as stated supra the argument is not persuasive because the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Applicant then argues “There is no sufficient motivation for a person skilled in the art to combine Hansen and Axus”. Applicant’s argument is not persuasive because the prior art does provide the rationale that the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more prevents chipping and flaking. Applicant concludes “A person skilled in the art cannot arrive at the present invention, as a person skilled in the art did not know a new interface dislocation ("outer edge interface dislocation") that extends from an outer peripheral edge of a SiC substrate when a SiC epitaxial film having a large thickness grows on the SiC substrate.” In response to applicant's argument that the prior art does not teach the unexpected results it is possible to decrease the number of outer edge interface dislocations which are caused when a SiC epitaxial film having a large thickness is formed on a 4H-SiC single crystal substrate, the fact that the inventor has recognized another advantage which would flow naturally from following the suggestion of the prior art cannot be the basis for patentability when the differences would otherwise be obvious. See Ex parte Obiaya, 227 USPQ 58, 60 (Bd. Pat. App. & Inter. 1985). Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. Claim(s) 1 and 3-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hansen et al. (U.S. Pub. No 2016/0032486) in view of Axus (Wafer Edge Grinding Process October 2013). Regarding claim 1, Hansen et al. teaches crystals were grown and sliced to produce 4H-SiC substrates such that the resulting surface is at an angle of 4 degrees away from the c-axis toward the <11-20> direction which meets the limitation of a 4H-SiC single crystal substrate which has a surface with an off angle with respect to a c-plane as a main surface (paragraph 75). Hansen et al. teaches one application where the epitaxial film deposited is thick (10-100+ µm) using CVD process which meets the limitation of a SiC epitaxial film having a film thickness of 20 µm or more, which is formed on the 4H-SiC single crystal substrate (paragraphs 68 and 69). Hansen et al. teaches wafer diameter was within a specification of 150+/−0.4 mm following the edge chamfer process which meets the limitation of and a bevel part on a peripheral part (paragraph 75). Hansen et al. does not teach wherein the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more. Axus teaches after the boule is grown to diameter and length, it is rounded and then sliced into substrates that will become wafers (page 2). Axus teaches “The edge grinding step is critical to the safety of the wafer edge. Silicon in this crystalline state is very brittle and if the edge is not profiled or rounded off, it will flake during handling and certainly during follow-on processing steps both mechanical in nature and thermally dynamic in nature. Edge flaking is not only catastrophic for the individual wafer, it can be a disaster for other wafers that are being processed if the edge flake contaminates the processing equipment or nearby wafers.” (page 2). Axus teaches “While other shapes may be used to protect the wafer edge from chipping, what has become generally known as the "bullet nose" shape and variations of this shape are the most common for monocrystalline silicon wafers of all sizes in the semiconductor industry. This shape is common also for polycrystalline applications such as those made in PV (solar) related device manufacturing. The shape of the "nose" may be blunter if the wafers are to be processed farther down the line using the CMP or they may be aerodynamic is the wafers are not going to go through a CMP process.” (page 2). Axus teaches “The SEMI specification for the length of the bevel edge is 200 µm + 50 µm which overlaps with the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more (page 3). It would have been obvious to one of ordinary skill in the art to shape the bevel edge of the SiC wafer substrate taught by Hansen et al. so that the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more because it prevents chipping and flaking. Regarding claim 3, Hansen et al. teaches one application where the epitaxial film deposited is thick (10-100+ µm) using CVD process which meets the limitation of a SiC epitaxial film having a film thickness of 20 µm or more, which is formed on the 4H-SiC single crystal substrate (paragraphs 68 and 69). Axus teaches “The SEMI specification for the length of the bevel edge is 200 µm + 50 µm which overlaps with the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more (page 3). Hansen et al. in view of Axus overlaps with when Y represents a width ( m) of the slope part and X represents a thickness ( m) of the epitaxial film, Formula shown below is satisfied, Y> 20X-400. Regarding claims 4-9, Hansen et al. teaches a beveled circumferential edge (e.g., with maximum angle of 22.5+/−0.2 degrees with respect to fabrication surface of the substrate) (paragraph 38). Regarding claim 10, Hansen et al. teaches edges of the wafer is then chamfered to an angle of 22.5+/−0.1 degrees (paragraph 45). Regarding claims 11-14, Hansen et al. teaches one application where the epitaxial film deposited is thick (10-100+ µm) using CVD process which meets the limitation of a SiC epitaxial film having a film thickness of 20 µm or more, which is formed on the 4H-SiC single crystal substrate (paragraphs 68 and 69). Regarding claim 15, Axus teaches “The SEMI specification for the length of the bevel edge is 200 µm + 50 µm which overlaps with the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more (page 3). Regarding claim 16, Paragraph 16 of Applicant’s specification states “the generation of the threading edge dislocation row and the interface dislocation are closely related”. Hansen et al. teaches a median areal density of threading screw dislocations is in the range from 0/cm2 to 400/cm2 (paragraph 38). Therefore it is the position of the Office Hansen et al. would overlap with to wherein a density of an interface dislocation extending from the outer peripheral edge of the SiC epitaxial layer is 10 lines/cm or less because the threading location is as low as 0. Regarding claims 17 and 18, the SiC epitaxial wafer is generally obtained by growing 4H SiC epitaxial layer on a SiC single crystal substrate, in which a surface having an off angle from a (0001) plane to <11-20> direction is used as a growth surface, by step flow growth (paragraph 38). Regarding claim 19, Hansen et al. teaches a step of preparing a 4H-SiC single crystal substrate which has a surface with an off angle with respect to a c-plane as a main surface, and a bevel part in a peripheral part of the substrate, wherein the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part (paragraph 38). Hansen et al. teaches one application where the epitaxial film deposited is thick (10-100+ µm) using CVD process which meets the limitation of a SiC epitaxial film having a film thickness of 20 µm or more, which is formed on the 4H-SiC single crystal substrate (paragraphs 68 and 69). Axus teaches “The SEMI specification for the length of the bevel edge is 200 µm + 50 µm which overlaps with the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more (page 3). Hansen et al. in view of Axus overlaps with when Y represents a width ( m) of the slope part and X represents a thickness ( m) of the epitaxial film, Formula shown below is satisfied, Y> 20X-400. Claim(s) 2 is/are rejected under 35 U.S.C. 103 as being unpatentable over Hansen et al. in view of Axus as applied to claim 1 above, and further in view of Momose et al. (U.S. Pub. No. 2013/0009170). Regarding claim 2, Hansen et al. teaches crystals were grown and sliced to produce 4H-SiC substrates such that the resulting surface is at an angle of 4 degrees away from the c-axis toward the <11-20> direction which meets the limitation of a 4H-SiC single crystal substrate which has a surface with an off angle with respect to a c-plane as a main surface (paragraph 75). Hansen et al. teaches one application where the epitaxial film deposited is thick (10-100+ µm) using CVD process which meets the limitation of a SiC epitaxial film having a film thickness of 20 µm or more, which is formed on the 4H-SiC single crystal substrate (paragraphs 68 and 69). Hansen et al. teaches wafer diameter was within a specification of 150+/−0.4 mm following the edge chamfer process which meets the limitation of and a bevel part on a peripheral part (paragraph 75). Hansen et al. does not teach wherein the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more. Axus teaches after the boule is grown to diameter and length, it is rounded and then sliced into substrates that will become wafers (page 2). Axus teaches “The edge grinding step is critical to the safety of the wafer edge. Silicon in this crystalline state is very brittle and if the edge is not profiled or rounded off, it will flake during handling and certainly during follow-on processing steps both mechanical in nature and thermally dynamic in nature. Edge flaking is not only catastrophic for the individual wafer, it can be a disaster for other wafers that are being processed if the edge flake contaminates the processing equipment or nearby wafers.” (page 2). Axus teaches “While other shapes may be used to protect the wafer edge from chipping, what has become generally known as the "bullet nose" shape and variations of this shape are the most common for monocrystalline silicon wafers of all sizes in the semiconductor industry. This shape is common also for polycrystalline applications such as those made in PV (solar) related device manufacturing. The shape of the "nose" may be blunter if the wafers are to be processed farther down the line using the CMP or they may be aerodynamic is the wafers are not going to go through a CMP process.” (page 2). Axus teaches “The SEMI specification for the length of the bevel edge is 200 µm + 50 µm which overlaps with the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more (page 3). It would have been obvious to one of ordinary skill in the art to shape the bevel edge of the SiC wafer substrate taught by Hansen et al. so that the bevel part includes a slope part continuous from the main surface and an outer peripheral edge part, and a width of the slope part is 150 µm or more because it prevents chipping and flaking. Hansen et al. in view of Axus does not teach the SiC epitaxial wafer according to wherein the SiC epitaxial film is formed on the main surface and the bevel part of the substrate. Momose et al. teaches SiC epitaxial film composed of 4H-SiC is formed on top of the main surface of a SiC single crystal wafer composed of 4H-SiC which meets the limitation of a 4H-SiC single crystal substrate (paragraph 117). Momose et al. teaches epitaxial SiC single crystal substrate which includes a SiC single crystal wafer whose main surface is a c-plane or a surface that inclines a c-plane with an angle of inclination that is more than 0 degree but less than 10 degrees which meets the limitation of a 4H-SiC single crystal substrate which has a surface with an off angle with respect to a c-plane as a main surface (paragraph 14). Momose et al. teaches method of manufacture of epitaxial SiC single crystal substrate, which includes a SiC single crystal wafer and a SiC epitaxial film formed on the main surface of a SiC single crystal wafer by epitaxial growth (paragraph 27). Momose et al. teaches the SiC epitaxial wafer according to wherein the SiC epitaxial film is formed on the main surface and the bevel part of the substrate (Figure 3). Momose et al. teaches explains the generating mechanism of threading edge dislocation arrays (Figures 6-10). Momose et al. teaches “If dislocation array density is 10 arrays/cm2 or less, it is possible to mitigate device degradation in the case where a device is formed on the epitaxial SiC single crystal substrate” (paragraph 71). It would have been obvious to one of ordinary skill in the art at the time of filing to form the epitaxial fil film such that the SiC epitaxial film is formed on the main surface and the bevel part of the substrate because it minimizes the dislocation array density and therefore mitigate device degradation in the case where a device is formed on the epitaxial SiC single crystal substrate. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to GUINEVER S GREGORIO whose telephone number is (571)270-5827. The examiner can normally be reached M-W 11 am - 9 pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Coris Fung can be reached at 571-270-5713. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /GUINEVER S GREGORIO/Primary Examiner, Art Unit 1732 08/31/2026
Read full office action

Prosecution Timeline

Apr 28, 2023
Application Filed
Sep 25, 2025
Non-Final Rejection mailed — §103
Dec 22, 2025
Response Filed
Mar 25, 2026
Non-Final Rejection mailed — §103
Jun 25, 2026
Response Filed
Sep 03, 2026
Final Rejection mailed — §103 (current)

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Prosecution Projections

4-5
Expected OA Rounds
73%
Grant Probability
92%
With Interview (+18.5%)
3y 2m (~0m remaining)
Median Time to Grant
High
PTA Risk
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