DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1-3, 5-8, and 15-19 are rejected under 35 U.S.C. 103 as being unpatentable over Nakamori (US 2014/0009983 A1) in view of Umemura et al. (hereinafter Umemura, US 5,936,820 A).
For claim 1, Nakamori discloses a system (Fig. 1 of Nakamori discloses a system 1 – see Nakamori, Fig. 1, paragraph [0048]) comprising:
an inverter configured to convert DC power from a battery to AC power to drive a motor (Fig. 1 of Nakamori discloses an inverter 2 configured to converter DC power from a battery to AC power to drive a motor 5 – see Nakamori, Fig. 1, paragraphs [0049]-[0050]. It is noted that Nakamori discloses a DC power supply which is not specifically a battery. However, Umemura discloses the DC power supply which is a battery (Fig. 1 of Umemura discloses a DC power supply PB which is a battery -- see Umemura, Fig. 1, col. 5, lines 6-10. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify teaching of Nakamori to use battery as Umemura’s teaching for purpose of reducing reliance on fossil fuels, supporting renewables and improving energy efficiency), wherein the inverter includes:
one or more phase switches (Fig. 1 of Nakamori discloses phase switches 11-16 – see Nakamori, Fig. 1, paragraphs [0049]-[0050]); and
one or more controllers configured to control a gate voltage to the one or more phase switches (Figs. 1-2 and 4 of Nakamori disclose one or more controllers (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) configured to control a gate voltage to the one or more phase switches 11-16 – see Nakamori, Figs. 1-2 and 4, paragraphs [0048], [0052], [0058], [0074]-[0077], [0079]-[0080] and [0083]), wherein the one or more controllers is configured to control the gate voltage based on one or more of a measured temperature of the one or more phase switches or an estimated temperature of the one or more phase switches (Figs. 1-2 and 4 of Nakamori disclose the one or more controllers (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is configured to control the gate voltage based on one or more of a measured temperature 18/36 of the one or more phase switches 11-16 or an estimated temperature of the one or more phase switches – see Nakamori, Figs. 1-2 and 4, paragraphs [0051]-[0052], [0057] and [0059]-[0060]).
Nakamori discloses a bulk capacitor (Fig. 4 of Nakamori discloses a bulk capacitor 510/ 530/ 550/580 – see Nakamori, Fig. 4, paragraphs [0077]; [0079], lines 1-8, [0080], lines 1-8; [0082]) which is silent to connect to a positive connection of the battery and a negative connection of the battery. Also, Nakamori discloses one or more controllers configured to control a gate voltage to the one or more phase switches to be silent for discharging the bulk capacitor.
However, Umemura discloses a bulk capacitor to connect to a positive connection of the battery and a negative connection of the battery (Fig. 1 of Umemura discloses a bulk capacitor Cap to connect to a positive connection of the battery PB and a negative connection of the battery PB – see Umemura, Fig. 1, col. 5, lines 6-21). Also, Umemura discloses one or more controllers configured to control a gate voltage to the one or more phase switches to discharge the bulk capacitor (Fig. 1 of Umemura discloses one or more controllers (11, controllers 1-3) configured to control a gate voltage to the one or more phase switches 18-20 to discharge the bulk capacitor Cap – see Umemura, Fig. 1, col. 5, lines 6-29).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nakamori’s system to include a bulk capacitor to connect to a positive connection of the battery and a negative connection of the battery as teaching of Umemura for purpose of making suitable for applications that require rapid energy delivery, such as power backup system.
For claim 2, Nakamori in view of Umemura disclose the system of claim 1, wherein the one or more controllers is a point-of use controller (Figs. 1-2 and 4 of Nakamori discloses the one or more controllers (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is a point-of use controller – see Nakamori, Figs. 1-2 and 4, paragraphs [0048], [0052], [0055]-[0060]).
For claim 3, Nakamori in view of Umemura disclose the system of claim 1, wherein the one or more controllers is a gate driver for the one or more phase switches (Fig. 1 of Nakamori discloses the one or more controllers (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is a gate driver for the one or more phase switches 11-16 – see Nakamori, Fig. 1, paragraphs [0048] and [0052]).
For claim 5, Nakamori in view of Umemura disclose the system of claim 1, wherein the one or more controllers includes one or more thermal sensors to measure a temperature of the one or more phase switches (Figs. 1-2 of Nakamori disclose the one or more controllers/point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which includes one or more thermal sensors 18/36 to measure a temperature of the one or more phase switches 11-16 – see Nakamori, Fig. 1, paragraphs [0052] and [0057]).
For claim 6, Nakamori in view of Umemura disclose the system of claim 1, wherein the inverter further includes:
one or more thermistors to measure a temperature of the one or more phase switches (Fig. 1 of Nakamori discloses the inverter 2 which includes one or more thermistors 18 to measure a temperature of the one or more phase switches 11-16 – see Nakamori, Fig. 1, paragraphs [0051]-[0052]).
For claim 7, Nakamori in view of Umemura disclose the system of claim 1, wherein the one or more controllers/point-of-use controller is further configured to control the gate voltage based on a measured temperature of the one or more phase switches measured prior to an active discharge of the inverter (Figs. 1-2 and 4 of Nakamori disclose the one or more controllers/ point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is further configured to control the gate voltage based on a measured temperature of the one or more phase switches 11-16 measured prior to an active discharge of the inverter 2 – see Nakamori, Figs. 1-2 and 4, paragraphs [0051]-[0052], [0057], [0059]-[0060], [0073]-[0077], [0079], lines 1-8 , [0080], lines 1-8 and [0083]).
For claim 8, Nakamori in view of Umemura disclose the system of claim 1, further comprising:
the battery configured to supply the DC power to the inverter (Fig. 1 of Nakamori in view of Fig. 1 of Umemura disclose Umemura’s the battery PB configured to supply the DC power to Nakamori’s inverter 2/Umemura’s inverter 18-20 – see Nakamori, Fig. 1, paragraph [0049] and Umemura, Fig. 1, col. 5, lines 6-10 and col. 6, lines 34-46); and
the motor configured to receive the AC power from the inverter to drive the motor (Fig. 1 of Nakamori discloses the motor 5 configured to receive the AC power from the inverter 2 to drive the motor 5 – see Nakamori, Fig. 1, paragraphs [0049]-[0050]).
Claims 15-19 are "method" claims which are either same or similar to that of the "a system" claims 1, 2, 5, 7, 6, respectively. Explanation is omitted.
Claim 4 is rejected under 35 U.S.C. 103 as being unpatentable over Nakamori (US 2014/0009983 A1) in view of Umemura et al. (hereinafter Umemura, US 5,936,820 A), further in view of Bourniche et al. (hereinafter Bourniche, US 2023/0327597 A1).
For claim 4, Nakamori in view of Umemura disclose all limitations as applied in claim 1 above. Nakamori in view of Umemura discloses the one or more phase switches which are silent for including one or more silicon carbide dies. However, Bourniche discloses an inverter which is similar as Nakamori’s inverter (Figs. 1-2 of Bourniche disclose an inverter 100/200 used to converter DC power from a battery 280 to AC power to drive an electric motor, wherein the inverter 100/200 includes one or more phase switches Q1-Q6 – see Bourniche, Fig. 2, paragraphs [0046]-[0047]), wherein the one or more phase switches includes one or more silicon carbide dies (Figs. 1-2 of Bourniche discloses the one or more phase switches Q1-Q6 which includes one or more silicon carbide dies – see Bourniche, Figs. 1-2, paragraph [0069]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify teaching of Nakamori in view of Umemura to incorporate teaching of Bourniche for purpose of obtaining the highest efficiency for the inverter to meet the specific condition of the particular application.
Claims 9-15 and 20 are rejected under 35 U.S.C. 103 as being unpatentable over Nakamori (US 2014/0009983 A1) in view of Bourniche et al. (hereinafter Bourniche, US 2023/0327597 A1), further in view of Umemura et al. (hereinafter Umemura, US 5,936,820 A).
For claim 9, Nakamori discloses a system (Fig. 1 of Nakamori discloses a system 1 – see Nakamori, Fig. 1, paragraph [0048]) comprising:
a power module for an inverter configured to convert DC power to AC power (Fig. 1 of Nakamori discloses a power module 2 for an inverter 2 to converter DC power to AC power -- see Nakamori, Fig. 1, paragraphs [0049]-[0050]), the power module including a drain terminal and a source terminal (Nakamori discloses the power module 2 which does not include a drain terminal and a source terminal. However, Bourniche discloses an inverter which is similar as Nakamori’s inverter (Figs. 1-2 and 6 of Bourniche disclose a power module for an inverter 100/200/600 used to converter DC power from a battery 280 to AC power to drive an electric motor, wherein the power module includes one or more phase switches Q1-Q6 which include(s) a drain terminal and a source terminal – see Bourniche, Figs. 1-2 and 6, paragraphs [0046]-[0047] and [0071]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify teaching of Nakamori to incorporate teaching of Bourniche by using MOSFETs instead of using IGBTs for purpose of obtaining faster switching speeds and controlling the load current under steady-state or low-frequency conditions to meet the specific condition of the particular application);
one or more phase switches configured to control a current flow between the drain terminal and the source terminal (Fig. 1 of Nakamori in view of Bourniche disclose Nakamori’s phase switches 11-16/Bourniche’s phase switches Q1-Q6 configured to control a current flow between the drain terminal and the source terminal as shown in Fig. 2 and 6-7, paragraphs [0071]-[0073] of Bourniche – see Nakamori, Fig. 1, paragraphs [0049]-[0050] and Bourniche, Figs. 2 and 6-7, paragraphs [0071]-[0073]); and
a point-of-use controller (Figs. 1-2 and 4 of Nakamori disclose a point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) configured to control a gate voltage to the one or more phase switches (Figs. 1-2 and 4 of Nakamori disclose a point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) configured to control a gate voltage to the one or more phase switches 11-16 to discharge the bulk capacitor 510/530/550/580 of the inverter 2 – see Nakamori, Figs. 1-2 and 4, paragraphs [0048], [0052], [0058], [0074]-[0077], [0079]-[0080] and [0083]), wherein the point-of-use controller is configured to control the gate voltage based on one or more of a measured temperature of the one or more phase switches or an estimated temperature of the one or more phase switches (Figs. 1-2 and 4 of Nakamori disclose the point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is configured to control the gate voltage based on one or more of a measured temperature 18/36 of the one or more phase switches 11-16 or an estimated temperature of the one or more phase switches – see Nakamori, Figs. 1-2 and 4, paragraphs [0051]-[0052], [0057] and [0059]-[0060]), and a bulk capacitor (Fig. 4 of Nakamori discloses a bulk capacitor 510/ 530/ 550/580 – see Nakamori, Fig. 4, paragraphs [0077]; [0079], lines 1-8, [0080], lines 1-8; [0082], lines 1-4; and [0083]).
Nakamori discloses a bulk capacitor (Fig. 4 of Nakamori discloses a bulk capacitor 510/ 530/ 550/580 – see Nakamori, Fig. 4, paragraphs [0077]; [0079], lines 1-8, [0080], lines 1-8; [0082]) which is silent to connect to a positive connection of the battery and a negative connection of the battery. Also, Nakamori discloses one or more controllers configured to control a gate voltage to the one or more phase switches to be silent for discharging the bulk capacitor.
However, Umemura discloses a bulk capacitor to connect to a positive connection of the battery and a negative connection of the battery (Fig. 1 of Umemura discloses a bulk capacitor Cap to connect to a positive connection of the battery PB and a negative connection of the battery PB – see Umemura, Fig. 1, col. 5, lines 6-21). Also, Umemura discloses one or more controllers configured to control a gate voltage to the one or more phase switches to discharge the bulk capacitor (Fig. 1 of Umemura discloses one or more controllers (11, controllers 1-3) configured to control a gate voltage to the one or more phase switches 18-20 to discharge the bulk capacitor Cap – see Umemura, Fig. 1, col. 5, lines 6-29).
Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify Nakamori’s system in view of Bourniche to include a bulk capacitor to connect to a positive connection of the battery and a negative connection of the battery as teaching of Umemura for purpose of making suitable for applications that require rapid energy delivery, such as power backup system.
.
For claim 10, Nakamori in view of Bourniche, further in view of Umemura disclose the system of claim 9, wherein the point-of-use controller is an application-specific integrated circuit gate driver for the one or more phase switches (Fig. 1 of Nakamori discloses the point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is an application-specific integrated circuit gate driver (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) for the one or more phase switches 11-16 – see Nakamori, Fig. 1, paragraphs [0048] and [0052]).
For claim 11, Nakamori in view of Umemura disclose all limitations as applied in claim 9 above. Nakamori in view of Umemura discloses the one or more phase switches which are silent for including one or more silicon carbide dies. However, Bourniche discloses an inverter which is similar as Nakamori’s inverter (Figs. 1-2 of Bourniche disclose an inverter 100/200 used to converter DC power from a battery 280 to AC power to drive an electric motor, wherein the inverter 100/200 includes one or more phase switches Q1-Q6 – see Bourniche, Fig. 2, paragraphs [0046]-[0047]), wherein the one or more phase switches includes one or more silicon carbide dies (Figs. 1-2 of Bourniche discloses the one or more phase switches Q1-Q6 which includes one or more silicon carbide dies – see Bourniche, Figs. 1-2, paragraph [0069]. Therefore, it would have been obvious to one of ordinary skill in the art before the effective filling date of the claimed invention to modify teaching of Nakamori in view of Umemura to incorporate teaching of Bourniche for purpose of obtaining the highest efficiency for the inverter to meet the specific condition of the particular application.
For claim 12, Nakamori in view of Umemura disclose the system of claim 9, wherein the one or more controllers includes one or more thermal sensors to measure a temperature of the one or more phase switches (Figs. 1-2 of Nakamori disclose the one or more controllers/point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which includes one or more thermal sensors 18/36 to measure a temperature of the one or more phase switches 11-16 – see Nakamori, Fig. 1, paragraphs [0052] and [0057]).
For claim 13, Nakamori in view of Umemura disclose the system of claim 9, wherein the one or more controllers/point-of-use controller is further configured to control the gate voltage based on a measured temperature of the one or more phase switches measured prior to an active discharge of the inverter (Figs. 1-2 and 4 of Nakamori disclose the one or more controllers/ point-of-use controller (3UL, 3VL, 3WL, 3UU, 3VU and 3WU) which is further configured to control the gate voltage based on a measured temperature of the one or more phase switches 11-16 measured prior to an active discharge of the inverter 2 – see Nakamori, Figs. 1-2 and 4, paragraphs [0051]-[0052], [0057], [0059]-[0060], [0073]-[0077], [0079], lines 1-8 , [0080], lines 1-8 and [0083]).
For claim 14, Nakamori in view of Bourniche, further in view of Umemura disclose the system of claim 9, wherein the point-of-use controller is further configured to control the gate voltage by reducing the gate voltage while maintaining a drain current of the one or more phase switches above a threshold level (see Bourniche, Figs. 7-8, paragraphs [0023]-[0025], [0073] and [0077]-[0078]).
Claim 15 is "method" claims which are either same or similar to that of the "a system" claim 9. Explanation is omitted.
Claim 20 is "method" claims which are either same or similar to that of the "a system" claims 12, 13 and 14, respectively. Explanation is omitted.
Response to Arguments
Applicant’s arguments, see Applicant’s Remarks, page 7, lines 18-19, filed on October 9, 2025, with respect to the rejection(s) of claims 1-20 under 35 U.S.C. 103 have been fully considered and are persuasive. Therefore, the rejection has been withdrawn. However, upon further consideration, a new ground(s) of rejection is made in view of Umemura et al.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to THAI T DINH whose telephone number is (571)270-3852. The examiner can normally be reached (571)270-3852.
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/THAI T DINH/Primary Examiner, Art Unit 2846
Jan 22, 2026
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