DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
RESPONSE TO AMENDMENT
Claim rejections based on prior art
Applicant's arguments filed on 10/03/2025 with respect to claims 1-20 have been fully considered but are not persuasive.
With respect to claim limitation ‘wherein the first I/O configuration comprises a first allocation of one or more of the plurality of computing resources to service one or more I/O queues of the plurality of I/O queues’, taking into consideration that CPUs, GPUs of a server node of Harwood are being equated to claim ‘computing resources’, see paragraph 022 of Harwood, which discloses “hardware processor resources (e.g., CPUs, GPUs, other accelerator devices) of the given server node” and paragraph 0039 of Harwood, which discloses “to enhance performance, a third processor (e.g., CPU) executing on the second host server can be reallocated in place of the first processor (e.g., CPU) for executing the workload in conjunction with the second processor”. Paragraph 0039 of Hardwood teaches of the third processor reallocating to service a wordload/storage that was originally being service by a first processor.
With respect to claim limitation ‘in response to the determination: reassigning the first I/O queue from the first computing resource to a second computing resource of the plurality of computing resources; and migrating a connection for servicing the first I/O queue from the first computing resource to the second computing resource’, see paragraph 0039, which teaches a third processor, resource, replacing a first processor, resource; once that replacement take places, the workload/storage that was being serviced by the first processor is now being serviced by the third processor; therefore, the workload/storage is now reassigned to the third processor, from the first processor.
Note, even though prosecution is now closed, to help expedite any further potential prosecution of this application, Applicant is encouraged to contact the Examiner to discuss the invention, and a potential allowance.
REJECTIONS BASED ON PRIOR ART
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
1. Claims 1-20 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Harwood et al. (US pub. # 2020/0142753), hereinafter, “Harwood”.
At the outset, Applicant is reminded that claims subject to examination will be given their broadest reasonable interpretation in light of the supporting disclosure. In re Morris, 127 F.3d 1048, 1054-55, 44 USPQ2d 1023,1027-28 (Fed. Cir. 1997). With this in mind, the discussion will focus on how the terms and relationships between the terms in the claims are met by the references.
2. As per claims 1, 11 and 16, Harwood discloses a method comprising: determining a change in performance of a plurality of computing resources [see paragraph 022, which discloses “hardware processor resources (e.g., CPUs, GPUs, other accelerator devices) of the given server node”] that are currently servicing a plurality of I/O queues (storage devices 182, as discloses in paragraph 0019) over one or more connections to one or more client computing devices in a first I/O configuration (see paragraphs 0033 and 0043), wherein the first I/O configuration comprises a first allocation of one or more of the plurality of computing resources to service one or more I/O queues of the plurality of I/O queues, and wherein a first computing resource of the plurality of computing resources is allocated to service a first I/O queue of the plurality of I/O queues [see paragraph 0039, which discloses “To enhance performance, a third processor (e.g., CPU) executing on the second host server can be reallocated in place of the first processor (e.g., CPU) for executing the workload in conjunction with the second processor. In this instance, dynamic resource reallocation is performed to migrate the workload to be executed by a CPU on the same host server as the accelerator resource. In another embodiment, dynamic resource reallocation can be performed by allocating different processors altogether (e.g., utilizing third and fourth processors in place of the first and second processors) which reside on the same host server or different host servers. In this instance, the running workload can be migrated to another server if, for example, the server provides higher bandwidth and lower latency to the specialized accelerator resource. The workload can be migrated to a server which is different than the server containing the specialized hardware if the bottleneck is the CPU and the server with the specialized hardware is loaded. Another consideration is to perform active management of resources and invoke QoS controls in an application server, a resource server, or a network to address bottlenecks”]; determining, in response to the determined change in performance, a second I/O configuration for the plurality of computing resources, wherein the second I/O configuration comprises a second allocation of the one or more of the plurality of computing resources to service one or more I/O queues of the plurality of I/O queues [see paragraph 0037, which discloses “FIG. 2 is a flow diagram of a method for dynamically reallocating resources during run-time execution of workloads in distributed XaaS computing system, according to an embodiment of the invention. In one embodiment, FIG. 2 illustrates operating modes of various modules of the service controller 140 in the accelerator service platform 130 of FIG. 1. The accelerator service platform 130 executes a given workload using an initial set of resources that are allocated to the given workload by the resource allocation and provisioning module 142 (block 200). During real-time execution of the given workload, the workload monitor module 143 of the service controller 140 will monitor the performance of the executing workload in real-time to detect a bottleneck condition which causes a decrease in the performance of the executing workload (block 204). In response to detecting a bottleneck condition (affirmative determination in block 206), the resource allocation and provisioning module 142 will determine and provision a second set of resources to reallocate to the executing workload, with the expectation that such reallocation will increase the performance of the executing workload by either mitigating or eliminating the detected bottleneck condition (block 208). The live migration module 144 is then invoked to perform a live migration process to move the executing workload to the reallocated set of resources (block 210). The workload execution continues using the reallocated set of resources, and the monitoring continues to detect for bottleneck conditions of the executing workload (block 204). In another embodiment, live migration of the workload will be performed when the cost of movement is not significant as compared to the gain in performance”]; in response to the determination: reassigning the first I/O queue from the first computing resource to a second computing resource of the plurality of computing resources (see paragraph 0039, which teaches a third processor, resource, replacing a first processor, resource; once that replacement take places, the workload/storage that was being serviced by the first processor is now being serviced by the third processor; therefore, the workload/storage is now reassigned to the third processor, from the first processor); and migrating a connection for servicing the first I/O queue from the first computing resource to the second computing resource (see paragraph 0039); and servicing, in the second I/O configuration, one or more I/O operations associated with the first I/O queue by the second computing resource of the plurality of computing resources that is different from the first computing resource (see paragraphs 0037 and 0044).
3. As per claims 2, 12 and 17, Harwood discloses “The method of claim 1” [see rejection to claim 1 above], wherein determining the change in performance further comprises: determining that one or more computing resources of the plurality of computing resources fail to meet one or more target performance metrics (see paragraph 0045).
4. As per claim 3, Harwood discloses wherein the one or more target performance metrics include one or more of a target latency metric, a target I/O processing metric, a target CPU utilization metric, or a target bandwidth metric (see paragraph 0044).
5. As per claims 4, 13 and 18, Harwood discloses wherein determining the change in performance further comprises: determining that an I/O load on one or more of the plurality of computing resources exceeds a threshold (see paragraph 0046).
6. As per claims 5, 14 and 19, Harwood discloses wherein the first I/O configuration includes a first load balancing configuration, and wherein determining the second I/O configuration for the plurality of computing resources further comprises: determining a second load balancing configuration; and determining a second I/O configuration that includes the second load balancing configuration (see paragraph 0042).
7. As per claims 6, 15 and 20, Harwood discloses wherein the plurality of computing resources includes a first set of I/O queue management computing resources and a second set of I/O processing computing resources, and wherein applying the second I/O configuration to the plurality of computing resources further comprises: deallocating a computing resource from the first set of I/O queue management computing resources; and allocating the computing resource to the second set of I/O processing computing resources (see paragraphs 0037and 0045).
8. As per claim 7, Harwood discloses wherein applying the second I/O configuration to the plurality of computing resources further comprises: deallocating a computing resource from a third set of computing resources that is not currently performing I/O queue management or I/O processing; and allocating the computing resource to the first set of I/O queue management computing resources or the second set of I/O processing computing resources (see paragraphs 0037 and 0045).
9. As per claim 8, Harwood discloses wherein a first computing resource of the plurality of computing resources is currently servicing a first I/O queue over a connection of the one or more connections, and wherein applying the second I/O configuration further comprises: while the first computing resource is servicing the first I/O queue, determining that an additional computing resource has become available; and migrating the connection for servicing the first I/O queue to the additional computing resource (see paragraphs 0044 and 0045).
10. As per claim 9, Harwood discloses wherein applying the second I/O configuration to the plurality of computing resources further comprises: increasing or decreasing a number of I/O queues to be serviced by a particular computing resource of the plurality of computing resources (see paragraph 0044).
11. As per claim 10, Harwood discloses wherein applying the second I/O configuration to the plurality of computing resources further comprises: increasing or decreasing a number of computing resources of the plurality of computing resources (see paragraphs 0039 and 0046).
CLOSING COMMENTS
Conclusion
a. STATUS OF CLAIMS IN THE APPLICATION
The following is a summary of the treatment and status of all claims in the application as recommended by M.P.E.P. 707.07(i):
a(1) CLAIMS REJECTED IN THE APPLICATION
Per the instant office action, claims 1-20 have received a final action on the merits.
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
b. DIRECTION OF FUTURE CORRESPONDENCES
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ernest Unelus whose telephone number is (571) 272-8596. The examiner can normally be reached on Monday to Friday 9:00 AM to 5:00 PM.
IMPORTANT NOTE
If attempts to reach the above noted Examiner by telephone are unsuccessful, the Examiner's supervisor, Mr. Idriss Alrobaye, can be reached at the following telephone number: Area Code (571) 270-1023.
The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/Ernest Unelus/
Primary Examiner
Art Unit 2181