DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant’s election without traverse of Invention I (claims 1-13) in the reply filed on 1-8-2026 is acknowledged.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1-13 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Lee (US 2021/0210426).
[claim 1] A semiconductor device (fig. 7H, 4, 5), comprising: a staircase structure (169A, 169C, 113, 167,105,169B, fig. 7H, 113 is labelled in fig. 7D, fig. 4) disposed on a dielectric substrate (103, fig. 7H, labelled in fig. 7F, [0076]), wherein the staircase structure comprises a plurality of conductive layers (169A, 169C, fig. 7H, [0101]) and a plurality of insulating layers (113, fig. 7H, labelled in fig. 7D, [0098]) alternately stacked on each other; and an extension part (105, fig. 7H) located at an (bottom) end of a lower stair part of the staircase structure, wherein a resistance value of the extension part is different from a resistance value of the plurality of conductive layers (extension part 105 is made of doped silicon [0077] while conductive layers 169A,169C is made of a metal [0101].
[claim 2] The semiconductor device according to claim 1, wherein the resistance value of the extension part is higher than the resistance value of the plurality of conductive layers (doped silicon has a higher resistivity than a metal [0077][0101]).
[claim 3] The semiconductor device according to claim 1, wherein the extension part comprises a semiconductor material (silicon, [0077]), and the plurality of conductive layers comprise a metal material [0101].
[claim 4] The semiconductor device according to claim 1, further comprising: a connection part (UCPb, fig. 4, 169B, fig. 7H, [0099]) located in the lower stair part and electrically connected to the conductive layers of the lower stair part (fig. 7H, 4).
[claim 5] The semiconductor device according to claim 4, wherein a width of the connection part is less than a thickness of the conductive layers (see fig. 4, if the thickness of the conductive layers is defined as UCPa into the page in fig. 4 and width of the connection part UCPb is the horizontal direction in fig. 4 the requirement is met).
[claim 6] The semiconductor device according to claim 4, further comprising: a support pillar (171, fig. 7H) extending through the conductive layers and the insulating layers of the staircase structure.
[claim 7] The semiconductor device according to claim 6, wherein the connection part is staggered with the support pillar (the support pillar 171 and connection part 169B alternate with one another in fig. 7H, see also fig. 1 and fig. 2).
[claim 8] The semiconductor device according to claim 4, wherein the connection part comprises a connection via or a connection wall (169B, Fig. 7H/UCPb, fig. 4 acta s as a connection wall).
[claim 9] The semiconductor device according to claim 8, further comprising: a separation wall (171, fig. 7H) extending through the staircase structure, wherein an extending direction of the connection wall (downward in fig. 7H) is different from an extending direction of the separation wall (into the page in fig. 7H).
[claim 10] The semiconductor device according to claim 1, further comprising: a channel pillar (137, fig. 7H) extending through the staircase structure; a plurality of conductive pillars (top and bottom portions of 139, fig. 7H) located in the channel pillar and electrically connected to the channel pillar; and a charge storage layer (133, fig. 7H, [0082], see fig. 7B where it is labelled) located between the conductive layers and the channel pillar.
[claim 11] The semiconductor device according to claim 10, wherein the charge storage layer is further located between the extension part (169B, fig. 7H) and the lower stair part of the staircase structure (staircase includes parts of 169A on the other side of 130 in fig. 7H).
[claim 12] The semiconductor device according to claim 1, wherein among the plurality of conductive layers, a thickness of the conductive layer connected to the extension part is not greater than a thickness of the conductive layer not connected to the extension part (fig. 7H).
[claim 13] The semiconductor device according to claim 1, further comprising: a plurality of contacts (175B, fig. 7H) landed on the plurality of conductive layers, wherein the plurality of contacts is not landed on the extension part (fig. 7H).
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AMAR MOVVA whose telephone number is (571)272-9009. The examiner can normally be reached Monday-Friday 9AM-5PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Julio Maldonado can be reached at 571-272-1864. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/AMAR MOVVA/Primary Examiner, Art Unit 2898