Prosecution Insights
Last updated: April 19, 2026
Application No. 18/312,279

Methods and Devices for Self-Interference Cancelation

Final Rejection §102§103
Filed
May 04, 2023
Examiner
GHOWRWAL, OMAR J
Art Unit
2463
Tech Center
2400 — Computer Networks
Assignee
Apple Inc.
OA Round
2 (Final)
85%
Grant Probability
Favorable
3-4
OA Rounds
2y 9m
To Grant
99%
With Interview

Examiner Intelligence

Grants 85% — above average
85%
Career Allow Rate
691 granted / 815 resolved
+26.8% vs TC avg
Strong +30% interview lift
Without
With
+30.3%
Interview Lift
resolved cases with interview
Typical timeline
2y 9m
Avg Prosecution
26 currently pending
Career history
841
Total Applications
across all art units

Statute-Specific Performance

§101
7.4%
-32.6% vs TC avg
§103
46.4%
+6.4% vs TC avg
§102
26.5%
-13.5% vs TC avg
§112
12.2%
-27.8% vs TC avg
Black line = Tech Center average estimate • Based on career data from 815 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Response to Remarks This Office action is considered fully responsive to the amendment filed 03/09/2026. The previous objection to the Title is withdrawn in light of Applicant’s amendments. The previous objection to the trademarks is maintained as it has not been addressed. Response to Arguments Applicant's arguments filed 03/09/2026 have been fully considered but they are not persuasive. Applicant argues: Rimini approximates a single distorted waveform from a single baseband signal, whereas claim 1 recites filters that are used to estimate two separate interference signals from two separate amplifiers (pages 9-10, Remarks). Examiner respectfully disagrees. Fig. 7 of Rimini illustrates two outputs from the Volterra Filter, one at Cos(w1n) the other at Sin(w1n), from 2nd and 4th order amplifiers, respectively. These outputs are interference signals as they are fed into the subtractor block prior to FFT 624 to be subtracted from the corrupted received signal as discussed at para. 0060. Applicant argues: The Digital LPFs are used to cancel a single baseband signal and not first and second interference signals, and cites to paras. 0059, 0063 of Rimini to support this (page 10, Remarks). Examiner respectfully disagrees. As para. 0060, cited by Examiner, states: “Error=corrupted received signal-non-linear filter output.” The non-linear filter output is a combination of interference signals from Cos(w1n) and Sin(w1n) as clearly shown in fig. 7. This combination is then subtracted from the corrupted received signal. Applicant argues the instant claims are therefore allowable (pages 10-11, Remarks). Examiner respectfully disagrees. All previous rejections have been maintained and all previously indicated allowable subject matter has been identified. Specification The title of the invention is not descriptive. A new title is required that is clearly indicative of the invention to which the claims are directed. The following title is suggested: COMMUNICATION CIRCUIT, WIRELESS DEVICE, AND METHOD FOR FILTERING INTERFERENCE SIGNALS The use of the term WiMax, WiFi, Bluetooth, which is a trade name or a mark used in commerce, has been noted in this application. The term should be accompanied by the generic terminology; furthermore the term should be capitalized wherever it appears or, where appropriate, include a proper symbol indicating use in commerce such as ™, SM , or ® following the term. Although the use of trade names and marks used in commerce (i.e., trademarks, service marks, certification marks, and collective marks) are permissible in patent applications, the proprietary nature of the marks should be respected and every effort made to prevent their use in any manner which might adversely affect their validity as commercial marks. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claim(s) 1-3, 8-9, 11, 15, 17 is/are rejected under 35 U.S.C. 102(a)(1) as being anticipated by U.S. Publication No. 2011/0149714 A1 to Rimini et al. (“Rimini”) [provided in Applicant’s IDS]. As to claim 1, Rimini discloses a communication circuit (fig. 7, 700) comprising: a signal path circuit (fig. 7, Tx Mod, IFFT, Volterra Filter, Cos, Sin, Digital LPFs taken together as a “signal path circuit”) configured to: estimate, using a first kernel dimension filter (fig. 7, DC Rmv (at 2nd order), i.e. filtering DC, “kernel dimension filter” not explicitly defined in instant specification, therefore DC filter at a specific order would be equivalent to the ordinary and customary meaning of “kernel dimension filter”) and a first delay tap dimension filter (fig. 7, Digital LPF 618 with Cos(w1n) (i.e. phase delay)), a first interference signal (para. 0002, cancelling self-jamming interference in a transceiver using Volterra filters, i.e. the output pertains to interference) from a first amplifier (para. 0060, fig. 7, output of 618 (i.e. calculated/estimated) being based on signal generated at the second order (i.e. amplified)), and estimate, using a second kernel dimension filter (fig. 7, DC Rmv (at 4th order), i.e. filtering DC, “kernel dimension filter” not explicitly defined in instant specification, therefore DC filter at a specific order would be equivalent to the ordinary and customary meaning of “kernel dimension filter”) and a second delay tap dimension filter (fig. 7, Digital LPF 618 with Sin(w1n) (i.e. phase delay)), a second interference signal (para. 0002, cancelling self-jamming interference in a transceiver using Volterra filters, i.e. the output pertains to interference) from a second amplifier (para. 0060, fig. 7, output of 618 (i.e. calculated/estimated) being based on signal generated at the fourth order (i.e. amplified)); and a cancellation circuit (fig. 7, subtracter block prior to FFT 624) configured to subtract a combination of the estimated first interference signal and the estimated second interference signal from a received signal to obtain a filtered received signal (fig. 7 para. 0060, Error=corrupted received signal-non-linear filter output (i.e. being the illustrated combination of outputs from Digital LPFs 618)), wherein the combination of the estimated first interference signal and the estimated second interference signal is representative of signal interference caused by signal leakage into a receive path of the received signal (para. 0058-0059, As illustrated in FIG. 6, a signal is received by an antenna 606. The signal may be a combination of the intended received signal and the Tx leakage signal. The constructed distortion signal 620 (i.e. the combination) is then subtracted from the signal to cancel the interference from the Tx leakage.). As to claim 2, Rimini further discloses the communication circuit of claim 1, further comprising: one or more receive chains (fig. 7, at 606 to 608, 612, 614, 616, 618, 622, 624); a first transmit chain comprising the first amplifier (fig. 7, Tx mod to IFFT to order 2); a second transmit chain comprising the second amplifier (fig. 7, Tx mod to IFFT to order 4); and one or more antennas coupled to the one or more receive chains and the first transmit chain (fig. 7, antenna 606 connected to both via arrows). As to claim 3, Rimini further discloses the communication circuit of claim 1, wherein the signal path circuit is further configured to: obtain the estimated first interference signal by applying a first filter circuit that comprises the first kernel dimension filter and the first delay tap dimension filter to an input signal of the first amplifier (fig. 7, output of 2nd order Digital LPF is calculated from IFFT input to 2nd order (i.e. first amplifier) which is passed through DC Rmv (i.e. first kernel dimension filter) , and Cos(w1n) with Digital LPF (i.e. first delay tap dimension filter, these taken together being a first filter circuit); and obtain the estimated second interference signal by applying a second filter circuit that comprises the second kernel dimension filter and the second delay tap dimension filter to an input signal of the second amplifier (fig. 7, output of 4th order Digital LPF is calculated from IFFT input to 4th order (i.e. second amplifier) which is passed through DC Rmv (i.e. second kernel dimension filter) , and Cos(w1n) with Digital LPF (i.e. second delay tap dimension filter, these taken together being a second filter circuit). As to claim 8, Remini further discloses the communication circuit of claim 1, wherein the signal path circuit comprises: a combiner (fig. 7, adder prior to FFT 624) configured to combine the estimated first interference signal with the estimated second interference signal to obtain the combination of the estimated first interference signal and the estimated second interference signal (fig. 7, para. 0059, para. 0060, Error=corrupted received signal-non-linear filter output (i.e. being the illustrated combination of outputs from Digital LPFs 618 at the adder)). As to claim 9, Rimini discloses a wireless communication device (fig. 7, 700, illustrating interconnected components with antenna 606 for wireless communication) comprising: one or more receive chains (fig. 7, at 606 to 608, 612, 614, 616, 618, 622, 624); a first transmit chain comprising a first amplifier (fig. 7, Tx mod to IFFT to order 2); a second transmit chain comprising a second amplifier (fig. 7, Tx mod to IFFT to order 4); one or more antennas coupled to the one or more receive chains and the first transmit chain (fig. 7, antenna 606 connected to both via arrows); and cancellation circuitry (fig. 7, Tx Mod, IFFT, Volterra Filter, Cos, Sin, Digital LPFs, subtractor block prior to FFT 624 taken together as a “cancellation circuitry”) configured to: estimate, using a first kernel dimension filter (fig. 7, DC Rmv (at 2nd order), i.e. filtering DC, “kernel dimension filter” not explicitly defined in instant specification, therefore DC filter at a specific order would be equivalent to the ordinary and customary meaning of “kernel dimension filter”) and a first delay tap dimension filter (fig. 7, Digital LPF 618 with Cos(w1n) (i.e. phase delay)), a first interference signal (para. 0002, cancelling self-jamming interference in a transceiver using Volterra filters, i.e. the output pertains to interference) from a first amplifier (para. 0060, fig. 7, output of 618 (i.e. calculated/estimated) being based on signal generated at the second order (i.e. amplified)), estimate, using a second kernel dimension filter (fig. 7, DC Rmv (at 4th order), i.e. filtering DC, “kernel dimension filter” not explicitly defined in instant specification, therefore DC filter at a specific order would be equivalent to the ordinary and customary meaning of “kernel dimension filter”) and a second delay tap dimension filter (fig. 7, Digital LPF 618 with Sin(w1n) (i.e. phase delay)), a second interference signal (para. 0002, cancelling self-jamming interference in a transceiver using Volterra filters, i.e. the output pertains to interference) from a second amplifier (para. 0060, fig. 7, output of 618 (i.e. calculated/estimated) being based on signal generated at the fourth order (i.e. amplified)), and subtract a combination of the estimated first interference signal and the estimated second interference signal from a received signal to obtain a filtered received signal (fig. 7 para. 0060, Error=corrupted received signal-non-linear filter output (i.e. being the illustrated combination of outputs from Digital LPFs 618)), wherein the combination of the estimated first interference signal and the estimated second interference signal is representative of signal interference associated with the first amplifier and the second amplifier and affecting the received signal (para. 0058-0059, As illustrated in FIG. 6, a signal is received by an antenna 606. The signal may be a combination of the intended received signal and the Tx leakage signal. The constructed distortion signal 620 (i.e. the combination) is then subtracted from the signal to cancel the interference from the Tx leakage; fig. 7, associated with order 2 and order 4 (i.e. amplifiers) via connections). As to claim 11, Rimini further discloses the wireless communication device of claim 9, wherein the cancellation circuitry is further configured to: obtain the estimated first interference signal by applying a first filter circuit that comprises the first kernel dimension filter and the first delay tap dimension filter to an input signal of the first amplifier (fig. 7, output of 2nd order Digital LPF is calculated from IFFT input to 2nd order (i.e. first amplifier) which is passed through DC Rmv (i.e. first kernel dimension filter) , and Cos(w1n) with Digital LPF (i.e. first delay tap dimension filter, these taken together being a first filter circuit); and obtain the estimated second interference signal by applying a second filter circuit that comprises the second kernel dimension filter and the second delay tap dimension filter to an input signal of the second amplifier (fig. 7, output of 4th order Digital LPF is calculated from IFFT input to 4th order (i.e. second amplifier) which is passed through DC Rmv (i.e. second kernel dimension filter) , and Cos(w1n) with Digital LPF (i.e. second delay tap dimension filter, these taken together being a second filter circuit). As to claims 15, 17, see similar rejections as to claims 9, 11, respectively. The apparatus teaches the method. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows: 1. Determining the scope and contents of the prior art. 2. Ascertaining the differences between the prior art and the claims at issue. 3. Resolving the level of ordinary skill in the pertinent art. 4. Considering objective evidence present in the application indicating obviousness or nonobviousness. This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention. Claim(s) 5, 10, 16 is/are rejected under 35 U.S.C. 103 as being unpatentable over U.S. Publication No. 2011/0149714 A1 to Rimini et al. (“Rimini”) [provided in Applicant’s IDS] in view of U.S. Publication No. 2018/0026775 A1 to CHEN et al. (“Chen”). As to claim 5, Rimini does not expressly disclose the communication circuit of claim 1, further comprising: one or more filter adaptation circuits configured to: alternate between a kernel update phase and a delay update phase, update the first kernel dimension filter and the second kernel dimension filter during the kernel update phase, and update the first delay tap dimension filter and the second delay tap dimension filter during the delay update phase. Chen discloses at para. 0127 and fig. 16: separately applying a kernel dimension filter and a delay tap dimension filter to an input signal for an amplifier to obtain an estimated interference signal (1610), subtracting the estimated interference signal from a received signal to obtain a clean signal (1620), and alternating between updating the kernel dimension filter and updating the delay tap dimension filter using the clean signal (1630). Examiner notes this could easily be applied to both groups of filters of Rimini. Prior to the effective filing date of invention, it would have been obvious to a person of ordinary skill in the art to incorporate the updating of filters as taught by Chen into the invention of Rimini. The suggestion/motivation would have been to provide self-interference cancelation (Chen, para. 0001). Including the updating of filters as taught by Chen into the invention of Rimini was within the ordinary ability of one of ordinary skill in the art based on the teachings of Chen. As to claim 10, Rimini does not expressly disclose the wireless communication device of claim 9, wherein the cancellation circuitry comprises one or more filter adaptation circuits configured to: alternate between a kernel update phase and a delay update phase; update the first kernel dimension filter and the second kernel dimension filter during the kernel update phase; and update the first delay tap dimension filter and the second delay tap dimension filter during the delay update phase. Chen discloses at para. 0127 and fig. 16: separately applying a kernel dimension filter and a delay tap dimension filter to an input signal for an amplifier to obtain an estimated interference signal (1610), subtracting the estimated interference signal from a received signal to obtain a clean signal (1620), and alternating between updating the kernel dimension filter and updating the delay tap dimension filter using the clean signal (1630). Examiner notes this could easily be applied to both groups of filters of Rimini. Prior to the effective filing date of invention, it would have been obvious to a person of ordinary skill in the art to incorporate the updating of filters as taught by Chen into the invention of Rimini. The suggestion/motivation would have been to provide self-interference cancelation (Chen, para. 0001). Including the updating of filters as taught by Chen into the invention of Rimini was within the ordinary ability of one of ordinary skill in the art based on the teachings of Chen. As to claim 16, see similar rejection to claim 10. The apparatus teaches the method. Allowable Subject Matter Claims 4, 6-7, 12-14, 18-20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. Conclusion THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to OMAR J GHOWRWAL whose telephone number is (571)270-5691. The examiner can normally be reached M-F 9:00am-6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, ASAD NAWAZ can be reached at 571-272-3988. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /OMAR J GHOWRWAL/Primary Examiner, Art Unit 2463
Read full office action

Prosecution Timeline

May 04, 2023
Application Filed
Nov 21, 2025
Non-Final Rejection — §102, §103
Mar 09, 2026
Response Filed
Apr 04, 2026
Final Rejection — §102, §103 (current)

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Prosecution Projections

3-4
Expected OA Rounds
85%
Grant Probability
99%
With Interview (+30.3%)
2y 9m
Median Time to Grant
Moderate
PTA Risk
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