DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is in response to the filling of the Amendment on 03/09/2026.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1, 3, 4, 8-10, 12, 14, 15, 19-21 and 23-25 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Kim et al. (US 2021/0313886), hereinafter Kim.
Regarding claim 1, Kim discloses (see figures 1-9) a closed-loop feedback control system (figures 1 and 2, part 10), comprising: a first feedback control loop (figure 2, part first feedback control loop 13) configured to regulate a first physical quantity (figures 1 and 2, part VFC) (paragraph [0045]; The flying capacitor voltage controller 13); a second feedback control loop (figure 2, part second feedback control loop 12) orthogonal to the first feedback control loop (figure 2, part first feedback control loop 13) and configured to regulate a second physical quantity (figures 1 and 2, part IL) (paragraph [0043]; The current controller 12); and a correction block (figure 2, part correction block generated by 133 and 134) configured to apply a correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) to the first feedback control loop (figure 2, part first feedback control loop 13) based on a parameter of the second feedback control loop (figure 2, part second feedback control loop 12; based on IL) (paragraphs [0041]-[0048]).
Regarding claim 3, Kim discloses everything claimed as applied above (see claim 1). Further, Kim discloses (see figures 1-9) the correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) is applied to an error signal (figure 2, part error signal from 132) representative of a difference (figure 2, part 131) between a measurement of the first physical quantity (figures 1 and 2, part VFC) and a setpoint for the first physical quantity (figures 1 and 2, part VFC*) (paragraph [0045]).
Regarding claim 4, Kim discloses everything claimed as applied above (see claim 1). Further, Kim discloses (see figures 1-9) the first feedback control loop (figure 2, part first feedback control loop 13) regulates a first amount of stored energy (figures 1 and 2, part VFC) of a first energy storage element (figure 1, part CFC) of a switched mode power supply (figure 1, part switched mode power supply); and the second feedback control loop (figure 2, part second feedback control loop 12) regulates a second amount of stored energy (figures 1 and 2, part IL) of a second energy storage element (figure 1, part L) of the switched mode power supply (figure 1, part switched mode power supply).
Regarding claim 8, Kim discloses everything claimed as applied above (see claim 1). Further, Kim discloses (see figures 1-9) the first physical quantity (figures 1 and 2, part VFC) comprises a voltage (figures 1 and 2, part VFC) across a capacitor (figure 1, part CFC) of a multi-level switched mode power supply (figure 1, part multi-level switched mode power supply) (paragraph [0003]; A DC-to-DC converter that converts a source of direct current (DC) from one voltage level to another is widely used in various electronic devices); and the second physical quantity (figures 1 and 2, part IL) comprises an inductor current (figures 1 and 2, part IL) flowing through an inductor (figure 1, part L) of the multi-level switched mode power supply (figure 1, part multi-level switched mode power supply).
Regarding claim 9, Kim discloses everything claimed as applied above (see claim 8). Further, Kim discloses (see figures 1-9) the correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) is applied to an error signal (figure 2, part error signal from 132) of the first feedback control loop (figure 2, part first feedback control loop 13) and is based on a measurement of the inductor current (figures 1 and 2, part IL).
Regarding claim 10, Kim discloses everything claimed as applied above (see claim 9). Further, Kim discloses (see figures 1-9) the error signal (figure 2, part error signal from 132) is indicative of a difference (figure 2, part 131) between the voltage (figures 1 and 2, part VFC) and a reference voltage (figures 1 and 2, part VFC*) derived from an input voltage (figures 1 and 2, part VDC) to the multi-level switched mode power supply (figure 1, part multi-level switched mode power supply) (paragraph [0039]; The controller 10 receives a detection voltage VFC that is a measured voltage applied to the second capacitor CFC, compares the detection voltage VFC with a second voltage instruction value that is preset, and calculates a difference therebetween. The voltage instruction value is preset by the upper-level controller and is about half the voltage of the first capacitor CDC).
Regarding claim 12, claim 1 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 14, claim 3 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 15, claim 4 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 19, claim 8 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 20, claim 9 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 21, claim 10 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 23, Kim discloses (see figures 1-9) an integrated circuit (figures 1 and 2, part 10) (paragraphs [0068]-[0069]), comprising: circuitry (figure 2, part 13) implementing a first feedback control loop (figure 2, part first feedback control loop 13) configured to regulate a first physical quantity (figures 1 and 2, part VFC) (paragraph [0045]; The flying capacitor voltage controller 13); circuity (figure 2, part 12) implementing a second feedback control loop (figure 2, part second feedback control loop 12) orthogonal to the first feedback control loop (figure 2, part first feedback control loop 13) and configured to regulate a second physical quantity (figures 1 and 2, part IL) (paragraph [0043]; The current controller 12); and circuitry (figure 2, parts 133 and 134) implementing a correction block (figure 2, part correction block generated by 133 and 134) configured to apply a correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) to the first feedback control loop (figure 2, part first feedback control loop 13) based on a parameter of the second feedback control loop (figure 2, part second feedback control loop 12; based on IL) (paragraphs [0041]-[0048]).
Regarding claim 24, Kim discloses everything claimed as applied above (see claim 23). Further, Kim discloses (see figures 1-9) circuitry (figure 1, parts S1-S4, CFC and L) implementing a power converter (figure 1, part power converter generated by S1-S4, CFC and L) (paragraph [0030]; FIG. 1 is a circuit diagram of a DC-to-DC converter), wherein the first physical quantity (figures 1 and 2, part VFC) and the second physical quantity (figures 1 and 2, part IL) are physical quantities (figures 1 and 2, part VFC and IL) associated with operation of the power converter (figure 1, part power converter generated by S1-S4, CFC and L).
Regarding claim 25, Kim discloses everything claimed as applied above (see claim 23). Further, Kim discloses (see figures 1-9) the first physical quantity (figures 1 and 2, part VFC) and the second physical quantity (figures 1 and 2, part IL) are physical quantities (figures 1 and 2, part VFC and IL) associated with operation of a power converter (figure 1, part power converter generated by S1-S4, CFC and L) external to the integrated circuit (figures 1 and 2, part 10).
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 2, 5-7, 11, 13, 16-18 and 22 are rejected under 35 U.S.C. 103 as being unpatentable over Kim et al. (US 2021/0313886), hereinafter Kim, in view of Zilio (US 2021/0152100).
Regarding claim 2, Kim discloses everything claimed as applied above (see claim 1). Further, Kim discloses (see figures 1-9) the correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) is applied to an error signal (figure 2, part error signal from 132) representative of a difference (figure 2, part 131) between a measurement of the first physical quantity (figures 1 and 2, part VFC) and a setpoint for the first physical quantity (figures 1 and 2, part VFC*) (paragraph [0045]). However, Kim does not expressly disclose the correction term is applied in a feedback path of the first feedback control loop to a measurement of the first physical quantity.
Zilio teaches (see figures 1-26) the correction term (figure 23, part correction term at 106 from Vc) is applied in a feedback path of the first feedback control loop (figure 23, part first feedback control loop generated between 101-104) to a measurement of the first physical quantity (figure 23, part ILavg) (paragraph [0147]; The average current signal ILavg is proportional to the current flowing through the inductor of the multilevel converter).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to incorporate the closed-loop feedback control system features as taught by Zilio to the closed-loop feedback control system of Kim and obtain the correction term is applied in a feedback path of the first feedback control loop to a measurement of the first physical quantity, because it provides more efficient control method that improve the performance of the multilevel converter (paragraph [0042]).
Regarding claim 5, Kim discloses everything claimed as applied above (see claim 1). Further, Kim discloses (see figures 1-9) the first physical quantity (figures 1 and 2, part VFC) comprises a voltage (figures 1 and 2, part VFC) across a capacitor (figure 1, part CFC) of a multi-level switched mode power supply (figure 1, part multi-level switched mode power supply) (paragraph [0003]; A DC-to-DC converter that converts a source of direct current (DC) from one voltage level to another is widely used in various electronic devices); and the second physical quantity (figures 1 and 2, part IL) comprises an inductor current (figures 1 and 2, part IL) flowing through an inductor (figure 1, part L) of the multi-level switched mode power supply (figure 1, part multi-level switched mode power supply). However, Kim does not expressly disclose the first physical quantity comprises an inductor current flowing through an inductor of a multi-level switched mode power supply; and the second physical quantity comprises a voltage across a capacitor of the multi-level switched mode power supply.
Zilio teaches (see figures 1-26) the first physical quantity (figure 23, part ILavg) comprises an inductor current (figure 23, part ILavg) flowing through an inductor (figure 1, part Lo) of a multi-level switched mode power supply (figure 1, part 100) (paragraph [0147]; The average current signal ILavg is proportional to the current flowing through the inductor of the multilevel converter); and the second physical quantity (figure 23, part Vc) comprises a voltage (figures 1 and 23, part Vc) across a capacitor (figure 1, part Ccp) of the multi-level switched mode power supply (figure 1, part 100) (paragraph [0161]; the flying capacitor voltage adjustment loop comprises a third combiner 105, a flying capacitor voltage controller 108 and a fourth combiner 107. The third combiner 105 is configured to receive the voltage across the flying capacitor and a predetermined flying capacitor reference voltage Vc_ref).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to incorporate the closed-loop feedback control system features as taught by Zilio to the closed-loop feedback control system of Kim and obtain the first physical quantity comprises an inductor current flowing through an inductor of a multi-level switched mode power supply; and the second physical quantity comprises a voltage across a capacitor of the multi-level switched mode power supply, because it provides more efficient control method that improve the performance of the multilevel converter (paragraph [0042]).
Regarding claim 6, Kim and Zilio teach everything claimed as applied above (see claim 5). Further, Kim discloses (see figures 1-9) the correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) is applied to an error signal (figure 2, part error signal from 132) of the first feedback control loop (figure 2, part first feedback control loop 13) and is based on a measurement of the inductor current (figures 1 and 2, part IL). However, Kim does not expressly disclose the correction term is applied to a measurement of the inductor current in a feedback path of the first feedback control loop based on a balance factor generated from an error signal of the second feedback control loop.
Zilio teaches (see figures 1-26) the correction term (figure 23, part correction term at 106 from Vc) is applied to a measurement of the inductor current (figure 23, part ILavg) (paragraph [0147]; The average current signal ILavg is proportional to the current flowing through the inductor of the multilevel converter) in a feedback path of the first feedback control loop (figure 23, part first feedback control loop generated between 101-104) based on a balance factor generated from an error signal (figure 23, part error signal from 105) of the second feedback control loop (figure 23, part second feedback control loop generated between 105 and 108) (paragraph [0161]; the flying capacitor voltage adjustment loop comprises a third combiner 105, a flying capacitor voltage controller 108 and a fourth combiner 107. The third combiner 105 is configured to receive the voltage across the flying capacitor and a predetermined flying capacitor reference voltage Vc_ref).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to incorporate the closed-loop feedback control system features as taught by Zilio to the closed-loop feedback control system of Kim and obtain the correction term is applied to a measurement of the inductor current in a feedback path of the first feedback control loop based on a balance factor generated from an error signal of the second feedback control loop, because it provides more efficient control method that improve the performance of the multilevel converter (paragraph [0042]).
Regarding claim 7, Kim and Zilio teach everything claimed as applied above (see claim 6). Further, Kim discloses (see figures 1-9) the error signal (figure 2, part error signal from 132) is indicative of a difference between the voltage (figure 2, part VFC) and a reference voltage (figure 2, part VFC*) derived from an input voltage (figures 1 and 2, part VDC) to the multi-level switched mode power supply (figure 1, part multi-level switched mode power supply) (paragraph [0039]; The controller 10 receives a detection voltage VFC that is a measured voltage applied to the second capacitor CFC, compares the detection voltage VFC with a second voltage instruction value that is preset, and calculates a difference therebetween. The voltage instruction value is preset by the upper-level controller and is about half the voltage of the first capacitor CDC).
Regarding claim 11, Kim discloses everything claimed as applied above (see claim 1). Further, Kim discloses (see figures 1-9) the second feedback control loop (figure 2, part second feedback control loop 12) and the first feedback control loop (figure 2, part first feedback control loop 13). However, Kim does not expressly disclose a second correction block configured to apply a second correction term to the second feedback control loop based on a second parameter of the first feedback control loop.
Zilio teaches (see figures 1-26) a second correction block (figure 23, part 106) configured to apply a second correction term (figure 23, part second correction term at 106 from Vc) to the second feedback control loop (figure 23, part second feedback control loop generated between 101-104) based on a second parameter (figure 23, part Vc) of the first feedback control loop (figure 23, part first feedback control loop generated between 105 and 108).
It would have been obvious to one having ordinary skill in the art before the effective filling date of the claimed invention to incorporate the closed-loop feedback control system features as taught by Zilio to the closed-loop feedback control system of Kim and obtain a second correction block configured to apply a second correction term to the second feedback control loop based on a second parameter of the first feedback control loop, because it provides more efficient control method that improve the performance of the multilevel converter (paragraph [0042]).
Regarding claim 13, claim 2 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 16, claim 5 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 17, claim 6 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 18, claim 7 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Regarding claim 22, claim 11 has the same limitations, except that is not a method claim, based on this is rejected for the same reasons.
Response to Arguments
Applicant's arguments filed 03/09/2026 have been fully considered but they are not persuasive.
Applicant’s argues on pages 8-10 of the Applicant's Response (“Kim does not teach, suggest, or disclose "a correction block configured to apply a correction term to the first feedback control loop based on a parameter of the second feedback control loop," as recited in independent Claim 1 and as similarly recited in independent Claims 12 and 23”).
The Examiner respectfully disagrees with Applicant’s arguments, because Kim discloses a correction block (figure 2, part correction block generated by 133 and 134) configured to apply a correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) to the first feedback control loop (figure 2, part first feedback control loop 13) based on a parameter of the second feedback control loop (figure 2, part second feedback control loop 12; based on IL) (paragraphs [0041]-[0048]). The claims are interpreted in light of the specification, limitations from the specification are not read into the claims. See In re Van Geuns, 988 F.2d 1181, 26 USPQ2d 1057 (Fed. Cir. 1993). In this claim, Kim discloses the correction block (figure 2, part correction block generated by 133 and 134) that is analogous to the correction block 330 (figure 3, part 330) in the application. This the correction block (figure 2, part correction block generated by 133 and 134) obtain the parameter (figure 2, part IL) of the second feedback control loop (figure 2, part second feedback control loop 12; based on IL) that is analogous to the parameter (figure 3, part IL) to the correction block 330 (figure 3, part 330) in the application. Finaly, this correction block (figure 2, part correction block generated by 133 and 134) configured to apply a correction term (figure 2, part correction block generated by 133 and 134; correction term from 133) to the first feedback control loop (figure 2, part first feedback control loop 13) that is analogous to the correction term (figure 3, part correction term from 330). Additional, it should be noted that broad claim language as recited does not defines specific different features regarding the correction block (example: specific calculation or circuit used to obtain the correction term in the correction block from the parameter? etc.). Therefore, based on the broad claim language as recited, Kim discloses the claimed limitation.
Conclusion
THIS ACTION IS MADE FINAL. Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Carlos O. Rivera-Pérez, whose telephone number is (571) 272-2432 and fax is (571) 273-2432. The examiner can normally be reached on Monday through Friday, 8:30 AM – 5:00 PM EST.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thienvu V. Tran can be reached on (571) 270-1276. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/C.O.R. /
Examiner, Art Unit 2838
/THIENVU V TRAN/ Supervisory Patent Examiner, Art Unit 2838
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