DETAILED ACTION
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This office action is response to communication filed on June 09, 2026.
Status of claims within the present application:
Claims 1 – 2, 5 – 6, 8, and 21 – 30 are pending.
Claims 1, 21, and 26 are amended.
Response to Amendment
With respect to Claims 1 – 2, 5 – 6, 8, and 21 – 30 are rejected under 35 U.S.C. 103 as being unpatentable over US 20190097818 A1 to Lu et al., (hereinafter, “Lu”) in view of US 20220376920 A1 to Aune, applicant’s arguments, see page [6 – 7] filed on March 19, 2026, have been considered but are not persuasive. Applicant argued that the prior art of Aune does not have the PUF key being generated externally. Examiner noted that the prior art of Aune teaches the ability to mask the PUF/provisioned key and the prior art of Lu teaches provision key being generated externally within a vault [Para. 61]. Therefore, the rejections still stand.
Claim Rejections - 35 USC § 112
The following is a quotation of the first paragraph of 35 U.S.C. 112(a):
(a) IN GENERAL.—The specification shall contain a written description of the invention, and of the manner and process of making and using it, in such full, clear, concise, and exact terms as to enable any person skilled in the art to which it pertains, or with which it is most nearly connected, to make and use the same, and shall set forth the best mode contemplated by the inventor or joint inventor of carrying out the invention.
Claims 1 – 2, 5 – 6, 8, and 21 – 30 are rejected under 35 U.S.C. 112(a) as failing to comply with the enablement requirement. The claims contain subject matter which was not described in the specification in such a way as to enable one skilled in the art to which it pertains, or with which it is most nearly connected, to make and/or use the invention. The claims recite “such that the encrypted provision key is triggered to ensured secure communication of the provision data”, but the specification does not appear to clearly describe the encrypted provision key being “triggered” or how it “ensures secure communication”. For example, paragraph 34 states the encrypted provision key is stored “for use as needed in future cryptographic operations”, but does not describe a triggering mechanism or a “secure communication” step as claimed.
The dependent claims included in the statement of rejection but not specifically addressed in the body of the rejection have inherited the deficiencies of their parent claim and have not resolved the deficiencies. Therefore, they are rejected based on the same rationale as applied to their parent claims above.
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
Claims 1 – 2, 5 – 6, 8, and 21 – 30 are rejected under 35 U.S.C. 112(b) as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor, regards as the invention. Claim 1, 21, and 26 recites the limitation “the provisional key” in line 3 – 4. There is insufficient antecedent basis for this limitation in the claim. For the purpose of examination, “the provisional key” is being considered “the provision key”. Furthermore, the term “triggering” or “secure communication” in claim 1, 21, and 26 renders the claim indefinite. The term “triggering” or “secure communication” is not defined by the claim, it is not clear how the “secure communication” is being utilized with the storing of the encrypted provision key and what “triggered” is being used to proceed with the secure communication.
The dependent claims included in the statement of rejection but not specifically addressed in the body of the rejection have inherited the deficiencies of their parent claim and have not resolved the deficiencies. Therefore, they are rejected based on the same rationale as applied to their parent claims above.
Claim Rejections - 35 USC § 101
35 U.S.C. 101 reads as follows:
Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title.
Claims 26 – 30 are rejected under 35 U.S.C. 101 because the claims are directed towards computer-readable storage medium which is not limited to falling under the statutory classes of invention set forth. These claims in using the term “computer-readable medium,” in accordance with para. 56 in Applicants’ Specification, allow for the computer-readable medium to be signals. Based on current USPTO Policy, when the computer readable medium is not specifically defined as excluding signals i.e. non-transitory in the Specification the broadest reasonable interpretation is used according to MPEP 2111, thus the computer readable medium may embody signals, i.e. transitory media. The Examiner notes that para. 56 only discloses examples of the “computer-readable medium” and does not define the “computer-readable medium” as excluding signals for example non-transitory. Accordingly, the Examiner suggests that Applicants amend the claims to add a limitation to direct the language of the ‘computer-readable medium’ claims to only include the non-transitory embodiment which would remove the possibility of claiming signals.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1 – 2, 5 – 6, 8, and 21 – 30 are rejected under 35 U.S.C. 103 as being unpatentable over US 20190097818 A1 to Lu et al., (hereinafter, “Lu”) in view of US 20220376920 A1 to Aune.
Regarding claim 1, Lu teaches an apparatus comprising: processing circuitry coupled to a memory, [Lu, para. 34 discloses the controller memory 22 may include one or more tangible, non-transitory, computer-readable mediums. For example, the controller memory 22 may include random access memory (RAM), read only memory (ROM), rewritable non-volatile memory, such as flash memory, hard drives, optical discs, and/or the like.] the processing circuitry to: receive a provision key and provision data encrypted with the provision key, [Lu, para. 46 discloses Because the Internet 86 can sometimes be unreliable when transferring significant amounts of data across vast distances (e.g., from the developer's location to the manufacturer's location) batch provision of PUF data may be transmitted between the PUF database hosting service 82 and the SoftSKU appliance 88. Further, the PUF database hosting service 82 may periodically provide data updates to the SoftSKU appliance 88. Additionally, the SoftSKU appliance 88 may receive (e.g., via the Internet 86) keys provided by the product owner 76, via the the customer key vault 78 (block 90) and store the keys (e.g., black keys) supplied from the customer key vault 78 for implementation on the IC's 10. After establishing a secure key provisioning session (block 92), the SoftSKU appliance 88 may then securely provision the keys from the customer key vault 78 (e.g., black keys) on the ICs 10 (block 94).], wherein the provisional key is externally generated; [Lu, para. 61 discloses the product owner 76 may host the customer key vault 78. The customer key vault 78 may hold the secret keys 222 (e.g., black keys) for provisioning on the ICs 10, via the appliance 88.] and encrypt the masked provision key with a function key to generate an encrypted provision key; [Lu, para. 65 discloses because the appliance 88 and the IC 10 each include a private key with a associated public key, a secure link may be established between the appliance 88 and the IC 10 (e.g., via a secure protocol 274). The secure protocol 274 establishes session keys 276, enabling secure transmission of data through a black channel 278. For example, the black keys (e.g., Advanced Encryption Standard (AES) keys) may be provisioned to the IC 10.] the encrypted provision key in the memory such that the encrypted provision key is triggered to ensure secure communication of the provision data. [Lu, para. 64 discloses A private user root key 262 may be stored in the key vault 78 and a corresponding public user root public key 264 may be programmed on the IC 10. The appliance may generate appliance key pair 265 and derive an appliance ephemeral key pair 266 (e.g., an appliance ephemeral private key 268 and an appliance ephemeral public key 270), signed by the private user root key 262. The appliance ephemeral public key 270 may be provided to the IC 10. Para. 63 discloses provisioning a secret key to a programmable device via a secure channel, in accordance with an embodiment. As previously discussed, the appliance 88 receives a set of PUF attestation public keys 162 for corresponding IC 10s (e.g., as identified based upon unique identifiers of the ICs 10) from the PUF database 82. As previously discussed with regard to FIGS. 7A and 7B, the PUF attestation public key 162 is derived based upon the PUF root key 154 and the metal signing key 184. The silicon (e.g., IC 10) may generate the PUF attestation private key 158, using help data stored in the device database cache 224, during an activation phase, as discussed with regard to FIG. 8. Accordingly, a pairing 262 may be established between the PUF attestation public key 162 of the appliance 88 and the PUF attestation private key 158 on the silicon (e.g., IC 10).], but Lu does not teach perform an operation on the provision key and mask the provision key.
However, Aune does teach perform an operation on the provision key and mask the provision key. [Aune, para. 23 discloses the use of bitwise XOR to mask the PUF key advantageously enables the PUF unit to comprise hardware circuitry for masking the PUF key that uses relatively few logic gates.]
Therefore, it would have been obvious to one of ordinary skill within the art before the effective filling date to combine Aune’s system with Lu’s system, with a motivation to make the masking mechanism relatively straightforward and area-efficient to implement in the PUF unit. [Aune, para. 23]
As per claim 2, modified Lu teaches the apparatus of claim 1, wherein the provision data relates to and identifies one or more specific elements associated with the processing circuitry [Lu, para. 63 discloses the appliance 88 receives a set of PUF attestation public keys 162 for corresponding IC 10s (e.g., as identified based upon unique identifiers of the ICs 10) from the PUF database 82. As previously discussed with regard to FIGS. 7A and 7B, the PUF attestation public key 162 is derived based upon the PUF root key 154 and the metal signing key 184. The silicon (e.g., IC 10) may generate the PUF attestation private key 158, using help data stored in the device database cache 224, during an activation phase. Para. 58 discloses an activation request 202 is received and the help data 164 and/or option 166 previously stored in the developer-hosted PUF database 82 during the enrollment process is retrieved. Using the help data 164 and/or option 166, along with the PUF 152, the PUF root key 154 generated during the enrollment process may be re-generated]
Regarding claim 5, modified Lu teaches the apparatus of claim 1, but Lu does not teach wherein the provision key is masked with a function mask including a physically unclonable function (PUF) mask, and wherein the function key includes a PUF key.
However, Aune does teach wherein the provision key is masked with a function mask including a physically unclonable function (PUF) mask, [Aune, para. 23 discloses the use of bitwise XOR to mask the PUF key advantageously enables the PUF unit to comprise hardware circuitry for masking the PUF key that uses relatively few logic gates.] and wherein the function key includes a PUF key. [Aune, para. 44 discloses The PUF unit 20 contains hardware circuitry for generating a PUF key (e.g. a 512-bit value) that is unique to the particular implementation of the SoC 10. Para. 19 discloses the PUF unit performing a bitwise XOR operation between the received random value and the PUF key, to generate a masked value;]
Therefore, it would have been obvious to one of ordinary skill within the art before the effective filling date to combine Aune’s system with Lu’s system, with a motivation to make the masking mechanism relatively straightforward and area-efficient to implement in the PUF unit. [Aune, para. 23]
Regarding claim 6, modified Lu teaches the apparatus of claim 5, but Lu does not teach wherein a number of bits of the PUF key equals a number of bits of the provision key, and wherein the PUF mask and the PUF key comprise random bit strings.
However, Aune does teach wherein a number of bits of the PUF key equals a number of bits of the provision key, [Aune, para. 46 discloses Each binary cell may directly generate a respective bit of the PUF key. However, in some embodiments the PUF unit 20 may contain more binary cells than the bit-length of the PUF key, and may generate additional helper bits for use within error-correction circuitry in the PUF unit 20, to ensure the stability of the generated PUF key even in changing environmental conditions.] and wherein the PUF mask and the PUF key comprise random bit strings. [Aune, para. 55 discloses the secure CPU 22 executes 50 boot code from the secure ROM 39. It sends 51 an instruction to the TRNG 26 to generate a random number. The TRNG 26 generates and returns 52 a random number over the secure bus 34. This random number will be used as a one-time mask, for this boot instance only. The secure CPU 22 transfers 53 the number, to use as a mask, to the PUF unit 20 over the system bus 14. The PUF unit 20 generates 54 the unique, device-specific PUF key (“PUF-key”) and bit-wise XORs the PUF key with the received mask, within the PUF unit 20. It returns 55 the resulting masked PUF key to the secure CPU 22 over the system bus 14. The boot code causes the secure CPU 22 to calculate 56 the bit-wise XOR of the received masked PUF key with the same mask that it sent to the PUF unit 20.]
Therefore, it would have been obvious to one of ordinary skill within the art before the effective filling date to combine Aune’s system with Lu’s system, with a motivation to make the masking mechanism relatively straightforward and area-efficient to implement in the PUF unit. [Aune, para. 23]
As per claim 8, modified Lu teaches the apparatus of claim 1, wherein the provision key comprises an Advanced Encryption Standard (AES) key, [Lu, para. 65 discloses the secure protocol 274 establishes session keys 276, enabling secure transmission of data through a black channel 278. For example, the black keys (e.g., Advanced Encryption Standard (AES) keys) may be provisioned to the IC 10.] wherein the masked provision key comprises a random key split, [Aune, para. 57 discloses the PUF key may be transferred from the PUF unit 20 to the secure CPU 22 in multiple blocks—e.g. 32-bit words—rather than in one transaction. In this case, steps 53, 54, 55, 56 of FIG. 3, may be repeated, so that the secure CPU 22 transfers a succession of shorter, randomly-generated masks (e.g. by splitting a 512-bit random number received from the TRNG 26 into sixteen 32-bit words, and sending one 32-bit word at a time), over a plurality of bus transactions, with the PUF unit 20 returning the PUF key in a plurality of transactions, as a succession of masked blocks (e.g. returning a successive masked 32-bit word of the PUF key at each iteration). The secure CPU 22 can unmask each block and concatenate the full PUF key, for storing in the secure SRAM 28.] wherein the processing circuitry includes one or more of application processing circuitry or graphics processing circuitry. [Lu, para. 34 discloses the controller processor 20 may execute instructions stored in the controller memory 22. Thus, in some embodiments, the controller processor 20 may include one or more general purpose microprocessors, one or more application specific processors (ASICs), one or more field programmable logic arrays (FPGAs), and/or the like. Additionally, in some embodiments, the controller memory 22 may include one or more tangible, non-transitory, computer-readable mediums.]
Regarding claims 21 – 22, they recite features similar to features within claims 1 – 2, therefore, they are rejected in a similar manner.
Regarding claims 23 – 24, they recite features similar to features within claims 5 – 6, therefore, they are rejected in a similar manner.
Regarding claim 25, it recites features similar to features within claim 8, therefore, it is rejected in a similar manner.
Regarding claims 26 – 27, they recite features similar to features within claims 1 – 2, therefore, they are rejected in a similar manner.
Regarding claims 28 – 29, they recite features similar to features within claims 5 – 6, therefore, they are rejected in a similar manner.
Regarding claim 30, it recites features similar to features within claim 8, therefore, it is rejected in a similar manner.
Conclusion
Pertinent prior art made of record however not relied upon:
US 20240095376 A1 to Satpathy et al.
“An example method includes identifying, by processing circuitry, a Physically Unclonable Function (PUF) array selected from a static random-access memory (SRAM) device of a System-on-a-Chip (SoC); reading, by the processing circuitry, from a memory, helper data associated with the PUF array and usable for generating a cryptographic key based on the PUF array; determining, by the processing circuitry, whether the helper data associated with the PUF array has been altered after its initial generation by a test system; and in response to determining that the helper data associated with the PUF array has been altered, disabling access to data, software, or functions protected by the cryptographic key generated based on the PUF array.”
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Phuc Pham whose telephone number is (571)272-8893. The examiner can normally be reached Monday - Thursday 7:30 AM - 4:30 PM; Friday 8:00 AM - 12:00 PM.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Linglan Edwards can be reached at (571) 270-5440. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/P.P./Patent Examiner, Art Unit 2408
/LINGLAN EDWARDS/Supervisory Patent Examiner, Art Unit 2408
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