Prosecution Insights
Last updated: August 17, 2026
Application No. 18/314,157

STRUCTURE AND METHOD FOR IN-SITU MONITORING OF THERMAL INTERFACE MATERIALS

Non-Final OA §102
Filed
May 09, 2023
Examiner
GIBSON, RANDY W
Art Unit
Tech Center
Assignee
Intel Corporation
OA Round
1 (Non-Final)
76%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
98%
With Interview

Examiner Intelligence

Grants 76% — above average
76%
Career Allowance Rate
1034 granted / 1364 resolved
+15.8% vs TC avg
Strong +22% interview lift
Without
With
+22.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 5m
Avg Prosecution
12 currently pending
Career history
1371
Total Applications
across all art units

Statute-Specific Performance

§101
5.5%
-34.5% vs TC avg
§103
45.7%
+5.7% vs TC avg
§102
27.4%
-12.6% vs TC avg
§112
14.9%
-25.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 1364 resolved cases

Office Action

§102
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1-3, 8, 10-15, and 19 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Wienand et al (DE 10225602 A1). With respect to claim 1, the Wienand reference discloses an integrated heat transfer monitoring system (Figs. 1a, 1b, 2a, 2b) comprising: an electronic component comprising at least one semiconductor device (1) coupled to a thermal interface material (5); a circuit pathway (8,9) passing through the TIM (2a, 2b) and connecting to a printed circuit board (10); and a monitoring device (inherent, as the Wieland reference states that the temperature signal is used to control “switching measures” to protect against overheating) coupled to the circuit pathway (8,9) providing resistance or capacitance measurements (the temperature sensor 7 is a resistive sensor). With respect to claim 2, the circuit pathway (8,9) passes through a heat dissipation element (5). With respect to claim 3, at least one of the circuit pathways (8,9) must inherently be a ground connection, as this was common practice in electronics. With respect to claim 8, the TIM (5) is an electrically insulating material. With respect to claims 10 & 11, the sensor (7) is a resistive temperature sensor. With respect to claim 12, the Wienand reference discloses a method comprising: providing a TIM (5) that transfers heat from a semiconductor device (1); forming a circuit pathway (8,9) through the TIM (Figs. 2a, 2b); and performing in-situ monitoring of the TIM (5) to identify changes in its operating electrical properties (the resistance of the temperature sensor 7 is monitored). With respect to claim 13, at least one of the circuit pathways (8,9) must inherently be a ground connection, as this was common practice in electronics. With respect to claim 14, of course the TIM (5) is inherently formed to predetermined dimensions. With respect to claim 15, the dielectric material inherently has electrical properties associated with its dimensions. With respect to claim 19, the Wienand reference discloses a monitoring circuit comprising: a semiconductor package (Fig. 1a) with a TIM (5), wherein the TIM has predetermined electrical properties (it is an insulator); a first electrical connection (9) between the TIM (5) and a power source (inherent, the temperature sensor 7 has to be powered somehow); a second electrical connection (8) between the TIM (5) and a ground connection on a PCB (inherent, as this was standard practice in electronics); a circuit pathway comprising a path that traverses the first electrical connection, the TIM, and second electrical connections (Figs 2a, 2b); and a monitoring device coupled to the circuit pathway to monitor changes in the TIM electrical properties during operations (inherent, as the Wieland reference states that the temperature signal is used to control “switching measures” to protect against overheating). Conclusion Claims 4-7, 9, 16-18, and 20 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Debitsudo et al (JP 286381 B2) discloses an integrated heat transfer monitoring system (Fig. 2) comprising: an electronic component comprising at least one semiconductor device (12) coupled to a thermal interface material (18); a circuit pathway (22,28) passing between a heat sink (18) and connecting to a printed circuit board (Inherent: control device 32 is obviously a microprocessor on a motherboard); and a monitoring device (32) coupled to the circuit pathway (28) providing resistance or capacitance measurements (the sensor 22 is a “thermocouple” embedded in the TIM 18, which is a resistive temperature sensor). The other references cited show the general state of the art. Any inquiry concerning this communication or earlier communications from the examiner should be directed to RANDY W GIBSON whose telephone number is (571)272-2103. The examiner can normally be reached Tue-Friday 10AM-6PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Peter Macchiarolo can be reached at 571-272-2375. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. RANDY W. GIBSON Primary Examiner Art Unit 2856 /RANDY W GIBSON/Primary Examiner, Art Unit 2855
Read full office action

Prosecution Timeline

May 09, 2023
Application Filed
Sep 25, 2023
Response after Non-Final Action
Jul 15, 2026
Non-Final Rejection mailed — §102 (current)

Precedent Cases

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

1-2
Expected OA Rounds
76%
Grant Probability
98%
With Interview (+22.1%)
2y 5m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 1364 resolved cases by this examiner. Grant probability derived from career allowance rate.

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