Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Drawings
The drawings are objected to as failing to comply with 37 CFR 1.84(p)(5) because they do not include the following reference sign(s) mentioned in the description:
par. [0045] “dispatch service 325”
par. [0070], [0073] and [0076] “block 750”
Corrected drawing sheets in compliance with 37 CFR 1.121(d) are required in reply to the Office action to avoid abandonment of the application. Any amended replacement drawing sheet should include all of the figures appearing on the immediate prior version of the sheet, even if only one figure is being amended. Each drawing sheet submitted after the filing date of an application must be labeled in the top margin as either “Replacement Sheet” or “New Sheet” pursuant to 37 CFR 1.121(d). If the changes are not accepted by the examiner, the applicant will be notified and informed of any required corrective action in the next Office action. The objection to the drawings will not be held in abeyance.
Specification
The disclosure is objected to because of the following informalities:
par. [0045] “dispatch service 325”, “dispatch service 352”.
Appropriate correction is required.
Claim Rejections - 35 USC § 112
The following is a quotation of 35 U.S.C. 112(b):
(b) CONCLUSION.—The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention.
The following is a quotation of 35 U.S.C. 112 (pre-AIA ), second paragraph:
The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the applicant regards as his invention.
Claims 1-20 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA ), second paragraph, as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention.
Claim 1 recites “generating fault-service pairs that have an absolute outcome”. It is not clear what constitutes an “absolute outcome”. Claim 4, and the specification par. [0059] indicate that “the absolute outcome is faults injected or not injected into the application”. Any fault that is injected is injected and thus satisfies the “injected or not” limitation. Similarly any fault that is not injected is not injected and thus satisfies the “injected or not” limitation. Accordingly appears that any fault would “have” the claimed “absolute outcome” and the term does not provide a limitation.
Claims 2-7 depend from claim 1 and are rejected accordingly.
Claims 8 and 15 recite language similar to that of claim 1 and are thus similarly rejected.
Claims 9-14 and 16-20 depend from claims 8 and 15 (respectively) and are rejected accordingly.
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claim(s) 1-2, 4-5, 8-9, 11-12, 15-16 and 18-19 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 10,684,940 to Kayal et al. (Kayal) in view of US 2024/0248830 to Shpilyuck et al. (Shpilyuck).
Claims 1, 8 and 15: Kayal discloses a computer-implemented method for fault injection optimizations, the method comprising:
performing offline application analysis to identify different characteristics of various components of an application (col. 11, lines 46-52 “use a machine learning classifier to determine a type … of microservice … capabilities and resources can be provided as input”, col. 11, lines 36-45 “inspect the microservice code to identify the capabilities … and the resources”);
determining faults that are suitable for each component by profiling resource characteristics (col. 11, lines 65-67 “identify failure conditions of other microservices belonging to the type”, col. 12, lines 9-12 “build a failure model”);
analyzing an application topology to identify critical services that are essential to an overall functioning of the application (col. 12, lines 5-8 “the failure model can also include information relating to predicted failure conditions of the infrastructure”, col. 11, lines 36-39 “analyze the … infrastructure to determine … dependencies”);
generating fault-service pairs that have an absolute outcome (col. 12, lines 9-12 “a failure model for this microservice”, col. 12, lines 27-30 “fault-injection scripts”); and
injecting the prioritized faults into the application to induce chaos to the application during controlled testing experiments (col. 12, lines 27-30 “execute targeted fault-injection scripts”).
Kayal does not explicitly teach:
assigning priorities to the fault-service pairs, by machine learning, to prioritize which of the faults are injected into the application.
Shpilyuck teaches:
assigning priorities to fault-service pairs, by machine learning, to prioritize which of the faults are injected into the application (par. [0124] “provide each process flow’s … weighted priority”, par. [0128] “calculate the weighted priority of any newly-called microservice”).
It would have been obvious before the effective filing date of the claimed invention to assign priorities to the fault-service pairs. Those of ordinary skill in the art would have been motivated to do so do determine an desirable ordering of the tests (see e.g. Shpilyuck par. [0083] “selected one after another starting with … the highest centrality”)
Claims 2, 9 and 16: Kayal and Shpiluck teach claims 1, 8 and 15, wherein the resource characteristics include intensity of network-related workloads (Kayal col. 2, lines 14-21 “errors associated with memory usage … high volume of network traffic”), memory-related workloads, and CPU-related workloads (Kayal col. 2, lines 14-21 “errors associated with memory usage … high volume of network traffic”, col. 4, lines 1-4 “CPU usage”).
Claims 4, 11 and 18: Kayal and Shpilyuck teach claims 1, 8 and 15, wherein the absolute outcome is faults injected or not injected into the application (Kayal col. 12, lines 9-12 “a failure model for this microservice”, col. 12, lines 27-30 “fault-injection scripts”).
Claims 5, 12 and 19: Kayal and Shpilyuck teach claims 1, 8 and 15, wherein the assigning of the priorities involves providing a priority score for each fault-service pair (Shpilyuck par. [0126] “calculate the centrality of each microservice”).
Claim(s) 3, 10 and 17 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 10,684,940 to Kayal et al. (Kayal) in view of US 2024/0248830 to Shpilyuck et al. (Shpilyuck) in view of US 10,986,013 to Theimer et al. (Theimer).
Claims 3, 10 and 17: Kayal and Shpiluck teach claim 1, 8 and 15, wherein the faults are network-related faults , memory-related faults, and CPU-related faults (Kayal col. 2, lines 14-21 “errors associated with memory usage … high volume of network traffic”, col. 4, lines 1-4 “CPU usage”).
Kayal and Shpiluck do not explicitly teach:
the faults are categorized.
Theimer teaches:
categorizing faults (col. 9, lines 6-15 “fault category descriptors may include, for example, an indication of the targeted resource or artifact”).
It would have been obvious before the effective filing date of the claimed invention to categorize the faults into network, memory and CPU related faults (Kayal col. 2, lines 14-21 “errors associated with memory usage … high volume of network traffic”, col. 4, lines 1-4 “CPU usage”, Theimer col. 9, lines 6-15 “an indication of the targeted resource”). Those of ordinary skill in the art would have been motivated to do so as a known means of organizing faults which would have produced only the expected results of providing a certain level granularity to the selection of faults (see e.g. Theimer col. 18, lines 43-47 “select some categories of faults … based for example on an analysis of the kids [sic] of operations being performed”)
Claim(s) 6-7, 13-14 and 20 is/are rejected under 35 U.S.C. 103 as being unpatentable over US 10,684,940 to Kayal et al. (Kayal) in view of US 2024/0248830 to Shpilyuck et al. (Shpilyuck) in view of
Claims 6, 13 and 20: Kayal and Shpilyuck teach claims 1, 8 and 15, wherein the machine learning includes a chaos testing artificial intelligence (AI) machine having a score computation component (Shpilyuck centrality calculator 634”), a reinforcement learning (RL) component (Kayal col. 9, lines 29-33 “the data produced by test can be used to refine the parameters of the ML similarities detector 223”), a fault selector (col. 11, 65-67 “the AI failure model agent 115 can identify failure conditions”) to collectively predict which of the faults are injected into the application.
Kayal and Shpilyuck do not explicitly teach:
a sequence miner.
Nagar teaches:
a sequence miner (par. [0059] “sequences mind by normal sequence mining module 528”).
It would have been obvious before the effective filing date of the claimed invention to include a sequence miner (Nagar par. [0059] “sequence mining module 528”). Those of ordinary skill in the art would have been motivated to do so as a known means of gathering information about the service (see e.g. Kayal col. 11, lines 36-45 “inspect the microservice code to identify the capabilities … and the resources”).
Claims 7 and 14: Kayal, Shpilyuck and Nagar teach claims 6 and 13, wherein the chaos testing AI machine interacts with at least a chaos toolkit and a fault injector to generate the fault-service pairs (Kayal col. 8, lines 28-31 “framework 300 for systematically testing the … microservices”, col. 12, lines 27-30 “fault-injection scripts”).
Conclusion
The prior art made of record and not relied upon is considered pertinent to applicant's disclosure.
US 11,847,046 to Ayyadurai et al., US 2020/0285571 to Mohan et al., US 12,625,795 to Hornsby et al., US 2022/0391314 to Nathe et al. teach alternate methods and systems for chaos testing/fault injection.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JASON D MITCHELL whose telephone number is (571)272-3728. The examiner can normally be reached Monday through Thursday 7:00am - 4:30pm and alternate Fridays 7:00am 3:30pm.
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If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Lewis Bullock can be reached at (571)272-3759. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/JASON D MITCHELL/Primary Examiner, Art Unit 2199
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