Office Action Predictor
Last updated: April 15, 2026
Application No. 18/318,016

PACKET PROCESSING METHOD AND RELATED APPARATUS

Final Rejection §103
Filed
May 16, 2023
Examiner
CLAWSON, STEPHEN J
Art Unit
2461
Tech Center
2400 — Computer Networks
Assignee
Huawei Technologies Co., LTD.
OA Round
2 (Final)
79%
Grant Probability
Favorable
3-4
OA Rounds
2y 10m
To Grant
88%
With Interview

Examiner Intelligence

Grants 79% — above average
79%
Career Allow Rate
526 granted / 665 resolved
+21.1% vs TC avg
Moderate +9% lift
Without
With
+9.1%
Interview Lift
resolved cases with interview
Typical timeline
2y 10m
Avg Prosecution
35 currently pending
Career history
700
Total Applications
across all art units

Statute-Specific Performance

§101
6.7%
-33.3% vs TC avg
§103
47.8%
+7.8% vs TC avg
§102
10.6%
-29.4% vs TC avg
§112
27.8%
-12.2% vs TC avg
Black line = Tech Center average estimate • Based on career data from 665 resolved cases

Office Action

§103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Drawings The drawings were received on 7 November 2025. These drawings are accepted. Response to Arguments Applicant's arguments have been fully considered. Applicant has amended the claims and argued these amendments. Examiner agrees that the previous rejection does not address all of the newly introduced amendments. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1, and 5 are rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860). Regarding claim 1, Anand discloses a packet processing method, wherein the method comprises: receiving, by a first network device, a first packet from a network at a first moment, wherein the first packet is a 1st packet in a first burst, the first burst comprises one or more packets, and the first network device is a first-hop network device that processes one or more packets; (See Anand fig. 1; packet is received and assigned a unique sequence number (e.g. at a first moment in time); para. 34, 45; processing packets on a per burst basis (e.g. a first burst); fig. 5a; ND500A (e.g. a first network device) is a first hop in many hops in the network; see also para. 10; burst based packet processing) determining, by the first network device based on the first moment, a first target queue from a plurality of queues comprised in a first queuing system of the first network device; (See Anand fig. 1, para. 35; mapping block stores (e.g. it has been determined before it actually stores) the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) adding, by the first network device, the one or more packets comprised in the first burst to the first target queue in a sequence of the one or more packets comprised in the first burst; and (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) processing, by the first network device, the first target queue according to scheduling rules of the plurality of queues. (See Anand fig. 1, para. 37-39; packets are scheduled based upon a round robin system and/or load balancing (e.g. scheduling rules) for transmission) Anand does not explicitly disclose wherein a flow has a plurality of bursts. However, Testa does disclose wherein a flow has a plurality of bursts. (See Testa para. 56; bursts of the same flow) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein a flow has a plurality of bursts of Anand to include the teaching of wherein a flow has a plurality of bursts of Testa with the motivation being to flexibly utilize a network to meet end user goals and further to permit multiple data transfers for multitasking devices and further to reduce delay and jitter caused by not allowing multiple data transfers. Anand discloses that packets are hashed based upon source address, destination address, and/or port number; each packet is mapped to a single bucket of a hash table through a hash function; and each bucket may be associated with a storage space to store one or more packets. (See Anand para. 36) Anand does not explicitly disclose wherein incoming hashed packets (two or more) are sent to the same queue. However, Arumilli does disclose wherein incoming hashed packets (two or more) are sent to the same queue. (See Arumilli para. 30; any flow will be enqueued to the same queue based upon hashing function; para. 14; hashing is based upon headers of different layers (e.g. including source address for example)) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein incoming hashed packets (two or more) are sent to the same queue of Arumilli with the motivation being to maintain order delivery (See Arumilli para. 30) and further to prevent out of order delivery of packets and further to allow for fair scheduling based upon flow/burst. Regarding claim 5, Anand in view of Testa in view of Arumilli discloses the method according to claim 1, wherein the method further comprises: receiving, by a first network device, a first packet from a network at a first moment, wherein the first packet is a 1st packet in a first burst of a first data flow, the first burst comprises packets, and the first network device is a first-hop network device that processes packets; (See Anand fig. 1; packet is received and assigned a unique sequence number (e.g. at a first moment in time); para. 34, 45; processing packets on a per burst basis (e.g. a first burst); fig. 5a; ND500A (e.g. a first network device) is a first hop in many hops in the network; see also para. 10; burst based packet processing) determining, by the first network device based on the first moment, a first target queue from a plurality of queues comprised in a first queuing system of the first network device; (See Anand fig. 1, para. 35; mapping block stores (e.g. it has been determined before it actually stores) the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) the second target queue is after the first target queue; and (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system); that is, the packets are stored in a queue which may be the same or different queue and packets are stored based upon their time of entering the device (e.g. after first queue)) the first target queue is a last queue of the first queuing system, or the first target queue is before a last queue of the first queuing system. (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system); that is, the packets are stored in a queue which may be the same or different queue and is either the last or before the last available queue) Anand does not explicitly disclose wherein a flow has a plurality of bursts. However, Testa does disclose wherein a flow has a plurality of bursts. (See Testa para. 56; bursts of the same flow) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein a flow has a plurality of bursts of Anand to include the teaching of wherein a flow has a plurality of bursts of Testa with the motivation being to flexibly utilize a network to meet end user goals and further to permit multiple data transfers for multitasking devices and further to reduce delay and jitter caused by not allowing multiple data transfers. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein all of the steps of claim 1 can be repeated again. However, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein all of the steps of claim 1 can be repeated again with the motivation being it is common sense (that is, it is extremely wasteful and expensive to have a network device that stops working after only receiving one flow and can never be used again; and further one of ordinary skill in the art with ordinary creativity can deduce that the steps of Anand can be repeated several times over and over again to allow a network device to route and process multiple flows as end devices request network resources; there are no unexpected results of just repeating what is already disclosed) and further it is a duplication of parts. Claims 2, 3, 4 are rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Clebowicz (5,282,196). Regarding claim 2, Anand in view of Testa in view of Arumilli discloses the method according to claim 1. Anand discloses wherein the plurality of queues in the first queuing system comprises at least three queues. (See Anand fig. 1) Anand in view of Testa in view of Arumilli do not explicitly disclose wherein first time intervals between start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal. However, Clebowicz does disclose wherein first time intervals between start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal. (See Clebowicz col. 1, line 58- col. 2, line 7; each buffer (e.g. adjacent queues) have a fixed time interval to access the output; see also col. 4, lines 31-50; see also fig. 1 three burst buffers) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein first time intervals between start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal of Clebowicz with the motivation being to ensure fair resource allocation and further to prevent elephant flows from blocking smaller flows from transmitting and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Regarding claim 3, Anand in view of Testa in view of Arumilli discloses the method according to claim 1. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein second time intervals at which two adjacent bursts of the plurality of bursts comprised in the first data flow arrive at the first network device are equal, and the second time interval is an integral multiple of the first time interval. However, Clebowicz does disclose wherein second time intervals at which two adjacent bursts of the plurality of bursts comprised in the first data flow arrive at the first network device are equal, and the second time interval is an integral multiple of the first time interval. (See Clebowicz col. 1, line 58- col. 2, line 7, col. 4, lines 31-50, fig. 3; input bursts are timed such that their boundaries (where they start and stop in time) are aligned and transferred to the output; each input buffer is assigned a fixed time interval; the integral multiple could be 1, for example) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein second time intervals at which two adjacent bursts of the plurality of bursts comprised in the first data flow arrive at the first network device are equal, and the second time interval is an integral multiple of the first time interval of Clebowicz with the motivation being to ensure fair resource allocation and further to prevent elephant flows from blocking smaller flows from transmitting and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Regarding claim 4, Anand in view of Testa in view of Arumilli discloses the method according to claim 1. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same. However, Clebowicz does disclose wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same. (See Clebowicz col. 1, line 58- col. 2, line 7, col. 4, lines 31-50; fixed size burst buffers meaning the bursts have fixed sizes; predetermined period of each input burst in a fixed manner) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same of Clebowicz with the motivation being to ensure fair resource allocation and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Claim 19 is rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Mizuhara (2002/0012348). Regarding claim 19, Anand in view of Testa in view of Arumilli discloses the method according to claim 5. Anand in view of Testa in view of Arumilli does not explicitly disclose including queue information in the packets. However, Mizuhara does disclose including queue information in the packets. (See Mizuhara para. 25; putting queue number in the packet) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of including queue information in the packets of Mizuhara with the motivation being to enable QoS and further to prioritize certain traffic that may be sensitive to delay or jitter and further for fair allocation of limited resources and further to provide for differentiated services. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860). Regarding claim 7, Anand discloses a packet processing method, wherein the method comprises: receiving, by a second network device, wherein a first burst of the bursts comprises one or more packets, a second burst of the bursts comprises one or more packets, the first burst and the second burst are two adjacent bursts, and the second network device is a last-hop network device that processes one or more packets; (See Anand fig. 1; packet is received and assigned a unique sequence number; para. 34, 45; processing packets on a per burst basis (e.g. a first, second, third burst); fig. 5a; ND500E (e.g. a second network device) is a last hop in many hops in the network; see also para. 10; burst based packet processing) determining, by the second network device, a first target queue and a second target queue from a first queuing system of the second network device; (See Anand fig. 1, para. 35; mapping block stores (e.g. it has been determined before it actually stores) the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue (e.g. first, second etc) and all of the buckets together are the second queueing system)) adding, by the second network device, the one or more packets comprised in the first burst to the first target queue in a sequence of the one or more packets comprised in the first burst; (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) adding, by the second network device, the one or more packets comprised in the second burst to the second target queue in a sequence of the one or more packets comprised in the second burst; and (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) processing, by the second network device, the first target queue and the second target queue according to a scheduling rule of the first target queue and a scheduling rule of the second target queue. (See Anand fig. 1, para. 37-39; packets are scheduled based upon a round robin system and/or load balancing (e.g. scheduling rules) for transmission) Anand does not explicitly disclose wherein a flow has a plurality of bursts. However, Testa does disclose wherein a flow has a plurality of bursts. (See Testa para. 56; bursts of the same flow) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein a flow has a plurality of bursts of Anand to include the teaching of wherein a flow has a plurality of bursts of Testa with the motivation being to flexibly utilize a network to meet end user goals and further to permit multiple data transfers for multitasking devices and further to reduce delay and jitter caused by not allowing multiple data transfers. Anand discloses that packets are hashed based upon source address, destination address, and/or port number; each packet is mapped to a single bucket of a hash table through a hash function; and each bucket may be associated with a storage space to store one or more packets. (See Anand para. 36) Anand does not explicitly disclose wherein incoming hashed packets (two or more) are sent to the same queue. However, Arumilli does disclose wherein incoming hashed packets (two or more) are sent to the same queue. (See Arumilli para. 30; any flow will be enqueued to the same queue based upon hashing function; para. 14; hashing is based upon headers of different layers (e.g. including source address for example)) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein incoming hashed packets (two or more) are sent to the same queue of Arumilli with the motivation being to maintain order delivery (See Arumilli para. 30) and further to prevent out of order delivery of packets and further to allow for fair scheduling based upon flow/burst. Claims 8 and 12 are rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Clebowicz (5,282,196). Regarding claim 8, Anand in view of Testa in view of Arumilli discloses the method according to claim 7. Anand in view of Testa in view of Arumilli does not explicitly disclose wherein a time interval between a moment at which the second network device releases the one or more packets comprised in the first burst to the first queuing system and a moment at which the second network device releases the one or more packets comprised in the second burst to the first queuing system is a first time interval, a time interval between a start moment of the first target queue and a start moment of the second target queue is a second time interval, and the first time interval is equal to the second time interval. However, Clebowicz does disclose wherein a time interval between a moment at which the second network device releases the one or more packets comprised in the first burst to the first queuing system and a moment at which the second network device releases the one or more packets comprised in the second burst to the first queuing system is a first time interval, a time interval between a start moment of the first target queue and a start moment of the second target queue is a second time interval, and the first time interval is equal to the second time interval. (See Clebowicz col. 1, line 58- col. 2, line 7, col. 4, lines 31-50, fig. 3; input bursts are timed such that their boundaries (where they start and stop in time) are aligned and transferred to the output; each input buffer is assigned a fixed time interval; the integral multiple could be 1, for example) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein a time interval between a moment at which the second network device releases the one or more packets comprised in the first burst to the first queuing system and a moment at which the second network device releases the one or more packets comprised in the second burst to the first queuing system is a first time interval, a time interval between a start moment of the first target queue and a start moment of the second target queue is a second time interval, and the first time interval is equal to the second time interval of Clebowicz with the motivation being to ensure fair resource allocation and further to prevent elephant flows from blocking smaller flows from transmitting and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Regarding claim 12, Anand in view of Testa in view of Arumilli discloses the method according to claim 7. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same. However, Clebowicz does disclose wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same. (See Clebowicz col. 1, line 58- col. 2, line 7, col. 4, lines 31-50; fixed size burst buffers meaning the bursts have fixed sizes; predetermined period of each input burst in a fixed manner) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same of Clebowicz with the motivation being to ensure fair resource allocation and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Claim 9 is rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Mangin (EP3734919) and further in view of Iny (2002/0061030). Regarding claim 9, Anand in view of Testa in view of Arumilli discloses the method according to claim 7. Anand in view of Testa in view of Arumilli does not explicitly disclose receiving, by the second network device, a second data flow, wherein the second data flow comprises one or more bursts, a first burst of the bursts comprises one or more packets, and selecting, by the second network device, a first queue group from the second queuing system, and adding the one or more bursts comprised in the first data flow to the first queue group in a sequence of the one or more bursts comprised in the first data flow; selecting, by the second network device, a second queue group from the first queuing system, and adding the one or more bursts comprised in the second data flow to the second queue group in a sequence of the one or more bursts comprised in the second data flow, wherein a priority of the first queue group is higher than a priority of the second queue group; and processing, by the second network device, the first queue group and the second queue group according to scheduling rules of a plurality of queues in the first queuing system. However, Mangin does disclose receiving, by the second network device, a second data flow, wherein the second data flow comprises one or more bursts, a first burst of the bursts comprises one or more packets, and selecting, by the second network device, a first queue group from the second queuing system, and adding the one or more bursts comprised in the first data flow to the first queue group in a sequence of the one or more bursts comprised in the first data flow; selecting, by the second network device, a second queue group from the first queuing system, and adding the one or more bursts comprised in the second data flow to the second queue group in a sequence of the one or more bursts comprised in the second data flow, wherein a priority of the first queue group is higher than a priority of the second queue group; and processing, by the second network device, the first queue group and the second queue group according to scheduling rules of a plurality of queues in the first queuing system. (See Mangin fig. 7, para. 15, 16, 20, 50, 51) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa to include the teaching of receiving, by the second network device, a second data flow, wherein the second data flow comprises one or more bursts, a first burst of the bursts comprises one or more packets, and selecting, by the second network device, a first queue group from the second queuing system, and adding the one or more bursts comprised in the first data flow to the first queue group in a sequence of the one or more bursts comprised in the first data flow; selecting, by the second network device, a second queue group from the first queuing system, and adding the one or more bursts comprised in the second data flow to the second queue group in a sequence of the one or more bursts comprised in the second data flow, wherein a priority of the first queue group is higher than a priority of the second queue group; and processing, by the second network device, the first queue group and the second queue group according to scheduling rules of a plurality of queues in the first queuing system. of Mangin with the motivation being to allow for prioritization of some more important flows which may require certain QoS and further to ensure delay and jitter requirements. Anand in view of Testa in view of Arumilli in view of Mangin does not explicitly disclose to do not explicitly disclose wherein the traffic is interleaved. However, Iny does disclose wherein the traffic is interleaved. (See Iny para. 6) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli in view of Mangin to include the teaching of wherein the traffic is interleaved of Iny with the motivation being to utilize network resources more efficiently and further to maximize resources and further to reduce delay and further to reduce jitter and further to prevent buffer overrun. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Sharma (2011/0261831). Regarding claim 10, Anand in view of Testa in view of Arumilli discloses the method according to claim 7. Anand discloses a multi-hop network and using queuing to route packets. (See Anand fig. 1, 5a) Anand in view of Testa in view of Arumilli do not explicitly disclose wherein a device determines the queuing of a first-hop device and determines a second queuing at another device based upon a mapping relationship of the queuing. However, Sharma does disclose wherein a device determines the queuing of a first-hop device and determines a second queuing at another device based upon a mapping relationship of the queuing. (See Sharma para. 25; dynamically computing queueing for a flow on a per device basis) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein a device determines the queuing of a first-hop device and determines a second queuing at another device based upon a mapping relationship of the queuing of Sharma with the motivation being to meet QoS requirements (See Sharma para. 25) and further to maximize limited network resources by using queuing efficiently and further to reduce delay and jitter. Claim 11 is rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Mangin (EP3734919). Regarding claim 11, Anand in view of Testa in view of Arumilli discloses the method according to claim 7. Anand in view of Testa do not explicitly disclose wherein packets comprised in N bursts are added to the first target queue, the N bursts comprise the first burst, each of the N bursts corresponds to one data flow, and different bursts in the N bursts correspond to different data flows; and the N bursts correspond to N queue groups, each of the N queue groups corresponds to one priority, and priorities of different queue groups are different. However, Mangin does disclose wherein packets comprised in N bursts are added to the first target queue, the N bursts comprise the first burst, each of the N bursts corresponds to one data flow, and different bursts in the N bursts correspond to different data flows; and the N bursts correspond to N queue groups, each of the N queue groups corresponds to one priority, and priorities of different queue groups are different. (See Mangin fig. 7, para. 15, 16, 20, 50, 51) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa to include the teaching of wherein packets comprised in N bursts are added to the first target queue, the N bursts comprise the first burst, each of the N bursts corresponds to one data flow, and different bursts in the N bursts correspond to different data flows; and the N bursts correspond to N queue groups, each of the N queue groups corresponds to one priority, and priorities of different queue groups are different of Mangin with the motivation being to allow for prioritization of some more important flows which may require certain QoS and further to ensure delay and jitter requirements. Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 13 and 17 are rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860). Regarding claim 13, Anand discloses a first network device, wherein the first network device comprises at least one processor and a memory connected to the processor and the at least one processor is configured to perform operations comprising: (See Anand fig. 5A, a processor executing an algorithm stored in memory) receive a first packet from a network at a first moment, wherein the first packet is a 1st packet, the first burst comprises one or more packets, and the first network device is a first-hop network device that processes one or more packets; (See Anand fig. 1; packet is received and assigned a unique sequence number (e.g. at a first moment in time); para. 34, 45; processing packets on a per burst basis (e.g. a first burst); fig. 5a; ND500A (e.g. a first network device) is a first hop in many hops in the network; see also para. 10; burst based packet processing) determine, based on the first moment, a first target queue from a plurality of queues comprised in a first queuing system of the first network device; and (See Anand fig. 1, para. 35; mapping block stores (e.g. it has been determined before it actually stores) the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) add the one or more packets comprised in the first burst to the first target queue in a sequence of the one or more packets comprised in the first burst; and (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) process the first target queue according to scheduling rules of the plurality of queues. (See Anand fig. 1, para. 37-39; packets are scheduled based upon a round robin system and/or load balancing (e.g. scheduling rules) for transmission) Anand does not explicitly disclose wherein a flow has a plurality of bursts. However, Testa does disclose wherein a flow has a plurality of bursts. (See Testa para. 56; bursts of the same flow) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein a flow has a plurality of bursts of Anand to include the teaching of wherein a flow has a plurality of bursts of Testa with the motivation being to flexibly utilize a network to meet end user goals and further to permit multiple data transfers for multitasking devices and further to reduce delay and jitter caused by not allowing multiple data transfers. Anand discloses that packets are hashed based upon source address, destination address, and/or port number; each packet is mapped to a single bucket of a hash table through a hash function; and each bucket may be associated with a storage space to store one or more packets. (See Anand para. 36) Anand does not explicitly disclose wherein incoming hashed packets (two or more) are sent to the same queue. However, Arumilli does disclose wherein incoming hashed packets (two or more) are sent to the same queue. (See Arumilli para. 30; any flow will be enqueued to the same queue based upon hashing function; para. 14; hashing is based upon headers of different layers (e.g. including source address for example)) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein incoming hashed packets (two or more) are sent to the same queue of Arumilli with the motivation being to maintain order delivery (See Arumilli para. 30) and further to prevent out of order delivery of packets and further to allow for fair scheduling based upon flow/burst. Regarding claim 17, Anand in view of Testa in view of Arumilli discloses the first network device according to claim 13, wherein the receiving unit is further configured to: Receiving a first packet from a network at a first moment, wherein the first packet is a 1st packet in a first burst of a first data flow, the first burst comprises packets, and the first network device is a first-hop network device that processes packets; (See Anand fig. 1; packet is received and assigned a unique sequence number (e.g. at a first moment in time); para. 34, 45; processing packets on a per burst basis (e.g. a first burst); fig. 5a; ND500A (e.g. a first network device) is a first hop in many hops in the network; see also para. 10; burst based packet processing) determining, based on the first moment, a first target queue from a plurality of queues comprised in a first queuing system of the first network device; (See Anand fig. 1, para. 35; mapping block stores (e.g. it has been determined before it actually stores) the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system)) the second target queue is after the first target queue; and (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system); that is, the packets are stored in a queue which may be the same or different queue and packets are stored based upon their time of entering the device (e.g. after first queue)) the first target queue is a last queue of the first queuing system, or the first target queue is before a last queue of the first queuing system. (See Anand fig. 1, para. 35; mapping block stores the packets based upon the moment of the packets entering the device based upon a unique sequence number in a plurality of buckets (e.g. each bucket is a queue and all of the buckets together are the first queueing system); that is, the packets are stored in a queue which may be the same or different queue and is either the last or before the last available queue) Anand does not explicitly disclose wherein a flow has a plurality of bursts. However, Testa does disclose wherein a flow has a plurality of bursts. (See Testa para. 56; bursts of the same flow) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand to include the teaching of wherein a flow has a plurality of bursts of Anand to include the teaching of wherein a flow has a plurality of bursts of Testa with the motivation being to flexibly utilize a network to meet end user goals and further to permit multiple data transfers for multitasking devices and further to reduce delay and jitter caused by not allowing multiple data transfers. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein all of the steps of claim 1 can be repeated again. However, it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein all of the steps of claim 1 can be repeated again with the motivation being it is common sense (that is, it is extremely wasteful and expensive to have a network device that stops working after only receiving one flow and can never be used again; and further one of ordinary skill in the art with ordinary creativity can deduce that the steps of Anand can be repeated several times over and over again to allow a network device to route and process multiple flows as end devices request network resources; there are no unexpected results of just repeating what is already disclosed) and further it is a duplication of parts. Claims 14, 15, 16 are rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Clebowicz (5,282,196). Regarding claim 14, Anand in view of Testa in view of Arumilli discloses the first network device according to claim 13. Anand discloses wherein the plurality of queues in the first queuing system comprises at least three queues. (See Anand fig. 1) Anand in view of Testa in view of Arumilli do not explicitly disclose wherein first time intervals between start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal. However, Clebowicz does disclose wherein first time intervals between start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal. (See Clebowicz col. 1, line 58- col. 2, line 7; each buffer (e.g. adjacent queues) have a fixed time interval to access the output; see also col. 4, lines 31-50; see also fig. 1 three burst buffers) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein first time intervals between start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal of Clebowicz with the motivation being to ensure fair resource allocation and further to prevent elephant flows from blocking smaller flows from transmitting and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Regarding claim 15, Anand in view of Testa in view of Arumilli discloses the first network device according to claim 13. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein the first time intervals between the start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal. However, Clebowicz does disclose wherein the first time intervals between the start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal. (See Clebowicz col. 1, line 58- col. 2, line 7; each buffer (e.g. adjacent queues) have a fixed time interval to access the output; see also col. 4, lines 31-50) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein the first time intervals between the start moments of two adjacent queues of the plurality of queues comprised in the first queuing system are equal of Clebowicz with the motivation being to ensure fair resource allocation and further to prevent elephant flows from blocking smaller flows from transmitting and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Regarding claim 16, Anand in view of Testa in view of Arumilli discloses the first network device according to claim 13. Anand in view of Testa in view of Arumilli do not explicitly disclose wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same. However, Clebowicz does disclose wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same. (See Clebowicz col. 1, line 58- col. 2, line 7, col. 4, lines 31-50; fixed size burst buffers meaning the bursts have fixed sizes; predetermined period of each input burst in a fixed manner) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of wherein quantities of bits of the plurality of bursts comprised in the first data flow are the same of Clebowicz with the motivation being to ensure fair resource allocation and further for scheduling of resources quickly and efficiently and further to avoid collisions. (See Clebowicz col. 4, lines 47-50) Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Anand (2016/0301632), and further in view of Testa (2013/0201826) and further in view of Arumilli (2012/0127860) and further in view of Mizuhara (2002/0012348). Regarding claim 20, Anand in view of Testa in view of Arumilli discloses the first network device according to claim 17. Anand in view of Testa in view of Arumilli does not explicitly disclose including queue information in the packets. However, Mizuhara does disclose including queue information in the packets. (See Mizuhara para. 25; putting queue number in the packet) Therefore it would have been obvious to one of ordinary skill in the art before the effective filing date to modify the method of Anand in view of Testa in view of Arumilli to include the teaching of including queue information in the packets of Mizuhara with the motivation being to enable QoS and further to prioritize certain traffic that may be sensitive to delay or jitter and further for fair allocation of limited resources and further to provide for differentiated services. Conclusion Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action. Any inquiry concerning this communication or earlier communications from the examiner should be directed to STEPHEN J CLAWSON whose telephone number is (571)270-7498. The examiner can normally be reached M-F 7:30-5:00 pm est. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Huy D Vu can be reached at (571) 272-3155. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /Stephen J Clawson/Primary Examiner, Art Unit 2461
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Prosecution Timeline

May 16, 2023
Application Filed
Aug 07, 2025
Non-Final Rejection — §103
Nov 07, 2025
Response Filed
Jan 05, 2026
Final Rejection — §103
Apr 01, 2026
Response after Non-Final Action

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