Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Note: The independent claims 1, 9 and 17 include the limitations of crystalline or single crystalline silicon previously found in dependent claims 3 and 12. The rejection below is the same rejection as in the previous office action except that the limitations of crystalline or single crystalline silicon are now 103 rejection rather than the 102 inherency rejection of the previous office action. The Examiner’s position is still the same, namely that a person having ordinary skill in the art would understand that primary reference Huang means that 560, 570 are single crystalline silicon, they are not polysilicon or amorphous, and that the evidence Johnson (US 20120279437 A1) see paragraph 0005 “technology of growing crystalline silicon ingots according to the Czochralski (CZ) method has been extensively developed over many decades to supply silicon wafers to the integrated circuit (IC) industry and the photovoltaic (PV) solar industry” is still true, however the Applicant has argued on page 2 remarks filed 12/8/2025 that “Neither reference teaches or suggests a configuration where "the first layer consists of a single crystalline silicon layer" or "a first layer formed from crystalline silicon," as recited in the amended claims 1, 9, and 17”, so to avoid the crystallinity of Silicon being a reason for allowance , the rejection has been amended to 103 rather than inherency, hence this office action is non-final.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Note: in all the claims the Examiner notes that electrical connection does not mean direct physical contact or touching, for example electrical connection can be through an intervening layer.
Claim(s) 1, 4-8 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 20140291682 A1) hereafter referred to as Huang in view of Morea et al. (see PTO-892) hereafter referred to as Morea and further in view of Christiansen et al. (US 20030218189 A1) hereafter referred to as Christiansen
In regard to claim 1 Huang teaches a germanium [see paragraph 0063 “FIG. 5 is a cross-sectional view of an APD 500”] photodetector, comprising:
a first layer [includes 560, 570 see “In one embodiment, the multiplication layer 560 includes intrinsic Si or lightly doped n-type Si. In one embodiment, the contact layer 570 includes n-type Si” see that substrate need not be SOI “In one embodiment, the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”], wherein the first layer consists of a silicon layer;
germanium [includes 540, 550 see “In one embodiment, the absorption layer 540 includes germanium (Ge), germanium-silicon (GeSi), or silicon-germanium-carbon (SiGeC). In one embodiment, the charge layer 550 includes p-type Si, p-type GeSi, or p-type SiGeC” thus 540 is Ge and see also under broadest reasonable interpretation, if a layer contains Ge it satisfies the limitation of germanium, thus 550 is also a “germanium” layer] disposed on the first layer, wherein the first layer and the germanium are doped [see Fig. 5 has a p-i-n structure including Ge, see 550 is p-type, see that 540 is used to conduct p-type charges (i.e. holes), see “the one or more first-type metal contacts 535 are p-type and the one or more second-type metal contacts 575 are n-type, or vice versa”] to form a PIN junction; and
a stressor material disposed on an opposite side [see “bottom stressor layer 590 may be a single-layer structure or a multiple-layers structure” ] of the first layer as the germanium, wherein the stressor material induces a stress that changes an optical absorption [see paragraph 0073 “simulation results prove that a bottom stressor layer can enlarge stress tensor in the Ge absorption layer. This means the Ge absorption layer is under a larger tensile strain and so the Ge absorption layer has better absorption especially for wavelengths beyond the bandgap of the bulk Ge of the Ge absorption layer” “Ge layer having top stressor layers has much higher absorption coefficient between 1500 nm to 1600 nm than those of the bulk Ge layer. The absorption spectra clearly show that the bulk Ge layer cannot efficiently absorb the light with wavelengths beyond 1550 nm, while the Ge layer with top stressor layers not only extends the absorption edge to 1600 nm but also greatly increase the absorption coefficient at 1550 nm”] edge of the germanium, and
wherein the germanium directly contact a [see top side] side of the first layer
but does not show in Fig. 5 wherein the stressor material directly contact the other side of the first layer and does not state wherein the first layer consists of a single crystalline silicon layer.
Regarding whether the absorption layer 540 is doped or not, compare to Fig. 3B “the absorption layer 340 is a p-type Ge absorption layer” “In comparison with the APD 100, the APD 300 in accordance with FIGS. 3A-3B has an undepleted absorption layer 340 with a graded doping profile for reducing the electrical field and dark current within the absorption layer 340. The graded first-type doping of the absorption layer 340 can be achieved by in-situ doping or ion implantation. The graded doping profile of the first-type dopants formed in the absorption layer 340 can generate a built-in electrical field”.
However see paragraph 0065 “the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”, see thinning of substrate “In one embodiment, the bottom stressor layer 590 may be fabricated by a process including a number of steps. First, the thickness of the Si substrate 510 is reduced to some target value by backside grinding. Next, the Si substrate 510 is etched (beneath APD device region) and the etching stops at the bottom surface of BOX layer 515. Subsequently, the bottom stressor layer 590 is deposited by evaporation or other suitable methods”.
See the structure of the top stressor “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303”.
See Morea teaches, see Fig. 1 Si substrate, Ge buffer, p-Ge, i-Ge, n-Ge and on top and on the sides is the SiNx conformal Nitride Stressor, see compressive stress, see conclusion, Morea also teaches “Nitride stressors can improve photocurrent and responsivity at longer wavelengths without detriment to the dark current density. With refined strain engineering, it could prove to be a useful technique to extend the range of GeSn-based photonic devices for mid-infrared applications”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include wherein the stressor material directly contact the other side of the first layer and also that absorption layer 540 has some doping.
The motivation is that SiN either alone as taught by Morea or as multilayer stressor as taught by Huang is known in the art to be useful to effectively apply stress and thus to apply stress to the device layers of Huang for the case of the Si substrate (without SOI) to get best absorption of light and doping is useful to adjust electric field and conduction so that the device gives good electrical response.
Huang and Morea as combined does not state wherein the first layer consists of a single crystalline silicon layer.
See Christiansen teaches single crystalline semiconductor substrates, see paragraph 0081, 0076 “a thin (50-300 nm), strictly pseudomorphic Si.sub.1-yC.sub.y layer, where y is as large as 0.02, is grown epitaxially on a substrate having a single crystalline surface layer. The substrate can be, for example, bulk Si or SOI, having a single crystalline surface from the group comprising Si, Si.sub.1-xGe.sub.x, Ge, Si.sub.1-x-yGe.sub.xC.sub.y” “The substrate 5 in FIG. 6 can be, for example, bulk Si or SOI and the single crystalline surface is of a layer selected from the group comprising Si, Si.sub.1-xGe.sub.x, Ge, Si.sub.1-yC.sub.y, Si.sub.1-x-yGe.sub.xC.sub.y” “The present invention discloses several methods for fabricating a strain relaxed epitaxial layer on a single crystalline surface with a mismatched lattice parameter and semiconductor structures that can be built on such a relaxed layer. More specifically, the present invention discloses methods for fabricating a partially strain relaxed SiGe, i.e, Si.sub.1-xGe.sub.x buffer layer for application as a "virtual substrate" for a variety of semiconductor devices having a strained Si or SiGe layer as the active region of the device” “According to one embodiment of the present invention and referring to FIG. 6, a thin, strictly pseudomorphic Si.sub.1-xGe.sub.x layer 40 is grown epitaxially on a substrate having a single crystalline surface”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include wherein the first layer consists of a single crystalline silicon layer.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that a single crystalline surface semiconductor is a known crystal of good quality and free of defects and is known in the art to predictably yield good quality semiconductor devices with good performance.
In regard to claim 4 Huang, Morea and Christiansen as combined teaches further comprising: a pair of contacts [see n++ contacts in 570 connected to 575 “contact layer 570 is electrically coupled to two n-type metal contacts 575”] establishing electrical connections with respective doped regions of the first layer; and a first contact establishing an electrical connection [see that 535 electrically connects to the device from the top] to a doped region of the germanium.
In regard to claim 5 Huang, Morea and Christiansen as combined does not teach further comprising: side stressor material disposed on at least two sides of the germanium, and on the first layer, wherein the side stressor material induces a stress that changes the optical absorption edge of the germanium.
See Morea teaches, see Fig. 1 Si substrate, Ge buffer, p-Ge, i-Ge, n-Ge and on top and on the sides is the SiNx conformal Nitride Stressor, see compressive stress, see conclusion, Morea also teaches “Nitride stressors can improve photocurrent and responsivity at longer wavelengths without detriment to the dark current density. With refined strain engineering, it could prove to be a useful technique to extend the range of GeSn-based photonic devices for mid-infrared applications”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include further comprising: side stressor material disposed on at least two sides of the germanium, and on the first layer, wherein the side stressor material induces a stress that changes the optical absorption edge of the germanium.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that SiN either alone as taught by Morea or as multilayer stressor as taught by Huang is known in the art to be useful to effectively apply stress and thus to apply maximum stress to the device layers of Huang to get best absorption of light.
In regard to claim 6 Huang, Morea and Christiansen as combined teaches further comprising: a top stressor material [see Huang Fig. 5 see “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303” “Ge layer having top stressor layers has much higher absorption coefficient between 1500 nm to 1600 nm than those of the bulk Ge layer. The absorption spectra clearly show that the bulk Ge layer cannot efficiently absorb the light with wavelengths beyond 1550 nm, while the Ge layer with top stressor layers not only extends the absorption edge to 1600 nm but also greatly increase the absorption coefficient at 1550 nm”] disposed on a first side of the germanium that is opposite a second side of the germanium that faces the stressor material, wherein the top stressor material induces a stress that changes the optical absorption edge of the germanium.
In regard to claim 7 Huang, Morea and Christiansen as combined teaches [see claim 1 combination see SiN as stressor is useful to apply stress] wherein the stressor material comprises silicon nitride.
In regard to claim 8 Huang, Morea and Christiansen as combined teaches [see Huang Fig. 5, see claim 1 combination] wherein the stressor material has a width that is equal to or greater than a width of the germanium.
Claim(s) 9, 14-16 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 20140291682 A1) hereafter referred to as Huang in view of Augusto (US 20070194213 A1) and further in view of Christiansen et al. (US 20030218189 A1) hereafter referred to as Christiansen.
In regard to claim 9 Huang teaches a germanium [see paragraph 0063 “FIG. 5 is a cross-sectional view of an APD 500”] photodetector, comprising:
a first layer [includes 560, 570 see “In one embodiment, the multiplication layer 560 includes intrinsic Si or lightly doped n-type Si. In one embodiment, the contact layer 570 includes n-type Si” see that substrate need not be SOI “In one embodiment, the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”] formed from silicon, wherein the first layer comprises two doped regions [see n++ contacts in 570 connected to 575 “contact layer 570 is electrically coupled to two n-type metal contacts 575”], and a pair of contacts [see 575] establishes electrical connections to the two doped regions of the first layer;
germanium [includes 540, 550 see “In one embodiment, the absorption layer 540 includes germanium (Ge), germanium-silicon (GeSi), or silicon-germanium-carbon (SiGeC). In one embodiment, the charge layer 550 includes p-type Si, p-type GeSi, or p-type SiGeC” thus 540 is Ge and see also under broadest reasonable interpretation, if a layer contains Ge it satisfies the limitation of germanium, thus 550 is also a “germanium” layer] disposed on the first layer,
wherein the germanium comprises a doped region [see Fig. 5 has a p-i-n structure including Ge, see 550 is p-type, see that 540 is used to conduct p-type charges (i.e. holes), see “the one or more first-type metal contacts 535 are p-type and the one or more second-type metal contacts 575 are n-type, or vice versa”], a first contact [see 535, see that 535 electrically connects to the device from the top] establishes an electrical connection to the doped region of the germanium, and the first layer and the germanium are doped to form [see Fig. 5 has a p-i-n structure including Ge, see 550 is p-type, below it is i-Si and “contact layer 570 includes n-type Si”] a PIN junction; and
a stressor material disposed on an opposite side [see “bottom stressor layer 590 may be a single-layer structure or a multiple-layers structure” ] of the first layer as the germanium,
wherein the stressor material induces a stress that changes an optical absorption [see paragraph 0073 “simulation results prove that a bottom stressor layer can enlarge stress tensor in the Ge absorption layer. This means the Ge absorption layer is under a larger tensile strain and so the Ge absorption layer has better absorption especially for wavelengths beyond the bandgap of the bulk Ge of the Ge absorption layer” “Ge layer having top stressor layers has much higher absorption coefficient between 1500 nm to 1600 nm than those of the bulk Ge layer. The absorption spectra clearly show that the bulk Ge layer cannot efficiently absorb the light with wavelengths beyond 1550 nm, while the Ge layer with top stressor layers not only extends the absorption edge to 1600 nm but also greatly increase the absorption coefficient at 1550 nm”]edge of the germanium,
and wherein the germanium [see top side] directly contact a side of the first layer
but does not show in in Fig. 5 wherein the stressor material directly contact the other side of the first layer and does not specifically teach “between the two doped regions of the first layer and their respective metal portions” and “between the doped region of the germanium and a first metal portion” and does not state “formed from crystalline silicon”.
However see Huang paragraph 0065 “the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”, see thinning of substrate “In one embodiment, the bottom stressor layer 590 may be fabricated by a process including a number of steps. First, the thickness of the Si substrate 510 is reduced to some target value by backside grinding. Next, the Si substrate 510 is etched (beneath APD device region) and the etching stops at the bottom surface of BOX layer 515. Subsequently, the bottom stressor layer 590 is deposited by evaporation or other suitable methods”.
See the structure of the top stressor “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include wherein the stressor material directly contact the other side of the first layer.
The motivation is that SiN as multilayer stressor as taught by Huang is useful to apply stress to the device layers of Huang for the case of the Si substrate (without SOI) to get best absorption of light.
Huang does not specifically teach “between the two doped regions of the first layer and their respective metal portions” and “between the doped region of the germanium and a first metal portion” and does not state “formed from crystalline silicon”.
Regarding whether the absorption layer 540 is doped or not, compare to Fig. 3B “the absorption layer 340 is a p-type Ge absorption layer” “In comparison with the APD 100, the APD 300 in accordance with FIGS. 3A-3B has an undepleted absorption layer 340 with a graded doping profile for reducing the electrical field and dark current within the absorption layer 340. The graded first-type doping of the absorption layer 340 can be achieved by in-situ doping or ion implantation. The graded doping profile of the first-type dopants formed in the absorption layer 340 can generate a built-in electrical field”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include that absorption layer 540 has some doping.
The motivation is that doping is useful to adjust electric field and conduction so that the device gives good electrical response.
Huang does not specifically teach “between the two doped regions of the first layer and their respective metal portions” and “between the doped region of the germanium and a first metal portion” and does not state “formed from crystalline silicon”.
However metal levels are common in the art, see Augusto teaches see Abstract “monolithic integration of avalanche devices in large arrays, that can be operated as Avalanche Photo-Diodes (APDs) or Avalanche Light Emitting Diodes (ALEDs) depending only on the applied bias conditions, which can be software-controlled from peripheral circuitry”, see the plurality of Metal layers and vias to connect to them, see “FIG. 1C--Top view of layout after Metal-1 and Via-1” “FIG. 1D--Top view of layout after Metal-2 and Via-2” “FIG. 1E--Top view of layout after Metal-3” etc. , “An object of the present invention is to provide imaging devices” .
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include “between the two doped regions of the first layer and their respective metal portions” and “between the doped region of the germanium and a first metal portion”.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that a plurality of metal layers are useful to interconnect the APDs to a circuit to perform work such as imaging.
Huang and Augusto as combined does not state “formed from crystalline silicon”.
See Christiansen teaches single crystalline semiconductor substrates, see paragraph 0081, 0076 “a thin (50-300 nm), strictly pseudomorphic Si.sub.1-yC.sub.y layer, where y is as large as 0.02, is grown epitaxially on a substrate having a single crystalline surface layer. The substrate can be, for example, bulk Si or SOI, having a single crystalline surface from the group comprising Si, Si.sub.1-xGe.sub.x, Ge, Si.sub.1-x-yGe.sub.xC.sub.y” “The substrate 5 in FIG. 6 can be, for example, bulk Si or SOI and the single crystalline surface is of a layer selected from the group comprising Si, Si.sub.1-xGe.sub.x, Ge, Si.sub.1-yC.sub.y, Si.sub.1-x-yGe.sub.xC.sub.y” “The present invention discloses several methods for fabricating a strain relaxed epitaxial layer on a single crystalline surface with a mismatched lattice parameter and semiconductor structures that can be built on such a relaxed layer. More specifically, the present invention discloses methods for fabricating a partially strain relaxed SiGe, i.e, Si.sub.1-xGe.sub.x buffer layer for application as a "virtual substrate" for a variety of semiconductor devices having a strained Si or SiGe layer as the active region of the device” “According to one embodiment of the present invention and referring to FIG. 6, a thin, strictly pseudomorphic Si.sub.1-xGe.sub.x layer 40 is grown epitaxially on a substrate having a single crystalline surface”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include “formed from crystalline silicon”.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that a single crystalline surface semiconductor is a known crystal of good quality and free of defects and is known in the art to predictably yield good quality semiconductor devices with good performance.
In regard to claim 14 Huang, Augusto and Christiansen as combined teaches further comprising: a top stressor material [see Huang Fig. 5 see “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303” “Ge layer having top stressor layers has much higher absorption coefficient between 1500 nm to 1600 nm than those of the bulk Ge layer. The absorption spectra clearly show that the bulk Ge layer cannot efficiently absorb the light with wavelengths beyond 1550 nm, while the Ge layer with top stressor layers not only extends the absorption edge to 1600 nm but also greatly increase the absorption coefficient at 1550 nm”] disposed on a first side of the germanium that is opposite a second side of the germanium that faces the stressor material, wherein the top stressor material induces a stress that changes the optical absorption edge of the germanium.
In regard to claim 15 Huang, Augusto and Christiansen as combined teaches [see claim 10 combination see SiN as multilayer stressor as taught by Huang is useful to apply stress] wherein the stressor material comprises silicon nitride.
In regard to claim 16 Huang, Augusto and Christiansen as combined teaches wherein the stressor material has a width that is [see Huang Fig. 5 see claim 10 combination] equal to or greater than a width of the germanium.
Claim(s) 13 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang, Augusto and Christiansen as combined and further in view of Morea et al. (see PTO-892) hereafter referred to as Morea
In regard to claim 13 Huang, Augusto and Christiansen as combined does not teach further comprising: side stressor material disposed on at least two sides of the germanium, and on the first layer, wherein the side stressor material induces a stress that changes the optical absorption edge of the germanium.
See Morea teaches, see Fig. 1 Si substrate, Ge buffer, p-Ge, i-Ge, n-Ge and on top and on the sides is the SiNx conformal Nitride Stressor, see compressive stress, see conclusion, Morea also teaches “Nitride stressors can improve photocurrent and responsivity at longer wavelengths without detriment to the dark current density. With refined strain engineering, it could prove to be a useful technique to extend the range of GeSn-based photonic devices for mid-infrared applications”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include further comprising: side stressor material disposed on at least two sides of the germanium, and on the first layer, wherein the side stressor material induces a stress that changes the optical absorption edge of the germanium.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that SiN either alone as taught by Morea or as multilayer stressor as taught by Huang is known in the art to be useful to effectively apply stress and thus to apply maximum stress to the device layers of Huang to get best absorption of light.
Claim(s) 17-20 is/are rejected under 35 U.S.C. 103 as being unpatentable over Huang et al. (US 20140291682 A1) hereafter referred to as Huang in view of Morea et al. (see PTO-892) hereafter referred to as Morea and further in view of Christiansen et al. (US 20030218189 A1) hereafter referred to as Christiansen.
In regard to claim 17 Huang teaches a germanium [see paragraph 0063 “FIG. 5 is a cross-sectional view of an APD 500”] photodetector, comprising:
a first layer [includes 560, 570 see “In one embodiment, the multiplication layer 560 includes intrinsic Si or lightly doped n-type Si. In one embodiment, the contact layer 570 includes n-type Si” see that substrate need not be SOI “In one embodiment, the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”] formed from silicon;
germanium [includes 540, 550 see “In one embodiment, the absorption layer 540 includes germanium (Ge), germanium-silicon (GeSi), or silicon-germanium-carbon (SiGeC). In one embodiment, the charge layer 550 includes p-type Si, p-type GeSi, or p-type SiGeC” thus 540 is Ge and see also under broadest reasonable interpretation, if a layer contains Ge it satisfies the limitation of germanium, thus 550 is also a “germanium” layer] disposed on the first layer, wherein the first layer and the germanium are doped [see Fig. 5 has a p-i-n structure including Ge, see 550 is p-type, see that 540 is used to conduct p-type charges (i.e. holes), see “the one or more first-type metal contacts 535 are p-type and the one or more second-type metal contacts 575 are n-type, or vice versa”] to form a PIN junction;
a stressor material disposed on an opposite side [see “bottom stressor layer 590 may be a single-layer structure or a multiple-layers structure” ] of the first layer as the germanium,
wherein the stressor material induces a stress that changes an optical absorption [see paragraph 0073 “simulation results prove that a bottom stressor layer can enlarge stress tensor in the Ge absorption layer. This means the Ge absorption layer is under a larger tensile strain and so the Ge absorption layer has better absorption especially for wavelengths beyond the bandgap of the bulk Ge of the Ge absorption layer” “Ge layer having top stressor layers has much higher absorption coefficient between 1500 nm to 1600 nm than those of the bulk Ge layer. The absorption spectra clearly show that the bulk Ge layer cannot efficiently absorb the light with wavelengths beyond 1550 nm, while the Ge layer with top stressor layers not only extends the absorption edge to 1600 nm but also greatly increase the absorption coefficient at 1550 nm”] edge of the germanium; and
but does not show: a side stressor material disposed on at least two sides of the germanium, and on the first layer, wherein the side stressor material induces a stress that changes the optical absorption edge of the germanium and does not state “formed from crystalline silicon”.
Regarding whether the absorption layer 540 is doped or not, compare to Fig. 3B “the absorption layer 340 is a p-type Ge absorption layer” “In comparison with the APD 100, the APD 300 in accordance with FIGS. 3A-3B has an undepleted absorption layer 340 with a graded doping profile for reducing the electrical field and dark current within the absorption layer 340. The graded first-type doping of the absorption layer 340 can be achieved by in-situ doping or ion implantation. The graded doping profile of the first-type dopants formed in the absorption layer 340 can generate a built-in electrical field”.
However see paragraph 0065 “the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”, see thinning of substrate “In one embodiment, the bottom stressor layer 590 may be fabricated by a process including a number of steps. First, the thickness of the Si substrate 510 is reduced to some target value by backside grinding. Next, the Si substrate 510 is etched (beneath APD device region) and the etching stops at the bottom surface of BOX layer 515. Subsequently, the bottom stressor layer 590 is deposited by evaporation or other suitable methods”.
See the structure of the top stressor “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303”.
See Morea teaches, see Fig. 1 Si substrate, Ge buffer, p-Ge, i-Ge, n-Ge and on top and on the sides is the SiNx conformal Nitride Stressor, see compressive stress, see conclusion, Morea also teaches “Nitride stressors can improve photocurrent and responsivity at longer wavelengths without detriment to the dark current density. With refined strain engineering, it could prove to be a useful technique to extend the range of GeSn-based photonic devices for mid-infrared applications”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include a side stressor material disposed on at least two sides of the germanium, and on the first layer, wherein the side stressor material induces a stress that changes the optical absorption edge of the germanium and also that absorption layer 540 has some doping.
The motivation is that SiN either alone as taught by Morea or as multilayer stressor as taught by Huang is known in the art to be useful to effectively apply stress and thus to apply maximum stress to the device layers of Huang to get best absorption of light and doping is useful to adjust electric field and conduction so that the device gives good electrical response.
Huang and Morea as combined does not state “formed from crystalline silicon”.
See Christiansen teaches single crystalline semiconductor substrates, see paragraph 0081, 0076 “a thin (50-300 nm), strictly pseudomorphic Si.sub.1-yC.sub.y layer, where y is as large as 0.02, is grown epitaxially on a substrate having a single crystalline surface layer. The substrate can be, for example, bulk Si or SOI, having a single crystalline surface from the group comprising Si, Si.sub.1-xGe.sub.x, Ge, Si.sub.1-x-yGe.sub.xC.sub.y” “The substrate 5 in FIG. 6 can be, for example, bulk Si or SOI and the single crystalline surface is of a layer selected from the group comprising Si, Si.sub.1-xGe.sub.x, Ge, Si.sub.1-yC.sub.y, Si.sub.1-x-yGe.sub.xC.sub.y” “The present invention discloses several methods for fabricating a strain relaxed epitaxial layer on a single crystalline surface with a mismatched lattice parameter and semiconductor structures that can be built on such a relaxed layer. More specifically, the present invention discloses methods for fabricating a partially strain relaxed SiGe, i.e, Si.sub.1-xGe.sub.x buffer layer for application as a "virtual substrate" for a variety of semiconductor devices having a strained Si or SiGe layer as the active region of the device” “According to one embodiment of the present invention and referring to FIG. 6, a thin, strictly pseudomorphic Si.sub.1-xGe.sub.x layer 40 is grown epitaxially on a substrate having a single crystalline surface”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include “formed from crystalline silicon”.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that a single crystalline surface semiconductor is a known crystal of good quality and free of defects and is known in the art to predictably yield good quality semiconductor devices with good performance.
In regard to claim 18 Huang, Morea and Christiansen as combined teaches wherein the germanium directly contact a [see top side] side of the first layer but does not show in in Fig. 5 wherein the stressor material directly contact the other side of the first layer.
However see paragraph 0065 “the substrate 510 includes a Si substrate or a silicon-on-insulator (SOI) substrate”, see thinning of substrate “In one embodiment, the bottom stressor layer 590 may be fabricated by a process including a number of steps. First, the thickness of the Si substrate 510 is reduced to some target value by backside grinding. Next, the Si substrate 510 is etched (beneath APD device region) and the etching stops at the bottom surface of BOX layer 515. Subsequently, the bottom stressor layer 590 is deposited by evaporation or other suitable methods”.
See the structure of the top stressor “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303”.
See Morea teaches, see Fig. 1 Si substrate, Ge buffer, p-Ge, i-Ge, n-Ge and on top and on the sides is the SiNx conformal Nitride Stressor, see compressive stress, see conclusion, Morea also teaches “Nitride stressors can improve photocurrent and responsivity at longer wavelengths without detriment to the dark current density. With refined strain engineering, it could prove to be a useful technique to extend the range of GeSn-based photonic devices for mid-infrared applications”.
Thus, it would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains to modify Huang to include wherein the stressor material directly contact the other side of the first layer.
Thus it would be obvious to combine the references to arrive at the claimed invention.
The motivation is that SiN either alone as taught by Morea or as multilayer stressor as taught by Huang is known in the art to be useful to effectively apply stress and thus to apply stress to the device layers of Huang for the case of the Si substrate (without SOI) to get best absorption of light.
In regard to claim 19 Huang, Morea and Christiansen as combined teaches further comprising: a pair of contacts establishing electrical connections with [see n++ contacts in 570 connected to 575 “contact layer 570 is electrically coupled to two n-type metal contacts 575”] respective doped regions of the first layer; and a first contact [see “the one or more first-type metal contacts 535 are p-type and the one or more second-type metal contacts 575 are n-type, or vice versa”] establishing an electrical connection [see that 535 electrically connects to the device from the top] to a doped region of the germanium.
In regard to claim 20 Huang, Morea and Christiansen as combined teaches further comprising: a top stressor material [see Huang Fig. 5 see “In one embodiment, the top stressor layer 530 has a multi-layer structure comprising four layers, including an amorphous silicon (Si) layer 5301 disposed on the absorption layer 540; a first silicon dioxide (SiO.sub.2) layer 5302 disposed on the amorphous Si layer 5301; a silicon nitride (SiN) layer 5303 disposed on the first SiO.sub.2 layer 5302; and a second SiO.sub.2 layer 5304 disposed on the SiN layer 5303” “Ge layer having top stressor layers has much higher absorption coefficient between 1500 nm to 1600 nm than those of the bulk Ge layer. The absorption spectra clearly show that the bulk Ge layer cannot efficiently absorb the light with wavelengths beyond 1550 nm, while the Ge layer with top stressor layers not only extends the absorption edge to 1600 nm but also greatly increase the absorption coefficient at 1550 nm”] disposed on a first side of the germanium that is opposite a second side of the germanium that faces the stressor material, wherein the top stressor material induces a stress that changes the optical absorption edge of the germanium.
Response to Arguments
Applicant's arguments filed 12/8/2025 have been fully considered but they are not persuasive.
On page 1-3 the Applicant argues that “Neither reference teaches or suggests a configuration where "the first layer consists of a single crystalline silicon layer" or "a first layer formed from crystalline silicon," as recited in the amended claims 1, 9, and 17, much less a configuration where "the germanium and the stressor material directly contact respective sides of the first layer," as recited in the amended claims 1 and 9. Therefore, Applicant submits that the cited references fail to teach or suggest at least these elements of the claims”.
The independent claims 1, 9 and 17 include the limitations of crystalline or single crystalline silicon previously found in dependent claims 3 and 12. The rejection below is the same rejection as in the previous office action except that the limitations of crystalline or single crystalline silicon are now 103 rejection rather than the 102 inherency rejection of the previous office action. The Examiner’s position is still the same, namely that a person having ordinary skill in the art would understand that primary reference Huang means that 560, 570 are single crystalline silicon, they are not polysilicon or amorphous, and that the evidence Johnson (US 20120279437 A1) see paragraph 0005 “technology of growing crystalline silicon ingots according to the Czochralski (CZ) method has been extensively developed over many decades to supply silicon wafers to the integrated circuit (IC) industry and the photovoltaic (PV) solar industry” is still true, however, to avoid the crystallinity of Silicon being a reason for allowance , the rejection has been amended to 103 rather than inherency, hence this office action is non-final.
Conclusion
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/SITARAMARAO S YECHURI/ Primary Examiner, Art Unit 2893