CTNF 18/319,049 CTNF 77920 Notice of Pre-AIA or AIA Status 07-03-aia AIA 15-10-aia The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. DETAILED ACTION This Non-Final office is a response to the papers filed on 05/07/2026. Claims 1-9 are pending, claims 10-20 are cancelled. Remark In the Office Action, claims 1-26 were restricted under 35 U.S.C. 121 by a genus- species type restriction. The restriction indicated that Species I, Species II, and Species III claims respectively fall into the following three groups: I. Group I drawn claims 1-9 which disclose a power line arrangement method of arranging power lines to be applied to a memory device. II. Group II drawn to claims 10-18 which disclose a power line arrangement method. III. Group III drawn to claims 19-20 which disclose a memory device. Applicant's election with traverse of Group I claims 1-9 in the reply filed on 05/07/2026 is acknowledged. This is not found persuasive because the inventions require a different field of search (for example, searching different classes/subclasses, electronic resources, and employing different search queries); The requirement is still deemed proper and is therefore made FINAL. Claim Rejections - 35 USC § 102 07-07-aia AIA 07-07 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – 07-12-aia AIA (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. 07-15-03-aia AIA Claim s 1, 3, and 7-9 are rejected under 35 U.S.C. 102(a)(2) as being anticipated by Beyne et al. (Pub. No. 2023/0080522 A1) . Regarding claims 1 , Beyne discloses: A power line arrangement method of arranging power lines to be applied to a memory device comprising a plurality of layers (see par [0033], the method according to the disclosed technology, buried contact rails 15 are now produced, as shown in FIG. 1 F. To this aim, trenches aligned to each line of mutually aligned TSVs 11 are first formed by lithography and etching, through the dielectric layers….), wherein, in each of the plurality of layers, a plurality of power lines and a plurality of signal lines (see par [0033-0034], Before or after producing the rails 15 , further front end of line processing is performed, including the formation of gates and gate contacts in between pairs of source and drain contacts…., see par [0020], the method of the disclosed technology, the power delivery tracks are essentially perpendicular to the power rails….), are arranged along a plurality of track lines that are side- by-side so as to be separated from each other in a first direction or a second direction that is perpendicular to the first direction (see Fig. 2A-2B, see par [0040-0043], the tracks 26 are arranged in pairs T1, T2…., see par [0017], the power delivery tracks are essentially perpendicular to the buried power rails….[wherein T1 and T2 are side-by-side and separated from each other]), the power line arrangement method comprising: identifying a first track line on which at least some of the plurality of power lines are arranged; moving at least one of the at least some of the plurality of power lines to a second track line adjacent to the first track line as a moved at least one power line (see par [00-39-0041], the tracks 26 are alternately coupled to Vdd and Vss, that is, every T 1 coupled to Vdd and every T 2 coupled to Vss, to thereby deliver these voltages alternately to the parallel rails 15 , and to the standard cells arranged between each pair of rails 15….[wherein the power line have been arranged which is moved], see par [0010], the power delivery tracks is connected to a first row of mutually parallel TSVs, and any power delivery track directly adjacent to the power delivery track is connected to a second row…., see Abstract, see par [0033], two adjacent rails 15 are configured to supply power to standard cells arranged between a Vdd rail and a Vss rail… ) ; and electrically connecting the moved at least one power line on the second track line (see par [00-39-0041], the tracks 26 are alternately coupled to Vdd and Vss, that is, every T 1 coupled to Vdd and every T 2 coupled to Vss,….., see par [0010], the power delivery tracks is connected to a first row of mutually parallel TSVs, and any power delivery track directly adjacent to the power delivery track is connected to a second row…., see Abstract). Regarding claims 3 , Beyne discloses: wherein the identifying the first track line on which the plurality of power lines are arranged comprises electrically connecting the plurality of power lines on the first track line upon determining that an electrical connection on the first track line is possible (see par [00-39-0041], the tracks 26 are alternately coupled to Vdd and Vss, that is, every T 1 coupled to Vdd and every T 2 coupled to Vss,….., see par [0010], the power delivery tracks is connected to a first row of mutually parallel TSVs, and any power delivery track directly adjacent to the power delivery track is connected to a second row…., see Abstract). Regarding claims 7 , Beyne discloses: routing each of the plurality of signal lines in each of the plurality of layers before the identifying a first track line (see Abstract, with the power delivery tracks running transversely with respect to the power rails, and connected to the power rails by a plurality of Through Semiconductor Via connections…..[wherein connected to the power rails is the routing]). Regarding claims 8 , Beyne discloses: wherein the routing is either initial routing or final routing (see Abstract, with the power delivery tracks running transversely with respect to the power rails, and connected to the power rails by a plurality of Through Semiconductor Via connections….[wherein connected to the power rails is the initial routing]). Regarding claims 9 , Beyne discloses: wherein the plurality of power lines are any one or more types of a ground power line, a virtual power line, and a real power line(see par [00-39-0041], the tracks 26 are alternately coupled to Vdd and Vss, that is, every T 1 coupled to Vdd and every T 2 coupled to Vss,…..) . Allowable Subject Matter 12-151-08 AIA 07-43 12-51-08 Claim s 2 and 4-6 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. 13-03-01 AIA The following is a statement of reasons for the indication of allowable subject matter: The prior art of record does not teach or suggest the limitation as in claim 2 . Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to BRIAN NGO whose telephone number is (571)270-7011. The examiner can normally be reached M-F 7AM-4PM. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jack Chiang can be reached at 5712727483. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /BRIAN NGO/Primary Examiner, Art Unit 2851 Application/Control Number: 18/319,049 Page 2 Art Unit: 2851 Application/Control Number: 18/319,049 Page 3 Art Unit: 2851 Application/Control Number: 18/319,049 Page 4 Art Unit: 2851 Application/Control Number: 18/319,049 Page 5 Art Unit: 2851 Application/Control Number: 18/319,049 Page 6 Art Unit: 2851
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