Prosecution Insights
Last updated: May 29, 2026
Application No. 18/319,532

PASSIVATION/ENCAPSULATION LAYER, VIA AND DISTRIBUTION LAYER, SOLID-STATE BATTERY INCLUDING THE SAME, AND METHOD(S) OF MAKING THE SAME

Non-Final OA §DOUBLEPATENT§DP
Filed
May 18, 2023
Priority
May 18, 2022 — provisional 63/343,522
Examiner
BAIRD, CAMERON MICHAEL
Art Unit
1728
Tech Center
1700 — Chemical & Materials Engineering
Assignee
Ensurge Micropower Asa
OA Round
1 (Non-Final)
Grant Probability
Favorable
1-2
OA Rounds

Examiner Intelligence

Grants only 0% of cases
0%
Career Allowance Rate
0 granted / 0 resolved
-65.0% vs TC avg
Minimal +0% lift
Without
With
+0.0%
Interview Lift
resolved cases with interview
Typical timeline
Avg Prosecution
10 currently pending
Career history
13
Total Applications
across all art units

Statute-Specific Performance

§103
86.7%
+46.7% vs TC avg
Black line = Tech Center average estimate • Based on career data from 0 resolved cases

Office Action

§DOUBLEPATENT §DP
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Election/Restrictions Applicant’s election without traverse of claims 1-12 in the reply filed on 2/26/2026 is acknowledged. Double Patenting The nonstatutory double patenting rejection is based on a judicially created doctrine grounded in public policy (a policy reflected in the statute) so as to prevent the unjustified or improper timewise extension of the “right to exclude” granted by a patent and to prevent possible harassment by multiple assignees. A nonstatutory double patenting rejection is appropriate where the conflicting claims are not identical, but at least one examined application claim is not patentably distinct from the reference claim(s) because the examined application claim is either anticipated by, or would have been obvious over, the reference claim(s). See, e.g., In re Berg, 140 F.3d 1428, 46 USPQ2d 1226 (Fed. Cir. 1998); In re Goodman, 11 F.3d 1046, 29 USPQ2d 2010 (Fed. Cir. 1993); In re Longi, 759 F.2d 887, 225 USPQ 645 (Fed. Cir. 1985); In re Van Ornum, 686 F.2d 937, 214 USPQ 761 (CCPA 1982); In re Vogel, 422 F.2d 438, 164 USPQ 619 (CCPA 1970); In re Thorington, 418 F.2d 528, 163 USPQ 644 (CCPA 1969). A timely filed terminal disclaimer in compliance with 37 CFR 1.321(c) or 1.321(d) may be used to overcome an actual or provisional rejection based on nonstatutory double patenting provided the reference application or patent either is shown to be commonly owned with the examined application, or claims an invention made as a result of activities undertaken within the scope of a joint research agreement. See MPEP § 717.02 for applications subject to examination under the first inventor to file provisions of the AIA as explained in MPEP § 2159. See MPEP § 2146 et seq. for applications not subject to examination under the first inventor to file provisions of the AIA . A terminal disclaimer must be signed in compliance with 37 CFR 1.321(b). The filing of a terminal disclaimer by itself is not a complete reply to a nonstatutory double patenting (NSDP) rejection. A complete reply requires that the terminal disclaimer be accompanied by a reply requesting reconsideration of the prior Office action. Even where the NSDP rejection is provisional the reply must be complete. See MPEP § 804, subsection I.B.1. For a reply to a non-final Office action, see 37 CFR 1.111(a). For a reply to final Office action, see 37 CFR 1.113(c). A request for reconsideration while not provided for in 37 CFR 1.113(c) may be filed after final for consideration. See MPEP §§ 706.07(e) and 714.13. The USPTO Internet website contains terminal disclaimer forms which may be used. Please visit www.uspto.gov/patent/patents-forms. The actual filing date of the application in which the form is filed determines what form (e.g., PTO/SB/25, PTO/SB/26, PTO/AIA /25, or PTO/AIA /26) should be used. A web-based eTerminal Disclaimer may be filled out completely online using web-screens. An eTerminal Disclaimer that meets all requirements is auto-processed and approved immediately upon submission. For more information about eTerminal Disclaimers, refer to www.uspto.gov/patents/apply/applying-online/eterminal-disclaimer. Claims 1-12 are rejected on the ground of nonstatutory double patenting as being unpatentable over claims 1-12 of copending Application No. 18/319,552 by Tran et al., in view of Kwak et al. (US 2017/0288272 A1). Regarding claim 1, Tran claims a solid-state battery (Claim 1), comprising: a plurality of cells (Claim 1); and first and second terminals on first and second sides or edges of the solid-state battery (Claim 1), the first and second sides or edges being opposite from each other (Claim 1), wherein: each of the plurality of cells comprises: a cathode current collector (CCC) (Claim 1), a cathode on the cathode current collector (Claim 1), a solid-state electrolyte on the cathode (Claim 1), an anode current collector (ACC) on the electrolyte (Claim 1), a via or opening in the barrier and/or insulation film exposing the ACC (Claim 1), and a conductive redistribution layer in the via or opening, in the moat, on the barrier and/or insulation film, and on a first sidewall of each cell (Claim 1); one of the first and second terminals on the first side or edge of the battery is electrically connected to each ACC through the redistribution layer on the first sidewall (Claim 1), and the other of the first and second terminals is electrically connected to each cathode or CCC on the second side or edge of the battery (Claim 1). Tran fails to claim a moat in the cathode and the solid-state electrolyte and around the anode current collector. However, Kwak teaches a moat in the cathode and the solid-state electrolyte and around the anode current collector (Par. 0037, Fig. 10-15; the cathode 1003, and electrolyte layer 1204 are cut and the anode layer is exposed) It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the solid-state battery claimed by Tran by incorporating a moat through the cathode and electrolyte, as taught by Kwak. This would be done in order to form a patterned stacked battery, as stated in Kwak (Par. 0008; laser ablating…to form a first patterned stack”). Kwak also fails to teach a conductive redistribution layer in the via or opening, in the moat, on the barrier and/or insulation film, and on a first sidewall of each cell; one of the first and second terminals on the first side or edge of the battery is electrically connected to each ACC through the redistribution layer on the first sidewall. Due to the lack of evidence teaching this limitation in prior art references, this would not be found obvious to one of ordinary skill in the art before the effective filing date of the claimed invention. Regarding claim 2, Tran claims the solid-state battery of claim 1, wherein the CCC comprises a metal foil, sheet or film (Claim 2). Regarding claim 3, Tran claims the solid-state battery of claim 2, wherein the CCC comprises the metal foil, and the solid-state battery further comprises first and second barriers on opposite major surfaces of the metal foil, the first and second barriers having a thickness effective to prevent migration of atoms or ions from the metal foil into overlying layers (Claim 3). Regarding claim 4, Tran claims the solid-state battery of claim 1, wherein the cathode comprises a lithium metal oxide or lithium metal phosphate (Claim 4). Regarding claim 5, Tran claims the solid-state battery of claim 1, wherein the solid-state electrolyte comprises a lithium phosphorus oxynitride (LiPON), which may optionally be carbon-doped, or Li2WO4 (Claim 5). Regarding claim 6, Train claims the solid-state battery of claim 1, wherein the anode current collector comprises a conductive metal or graphite (Claim 6). Regarding claim 7, Tran fails to claim the solid-state battery of claim 1, wherein the moat comprises a cut through the cathode and the solid-state electrolyte, and optionally into the CCC. However, Kwak teaches a moat comprising a cut in the cathode and the solid-state electrolyte (Par. 0037, Fig. 10-15; the cathode 1003, and electrolyte layer 1204 are cut and the CCC is split by laser ablation). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to modify the solid-state battery claimed by Tran by incorporating a cut through the cathode, electrolyte, and CCC, as taught by Kwak. This would be done in order to enable patterned stacking of a solid-state thin-film battery, as stated in Kwak (Par. 0008; laser ablating…to form a first patterned stack”). Regarding claim 8, Tran claims the solid-state battery of claim 1, wherein the barrier and/or insulation film comprises a polyolefin, optionally with an inorganic oxide or nitride overlayer thereon (Claim 7). Regarding claim 9, Tran claims the solid-state battery of claim 1, wherein the redistribution layer comprises an air- and/or water-stable metal (Claim 8). Regarding claim 10, Tran claims the solid-state battery of claim 1, wherein the first and second terminals comprise a conductive epoxy (Claim 10). Regarding claim 11, Tran claims the solid-state battery of claim 1, wherein the first and second terminals comprise a noble metal such as Au, Pt, Pd or Cu (Claim 11). Regarding claim 12, Tran claims the solid-state battery of claim 1, further comprising a dummy cell on an uppermost surface of a stack of the plurality of cells (Claim 12). Allowable Subject Matter Claims 1-12 are rejected under nonstatutory double patenting, but would be allowable if the double patenting rejection was overcome due in the presence of a terminal disclaimer. The following is a statement of reasons for the indication of allowable subject matter: Claim 1 of the present application would be found allowable because prior art fails to teach “a conductive redistribution layer in the via or opening, in the moat, on the barrier and/or insulation film, and on a first sidewall of each cell; one of the first and second terminals on the first side or edge of the battery is electrically connected to each ACC through the redistribution layer on the first sidewall.” The closest prior art references are Kwak (US 2017/0288272 A1) and Snyder et al. (US 2006/0286448 A1). However, the references neither teach nor reasonably suggest the combination of features claimed, specifically the limitation of a conductive redistribution layer in combination with the remaining limitations. Kwak is the closest prior art. Kwak teaches a solid-state battery (Abstract), comprising: a plurality of cells (Par. 0009); wherein: each of the plurality of cells comprises: a cathode current collector (CCC) (cathode current collector layer 1602/1702), a cathode on the cathode current collector (cathode layer 1603/1703; Fig. 16, 18), a solid-state electrolyte on the cathode (electrolyte layer 1804; Fig. 18), an anode current collector (ACC) on the electrolyte (ACC layer 1806/1906; Fig. 18, 19; ACC is indirectly placed on the electrolyte, but an anode is directly placed on the electrolyte), a moat in the cathode and the solid-state electrolyte and around the anode current collector (Fig. 19), a barrier and/or insulation film encapsulating the CCC, the cathode, the solid-state electrolyte and the ACC (blanket encapsulation layer 2007; Fig. 20), a via or opening in the barrier and/or insulation film exposing the ACC (Fig. 21), and a terminal which is electrically connected to each cathode or CCC on an opposite side of the battery than the ACC. Kwak fails to teach terminals connected to each current collector/electrode, rather Kwak teaches each current collector exposed through the encapsulation layer, and does not explain the aspect of electrical connection to a terminal. Kwak also fails to teach a conductive redistribution with is layered in the via or opening, in the boat, on the barrier, and on a first sidewall of each cell, which electrically connects the ACC to a terminal. Snyder teaches first and second terminals (positive terminal 230, negative terminal 280) on first and second sides or edges of the solid-state battery, the first and second sides or edges being opposite from each other (Fig. 2), wherein a terminal is electrically connected to a CCC (cathode current collector 220) on a side or edge of a battery (Par. 0004, Fig. 2; terminal is electrically connected to the CCC through direct physical contact). Snyder fails to teach a conductive redistribution layer electrically connecting a terminal to an ACC, as Snyder rather teaches a terminal connected to an ACC (anode current collector 270) through direct physical contact (Par. 0004; Fig. 2). Based on the configuration of Snyder, it would be improper hindsight to modify Kwak so a conductive redistribution layer electrically connects an ACC to a terminal located on a side of the battery cell. One of ordinary skill would instead be drawn to the configuration of Snyder wherein an ACC is electrically connected to a terminal through direct physical contact. As Snyder is the closest prior art reference, one of ordinary skill in the art would not have known to connect an ACC to a terminal through a conductive redistribution layer in a via, in a moat, on a barrier and/or insulation film, and on a first sidewall of each cell. Therefore, the feature is considered to be allowable. Claims 2-12 would be allowable because they are dependent on claim 1. Conclusion The prior art made of record and not relied upon is considered pertinent to applicant's disclosure. Wang et al. (US 2021/0320324 A1) teaches a multilayer solid-state thin-film battery comprising a cathode, CCC, solid electrolyte, and ACC, encapsulated by a barrier. Wang fails to teach a moat in the cathode and electrolyte and a conductive redistribution layer connecting the ACC to a terminal. Any inquiry concerning this communication or earlier communications from the examiner should be directed to CAMERON M BAIRD whose telephone number is (571)272-9742. The examiner can normally be reached 7:30am-5pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Matthew Martin can be reached at (571) 270-7871. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /CAMERON M BAIRD/Examiner, Art Unit 1728 /MATTHEW T MARTIN/Supervisory Patent Examiner, Art Unit 1728
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Prosecution Timeline

May 18, 2023
Application Filed
May 06, 2026
Non-Final Rejection mailed — §DOUBLEPATENT, §DP
May 18, 2026
Response Filed

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Prosecution Projections

1-2
Expected OA Rounds
Grant Probability
Low
PTA Risk
Based on 0 resolved cases by this examiner. Grant probability derived from career allowance rate.

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