Office Action Predictor
Last updated: April 16, 2026
Application No. 18/320,000

CMUT TRANSDUCER AND METHOD FOR MANUFACTURING A CMUT TRANSDUCER

Non-Final OA §102§103
Filed
May 18, 2023
Examiner
ATMAKURI, VIKAS NMN
Art Unit
3645
Tech Center
3600 — Transportation & Electronic Commerce
Assignee
Vermon SA
OA Round
3 (Non-Final)
48%
Grant Probability
Moderate
3-4
OA Rounds
3y 3m
To Grant
82%
With Interview

Examiner Intelligence

Grants 48% of resolved cases
48%
Career Allow Rate
72 granted / 150 resolved
-4.0% vs TC avg
Strong +34% interview lift
Without
With
+33.8%
Interview Lift
resolved cases with interview
Typical timeline
3y 3m
Avg Prosecution
47 currently pending
Career history
197
Total Applications
across all art units

Statute-Specific Performance

§101
0.7%
-39.3% vs TC avg
§103
57.4%
+17.4% vs TC avg
§102
21.8%
-18.2% vs TC avg
§112
16.9%
-23.1% vs TC avg
Black line = Tech Center average estimate • Based on career data from 150 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . Continued Examination Under 37 CFR 1.114 A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on 10/30/2025 has been entered. Claim 3 is cancelled. Claims 1 and 13 are amended. Claims 1-2 and 4-13 are pending. Claim Objections Claim 4 is objected to because of the following informalities: It is dependent on cancelled claim 3. For purpose of compact prosecution Examiner is assuming applicant intended to amend claim 4 to depend on claim 1. Appropriate correction is required. Claim Rejections - 35 USC § 102 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. (a)(2) the claimed invention was described in a patent issued under section 151, or in an application for patent published or deemed published under section 122(b), in which the patent or application, as the case may be, names another inventor and was effectively filed before the effective filing date of the claimed invention. Claim 13 is rejected under 35 U.S.C. 102(a)(2) as being anticipated by Khuri-Yakub (US 2004/0085858 A1). Regarding claim 13, Regarding claim 13, Khuri-Yakub discloses a first silicon layer defining a first electrode of the transducer[#11 in Fig 1.4]; - a first silicon oxide layer disposed on and contacting the upper face of the first silicon layer[#27 in fig 1.4]; - silicon oxide localised walls vertically extending higher than the upper face of the first silicon oxide layer and partially entering the first silicon layer and extending vertically below a bottom surface of the first silicon oxide layer, said walls laterally delineating a cavity of the transducer[0034-0036 has fig 1.4 where on silicon layer #11 there is etching to form silicon oxide walls #24 which are higher than oxide layer #27 which enclose a cavity. Moreover oxide layer #37 is lower than #24 meaning it is extending vertically. Can also etch into silicon as shown by fig 2; See also 0041 which has oxidation of layer inside an etch meaning its entering the layer]; - a second silicon oxide layer closing the cavity at its upper face, the cavity vertically extending from the upper face of the first silicon oxide layer to the lower face of the second silicon oxide layer[0036 and Fig 1.6 has second layer #22 with second oxide layer #14 laid on first layer #11, first oxide layer #27 and oxide walls #24 to enclose cavity #12 in fig 1.7]; and - a second silicon layer disposed on and contacting the upper face of the second silicon oxide layer.[Fig 1.5 has oxide layer #22 on second silicon #14]. Claim Rejections - 35 USC § 103 In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 1-2 and 4-5, 8-9 and 11-12 are rejected under 35 U.S.C. 103 as being unpatentable over Khuri-Yakub (US 2004/0085858 A1) in view of Machida (US 2008/0259733 A1). Regarding claim 1, Khuri-Yakub teaches comprising the following steps:a) forming a first silicon oxide layer on a face of a first silicon layer defining a first electrode of the transducer[Fig 1.4 has oxide layer #27 on silicon layer #11; 0034-0036]; b) forming a second silicon oxide layer on a face of a second silicon layer[Fig 1.5 has oxide layer #22 on second silicon #14 or #21]; c) subsequent to step a), forming at the side of said face of the first silicon layer, by locally oxidizing the silicon of the first silicon layer, silicon oxide walls having a height higher than the thickness of the first silicon oxide layer, said walls laterally delineating a cavity of the transducer[0034-0037 has fig 1.4 where on silicon layer #11 there is etching or oxidizing to form silicon oxide walls #24 which are higher than oxide layer #27 which enclose a cavity. Can also etch into silicon as shown by fig 2; See also claim 1 for oxidization of silicon into silicon dioxide]; and d) subsequent to steps b) and c) , transferring and attaching the set comprising the second silicon layer and the second silicon oxide layer on the set comprising the first silicon layer, the first silicon oxide layer, and the silicon oxide walls, so as to close the cavity of the transducer, said cavity vertically extending from the face of the first silicon oxide layer opposite to the first silicon layer to the face of the second silicon oxide layer opposite to the second silicon layer[0036 and Fig 1.6 has second layer #21 or #14 with second oxide layer #22 laid on first layer #11, first oxide layer #27 and oxide walls #24 to enclose cavity #12 in fig 1.7]. wherein step c) comprises.....and the first silicon oxide layer at the desired locations of the silicon oxide walls, followed with a step of thermally oxidizing so as to form the silicon oxide walls[ Abstract; 0004-0005 has silicon nitride and 0035 has dry or wet etching; 0035, 0037 has thermal oxide growing the layer], ... Khuri-Yakub broadly teaches a step of depositing a silicon nitride layer on the face of the first silicon oxide layer opposite to the first silicon layer, followed with a step of locally etching the silicon nitride layer .....followed with a step of removing the silicon nitride layer. [Abstract 0004-0005 has silicon nitride and 0035 has dry or wet etching] Machida teaches that a step of depositing a silicon nitride layer on the face of the first silicon oxide layer opposite to the first silicon layer, followed with a step of locally etching the silicon nitride layer .....followed with a step of removing the silicon nitride layer. [Fig 8A, 8B and 0123-0126 has depositing silicon nitride and removal by wet etching] It would have been obvious to one of ordinary skill in the art before the filing date to have modified the CMUT fabrication of Khuri-Yakub with the nitride layer and wet etching of Machida in order nitrate on layers and remove by wet etching to cover parts and selectively remove parts. Regarding claim 2, Khuri- Yakub, as modified, teaches wherein in step a), the first silicon oxide layer is formed by dry-growing thermal oxidizing said face of the first silicon layer[(0035, 0037 has thermal oxide growing the layer], and, in step b), the second silicon oxide layer is formed by dry - growing thermal oxidizing said face of the second silicon layer. [0035, 0037 has thermal oxide growing the layer]. Regarding claim 4, Khuri-Yakub broadly teaches wherein removing the silicon nitride layer is performed by wet etching.[Abstract; 0004-0005 has silicon nitride and 0035 has dry or wet etching; 0035, 0037 has thermal oxide growing the layer] Machida teaches wherein removing the silicon nitride layer is performed by wet etching. [Fig 8A, 8B and 0123-0126 has depositing silicon nitride and removal by wet etching] Regarding claim 5, Khuri-Yakub, as modified, teaches wherein in step d), the set comprising the second silicon layer and the second silicon oxide layer is attached on the set comprising the first silicon layer, the first silicon oxide layer, and the silicon oxide walls by direct bonding. [Abstact; 0032-0037; Claim 1 has fusion bonding namely direct bonding]. Regarding claim 8, Khuri-Yakub, as modified, teaches wherein the first silicon layer is a fixed substrate, and the second silicon layer is a flexible membrane of the transducer. [0033 has figs 1.9 and 3.6 with membrane #14]. Regarding claim 9, Khuri- Yakub, as modified, teaches wherein the thickness of the first silicon oxide layer is substantially equal to the thickness of the second silicon oxide layer. [Fig 1.6 has layers #27 substantially equal to #22]. Regarding claim 11, Khuri- Yakub, as modified, teaches wherein the first silicon layer is doped. [0034 has selective doping]. Regarding claim 12, Khuri-Yakub, as modified, teaches comprising a step of forming, on a face of the second silicon layer opposite to the second silicon oxide layer, a metal layer defining a second electrode of the transducer. [Fig 1.9 has silicon layer #14 and metal for electrode #16; 0036]. Claim 6 is rejected under 35 U.S.C. 103 as being unpatentable over Khuri-Yakub (US 2004/0085858 A1) in view of Machida (US 2008/0259733 A1) as applied to claim 5 above, and further in view of Wikipedia (2021). Regarding claim 6, Khuri-Yakub does not explicitly teach wherein the direct bonding implemented in step d) comprises an annealing at a temperature comprised between 700 and 1,100C. Wikipedia teaches that wherein the direct bonding implemented in step d) comprises an annealing at a temperature comprised between 700 and 1,100C [Annealing at elevated temperatures section mentions 700 and 800 and 1000 meaning it reads on the claim] It would have been obvious to one of ordinary skill in the art before the filing date to have modified the fabrication of a CMUT in Khuri- Yakub with the temperatures in Wikipedia in order to anneal at elevated temperatures to establish annealing during bonding. It would also have been obvious to one having ordinary skill in the art at the time the invention was made to use 700-1000C, since it has been held that where the general conditions of a claim are disclosed in the prior art, discovering the optimum or workable ranges involves only routine skill in the art. In re Aller, 105 USPQ 233. Claim 7 is rejected under 35 U.S.C. 103 as being unpatentable over Khuri-Yakub (US 20040085858 A1) as applied to claim 5 above, and further in view of Christiansen (IEEE- 2013). Regarding claim 7, Khuri-Yakub does not explicitly teach wherein the direct bonding implemented in step d) is a bonding of the face of the second silicon oxide layer opposite to the second silicon layer on the face of the silicon oxide walls opposite to the second silicon oxide layer. Christiansen teaches that wherein the direct bonding implemented in step d) is a bonding of the face of the second silicon oxide layer opposite to the second silicon layer on the face of the silicon oxide walls opposite to the second silicon oxide layer. [Fig 1b, Page 1 has direct oxide to oxide bonding meaning the silicon oxide faces are bonded to each other and reads on the claim] It would have been obvious to one of ordinary skill in the art before the filing date to have modified the fabrication of a CMUT in Khuri-Yakub with the oxide direct bonding of Christiansen in order to achieve optimal direct bonding. Claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Khuri-Yakub (US 2004/0085858 A1) as applied to claim 1 above, and further in view of Rey (US 8,163,586 B2). Regarding claim 10, Khuri-Yakub teaches further comprising steps of forming, on the face of the first silicon layer opposite to the first silicon oxide layer, contact metallisation of the transducer, and a step of connecting said contact metallisation with a control integrated circuit of the transducer. [0034 has wafer being bottom electrode as being low resistivity for a conductive back plate 0037 has contact metallization; Claim 18 has forming of electrode for control]. Khuri Yakub broadly teaches contact metallisation of transducer. Rey teaches contact metallisation of transducer [Col 9 Lines 20-30 have contact metallisation of transducer] It would have been obvious to one of ordinary skill in the art before the filing date to have modified the fabricationofa CMUT in Khuri- Yakub with the contact metallization of Rey to create an electrode to control the CMUT. Response to Arguments Applicant's arguments filed 10/30/2025 have been fully considered but they are not persuasive. In response to applicant's arguments against the references individually, one cannot show nonobviousness by attacking references individually where the rejections are based on combinations of references. See In re Keller, 642 F.2d 413, 208 USPQ 871 (CCPA 1981); In re Merck & Co., 800 F.2d 1091, 231 USPQ 375 (Fed. Cir. 1986). Here applicant’s arguments in pages 6-8 of the remarks read the prior art overly narrowly. The prior art clearly has the oxide layer #27 formed by locally oxidizing the silicon layer and forming at the side of said face of the first silicon layer, by locally oxidizing the silicon of the first silicon layer, silicon oxide walls having a height higher than the thickness of the first silicon oxide layer, said walls laterally delineating a cavity of the transducer[0034-0037 has fig 1.4 where on silicon layer #11 there is etching or oxidizing to form silicon oxide walls #24 which are higher than oxide layer #27 which enclose a cavity. Can also etch into silicon as shown by fig 2; See also claim 1 for oxidization of silicon into silicon dioxide]; Moreover, the formation of silicon into silicon oxide in order to etch and form CMUT circuits in required shapes of silicon and oxide layers is the very basis of CMUT construction and well known to a person of ordinary skill in the art. Applicant's remaining arguments amount to a general allegation that the claims define a patentable invention without specifically pointing out how the language of the claims patentably distinguishes them from the references. Rejections are maintained – and no allowable subject matter can be identified at this time. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to VIKAS NMN ATMAKURI whose telephone number is (571)272-5080. The examiner can normally be reached Monday-Friday 7:30am-5:30pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Isam Alsomiri can be reached at (571)272-6970. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /VIKAS ATMAKURI/Examiner, Art Unit 3645 /JAMES R HULKA/Primary Examiner, Art Unit 3645
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Prosecution Timeline

May 18, 2023
Application Filed
Apr 07, 2025
Non-Final Rejection — §102, §103
Jul 16, 2025
Response Filed
Jul 28, 2025
Final Rejection — §102, §103
Oct 13, 2025
Interview Requested
Oct 21, 2025
Examiner Interview Summary
Oct 21, 2025
Applicant Interview (Telephonic)
Oct 30, 2025
Request for Continued Examination
Nov 12, 2025
Response after Non-Final Action
Dec 15, 2025
Non-Final Rejection — §102, §103 (current)

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Study what changed to get past this examiner. Based on 5 most recent grants.

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Prosecution Projections

3-4
Expected OA Rounds
48%
Grant Probability
82%
With Interview (+33.8%)
3y 3m
Median Time to Grant
High
PTA Risk
Based on 150 resolved cases by this examiner. Grant probability derived from career allow rate.

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