Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
DETAILED ACTION
This communication is a Final office action in merits. Claims 1-20, after amendment, are presently pending and have been elected and considered below.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 5/19/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102 of this title, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or
nonobviousness.
This application currently names joint inventors. In considering patentability of the claims the examiner presumes that the subject matter of the various claims was commonly owned as of the effective filing date of the claimed invention(s) absent any evidence to the contrary. Applicant is advised of the obligation under 37 CFR 1.56 to point out the inventor and effective filing dates of each claim that was not commonly owned as of the effective filing date of the later invention in order for the examiner to consider the applicability of 35 U.S.C. 102(b)(2)(C) for any potential 35 U.S.C. 102(a)(2) prior art against the later invention.
Claims 1-14 are rejected under 35 U.S.C. 103 as being anticipated by US 2022/0114424 A1, Quader et al. (hereinafter Quader) in view of US 2021/0200993 A1, Chen et al. (hereinafter Chen).
As to claim 1, Quader discloses a method of processing and combining feature maps using a hardware friendly multi-kernel convolution block (HFMCB), comprising:
splitting an input feature map into a plurality of feature maps, each of the plurality of feature maps having a reduced number of channels (pars 0002, 0008, 0063, 0084, input data array (feature map) being split and input over a plurality of input channels resulting in a plurality of respective feature maps);
processing each of the plurality of feature maps with a different series of kernels (pars 0004-0005, 0008-0009, 0012, perform convolution operations on each convolutional kernel/channel); and combining the processed plurality of feature maps (pars 0006, 0008, 0077, 0108, 0182, 0189, split feature maps being extracted, combined/concatenated in the output of convolution operations).
Quader does not expressly disclose plurality of feature maps being combined by performing an element-wise summation of each of the plurality of feature maps processed with a different series of kernels.
Chen, in the same or similar field of endeavor, further teaches combining the processed plurality of feature maps by performing an element-wise summation of each of the plurality of feature maps processed with a different series of kernels (Figs 5-8; pars 0033, 0040, 0043, 0045-0046, 0048-0049, 0052-0053, feature maps with HxW elements applied convolutions with kernels (element-wise summation operation)).
Therefore, consider Quader and Chen’s teachings as a whole, it would have been obvious to one of skill in the art before the filing date of invention to incorporate Chen’s teachings in Quader’s method to implement point-wise convolution for feature map output.
As to claim 2, Quader as modified discloses the method of Claim 1, wherein splitting the input feature map into the plurality of features maps comprises applying a 1x1 convolution function to reduce the number of channels for each of the plurality of feature maps (Chen: Figs 4, 6-9; pars 0036-0039).
As to claim 3, Quader as modified discloses the method of Claim 1, wherein the reduced number of channels for each of the plurality of features maps are equal (Quader: Figs 2A-2C; pars 0008, 0030, 0055-0056, 0063, the input being split into a number of features with the same down-sampled process or same type of filtering/channeling, therefore all channels having the same size; Figs 4, 5A).
As to claim 4, Quader as modified discloses the method of Claim 3, wherein combining the processed plurality of feature maps comprises applying a weighted sum of the plurality of feature maps (Quader: Figs 2A-2C; pars 0008, 0012-0014, 0174, 0178; Chen: pars 0034, 0054-0056).
As to claim 5, Quader as modified discloses the method of Claim 1, wherein processing each of the plurality of feature maps comprises applying a depthwise separable convolution function to a proper subset of feature maps included in the plurality of feature maps (Chen: pars 0022, 0063, 0065, 0079, depthwise separable convolution being applied).
As to claim 6, Quader as modified discloses the method of Claim 1, wherein each of the plurality of feature maps are processed in parallel with the different series of kernels (Quader: Figs 2A-2C).
As to claim 7, Quader as modified discloses the method of Claim 1, wherein each of the plurality of features maps include unique receptive fields (Quader: pars 0053, 0059, 0182, the receptive fields are uniquely defined by the size of the portion of an input activation map or kernel sizes relative to the input activation map size).
As to claim 8, it is a device claim encompassed claim 1. Rejection of claim 1 is therefore incorporated herein.
As to claim 9, it is rejected with the same reason as set forth in claim 2.
As to claims 10, 13-14, they are rejected with the same reason as set forth in claims 3, 6-7, respectively.
As to claim 11-12, they are rejected with the same reason as set forth in claims 4-5.
Claims 15-20 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of Quader.
As to claim 15, Chen discloses a method of applying a hardware friendly multi-kernel convolution network (HFMCN) to an input image using one or more hardware friendly multi-kernel convolution blocks (HFMCBs), the method comprising:
applying a depthwise separable convolution function to the input image that increases a channel size of a feature map from a first number of channels to a second number of channels (Figs 10-11; pars 0022-0024, 0035-0036, 0056, 0058, 0061, applying a depthwise separable convolution to input image for object recognition and feature maps being separated to generate multiple first and second combined feature maps with second feature maps having number of channels greater than the first one);
applying the one or more HFMCBs to the feature map having the second number of channels (Figs 4, 8-12; pars 0078, 0085, 0088, 0096, 0112, various hardware architectures, SoC chipset being implemented for the CNN blocks including channels and kernels), each of the plurality of feature maps having a third number of channels that is less than the second number of channels (pars 0023, 0038, 0080, 0083); combining the processed plurality of feature maps by performing an element-wise summation of each of the plurality of feature maps processed with a different series of kernels (Figs 5-8; pars 0045-0046, 0048-0049, 0052-0053); and processing the combined plurality of feature maps (Figs 56-8; pars 0048-0049, 0052-0053).
Chen does not expressly disclose splitting the feature map into a plurality of feature maps, processing each of the plurality of feature maps with a different series of kernels, and processing the combined plurality of feature maps using an application-specific layer (ASL) to output a processed output image.
Quader, in the same or similar field of endeavor, further teaches splitting the feature map into a plurality of feature maps (pars 0002, 0008, 0063, 0084, input data array (feature map) being split and input over a plurality of input channels resulting in a plurality of respective feature maps), each of the plurality of feature maps having a third number of channels that is less than the second number of channels (pars 0008-0009, 0012-0014, 0054-0056, reduced size channels), processing each of the plurality of feature maps with a different series of kernels (pars 0004-0005, 0008-0009, 0012-0013, perform convolution operations on each convolutional kernel/channel), and combining the processed plurality of feature maps (pars 0006, 0008, 0077, 0108, 0182, 0189, split feature maps being extracted, combined/concatenated in the output of convolution operations); and
processing the combined plurality of feature maps using an application-specific layer (ASL) to output a processed output image (Figs 2A-2C; pars 0008, 0012-0015, 0022, 0077, upsampling operation being an application specific layer operation).
Therefore, consider Chen and Quader’s teachings as a whole, it would have been obvious to one of skill in the art before the filing date of invention to incorporate Quader’s teachings in Chen’s method to provide computationally efficient CNN implementation for object recognition.
As to claim 16, Chen as modified discloses the method of Claim 15, wherein processing the combined plurality of feature maps using the ASL comprises, at least one of, applying a subpixel upsampling function to the combined plurality of feature maps (Quader: Figs 2A-2C; pars 0008, 0012-0015, 0022, 0077), applying a square convolution function to the plurality of feature maps (Chen: pars 0032, 0068, 0073), or applying a square convolution sigmoid function to the plurality of feature maps to obtain the processed output image (Quader: Fig 5B; pars 0146, 0159-0160, a sigmoid function being applied).
As to claim 17, Chen as modified discloses the method of Claim 15, wherein applying the depthwise separable convolution function to the input image comprises applying a square convolution function to the input image to increase the channel size of the feature map from the first number of channels to the second number of channels (Chen: 0032, 0069, 0073).
As to claim 18, Chen as modified discloses the method of Claim 15, wherein processing each of the plurality of feature maps comprises applying the depthwise separable convolution function to a proper subset of feature maps included in the plurality of feature maps (Chen: pars 0022, 0063, 0065, 0079, wepthwise separable convolution being applied).
As to claim 19, Chen as modified discloses the method of Claim 15, wherein combining the processed plurality of feature maps comprises applying a weighted sum of the plurality of feature maps (Chen: Figs 9A-9C; pars 0034, 0054-0056, 0058-0062; Quader: Figs 2A-2C; pars 0008, 0012-0014, 0174, 0178).
As to claim 20, Chen as modified discloses the method of Claim 15, wherein each of the plurality of features maps include unique receptive fields (Quader: pars 0053, 0059, 0182, also see rejection in claim 7).
Response to Arguments
Applicant’s arguments have been considered but they are moot in light of new ground of rejection.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Examiner’s Note
Examiner has cited particular column, line number, paragraphs and/or figure(s) in the reference(s) as applied to the claims for the convenience of the Applicant. Although the specified citations are representative of the teachings of the art and are applied to the specific limitations within the individual claim, other passages and figures may apply as well. It is respectfully requested from the applicant in preparing responses, to fully consider the reference(s) in entirety as potentially teaching all or part of the claimed invention, as well as the context of the passage as taught by the prior art or disclosed by the Examiner.
Contact Information
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Qun Shen whose telephone number is (571) 270-7927. The examiner can normally be reached on Mon-Friday from 9:00-5:00. If attempts to reach the examiner by telephone are unsuccessful, the examiner's Supervisor, Amandeep Saini can be reached on (571) 272-3382. The fax phone number for the organization where this application or proceeding is assigned is (571) 273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free).
/QUN SHEN/
Primary Examiner, Art Unit 2662