DETAILED ACTION
This action is responsive to the amendments filed 20 Jan 2025. Claims 1-13 are pending, claims 14-20 have been withdrawn by election. Claims 1 and 9 are independent.
Notice of AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Notice of Foreign Priority Claim
Acknowledgment is made of applicant’s claim for foreign priority. Receipt is acknowledged of certified copies of papers required by 37 CFR 1.55.
Restriction
In their response of 11 Aug 2025, applicant elected claims 1-13 for examination. Claims 15-35 have been withdrawn from consideration.
Response to Amendment
The Amendment filed 20 Jan 2025 has been entered. Claims 1-13 are currently pending in the application.
Response to Arguments
Applicant’s arguments filed on 20 Jan 2025 have been fully considered. Applicant’s arguments are not persuasive in regards to the 35 USC § 102 and 35 USC § 103 rejections as the claims are currently written. Arguments and corresponding examiner’s responses are shown below for independent Claim 1. The same arguments are valid for the similar features of the other independent claims.
Argument 1: The Applicant states “That is, amended claim 1 recites control logic that, during a program operation,
(i) determines whether a selected page is included in a weak page group, and
(ii) controls the peripheral circuits to perform either sequential discharge or simultaneous discharge of a plurality of word lines based on the determination. …
Thus, Zhao discloses ramp-down of wordlines based on their positional relationship with respect to the program wordline WL, such that wordlines located on one side of the program wordline are ramped down sequentially, while the program wordline WL, and wordlines located on the other side of the program wordline are ramped down at the same time.”
Response 1: The Examiner respectfully agrees with the facts presented, but disagrees with applicant’s conclusion. Applicant’s own specification shows that their method and Zhao’s method are equivalent as defined by applicant’s specification. Quoting from applicant’s specification:
[0092] At least one page group among the plurality of page groups GR1 to GRk described above may be defined as the weak page group. The weak page group may be a page in which a program disturb effect is large during the program operation. The weak page group may be defined as a page group including the memory cells of which the channel width is relatively small as shown in FIGS. 6 and 7. For example, the first page group GR1 adjacent to the source line SL may be defined as the weak page group. For example, a page group including the memory cells disposed at a lower end portion of the second cell portion may be defined as the weak page group.
[0042] The weak page may be a page in which a program disturb occurs relatively greatly, and for example, the weak page may be a page including memory cells of which a horizontal width, that is, a critical dimension, of a channel structure corresponding to the memory cells is relatively small.
Thus applicant’s specification determines (1) that a page near the bottom of a string is by definition a “weak page”, and (2) that pages get weaker as the string goes from the top to the bottom, which reduce the memory cell horizontal dimension at those lower points. It is well known that the vast majority of memory chips are constructed using laser burns and that the “horizontal dimension” decreases in these cells as the depth increases.
By applicant’s definition: weak pages = pages below target word line.
Argument 2: The Applicant states “Accordingly, Zhao fails to disclose or suggest the control logic recited in amended claim 1, which is configured to determine whether a selected page is included in a weak page group during a program operation”
Response 2: The Examiner respectfully disagrees. As shown in cited figures 5A and 5B, as cited in paragraphs [0040-0047] Zhou teaches that after determining the desired target cell, that Zhou’s system then methodically discharges the cells below the targeted cell – a step which can only occur during the operation on the target WL is known. Then Zhou methodically selects a target word line for operations, determines all of the world lines below the target word line, and discharges all of the “weaker pages” which are below the target word line.
The rejections below use the same citations as before and keep the same general thrust of the original office action. Other citations and description have been added to emphasize that Zhou discharges exactly the same memory pages as applicant’s claimed invention. If applicant wishes to exclude Zhou as art, then applicant should consider narrowing the claims and claiming a different method to “determining the weak page” other than mere position below the target word line in the memory cell stack.
Allowable Subject Matter
Claims 8 and 13 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Claim Rejections – 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless —
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
Claims 1 – 7 and 9 – 12 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Zhao, et al, U.S. Patent Application Publication 2020/0342946 (“Zhao”).
Regarding claim 1, Zhao teaches:
(Currently amended) A memory device comprising: a memory block including a plurality of pages respectively corresponding to a plurality of word lines; (Zhao, fig 1, 5A/B, “[0022] A programming sequence for a group of cells may include programming of all of the intended pages into the group of cells. A programming sequence may include one or more programming passes. A programming pass (which may include one or more programming loops) may program one or more pages. [0030] A block includes one or multiple pages of cells. The size of the page can vary depending on implementation. In one example, a page has a size of 16 kB. [0017] FIG. 1 depicts an example portion of a NAND flash memory array 100 in which wordline-by-wordline ramping down for program verify can be implemented.”; a memory array with a plurality of pages and that the pages can correspond to wordlines. Note: a “page” and “block” are broad terms that have been interpreted as “more than a single wordline” in this context).
peripheral circuits configured to apply operation voltages to the plurality of word lines and sequentially discharge or simultaneously discharge the plurality of word lines during a program operation; and (Zhao, fig 3,, “[0029] The controller 304 can be coupled to word lines of memory medium 302 to select one of the word lines, apply read voltages, apply program voltages combined with bit line potential levels, apply verify voltages, or apply erase voltages. [0040] In the example illustrated in FIGS. 5A and 5B, two or more wordlines are ramped down one at a time and sequentially in a direction from at least one end of the string to the program wordline. The program wordline is labeled WLn.”; peripheral circuits to program, read, and erase memory cells; that a controller can apply voltages to the memory array; that the controller can sequentially discharge the wordlines).
control logic configured to, during the program operation, determine whether a selected page is included in a weak page group and to control the peripheral circuits to sequentially discharge or simultaneously discharge the plurality of word lines (Zhao, fig 5A/B, “[0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn.”; a control logic that ramps down cells below the programmed WLn cell sequentially as shown in figure 5B. Note: Applicant’s specification (ppp 0092) explicitly defines that the word lines closer to the lowest end of a memory string are weaker. The spec states “For example, a page group including the memory cells disposed at a lower end portion of the second cell portion may be defined as the weak page group.” The logic is (A) Discharge (simultaneously or sequentially) all weaker page groups. (B) All word lines below a targeted word line are defined as successively weaker word groups. (C) Therefore, discharge (simultaneously or sequentially) all page groups below the targeted wordline).
based on the determination. (Zhao, fig 5A/B, “[0039] Instead of ramping down all the wordlines together, ramping down the wordlines one by one at the end of the program verify can reduce program disturb. [0041] In one example, the pre-defined number of wordlines near the program wordline are ramped down one by one with some time delay (e.g., -0.1-0.5 μS) between each ramp down.”; that the closest cells, and the cells towards the source side are sequentially ramped down first; that the closest cells towards the Source Lines are more likely to experience “program disturb”; that the controller may not ramp other cells, but only those most likely to experience program disturb; that these cells are disposed successively towards the lower end portion of a memory cell string towards the source line gate).
Regarding claim 2, Zhao teaches:
(Original) The memory device of claim 1, wherein the control logic controls the peripheral circuits to perform a program loop for sequentially performing (Zhao, fig 5A/B, “[0022] A programming sequence for a group of cells may include programming of all of the intended pages into the group of cells. A programming sequence may include one or more programming passes. A programming pass (which may include one or more programming loops) may program one or more pages.”; control logic can perform a control loop).
a program voltage apply operation, a verify voltage apply operation, and (Zhao, fig 5A/B, “[0022] A programming pass may include the application of one or more effective program voltages to cells to be programmed followed by the application of one or more verify voltages to these cells in order to determine which cells have finished programming.”; a programming loop includes both programming pulses followed by verification voltages).
a word line discharge operation on the selected page during the program operation at least once or more. (Zhao, fig 5A/B, “[0039] Instead of ramping down all the wordlines together, ramping down the wordlines one by one at the end of the program verify can reduce program disturb. FIG. 5A illustrates one example of a waveform in which the wordlines are ramped down one by one.”; the wordlines can be discharged sequentially, as shown in figure 5A/B after a verification process).
Regarding claim 3, Zhao teaches:
(Original) The memory device of claim 2, wherein the control logic includes a discharge controller, and the discharge controller is configured to determine whether the selected page is included in the weak page group, and (Zhao, fig 5A/B, “[0041] In one example, the pre-defined number of wordlines near the program wordline are ramped down one by one with some time delay (e.g., -0.1-0.5 μS) between each ramp down. [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn.”; a determination that the nearest 11 wordlines (or 12, 5, or 1) can be ramped down sequentially to reduce program disturb).
to control the peripheral circuits to discharge the plurality of word lines in a sequential discharge method or a simultaneous discharge method based on a determination result. (Zhao, fig 5A/B, “[0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time.”; a determination that other cells farther from the programmed cell can be ramped down simultaneously).
Regarding claim 4, Zhao teaches:
(Original) The memory device of claim 3, wherein the plurality of pages are divided into a plurality of page groups, and (Zhao, fig 5A/B, “ [0030] A block includes one or multiple pages of cells. The size of the page can vary depending on implementation. In one example, a page has a size of 16 kB [0041] In one example, the pre-defined number of wordlines near the program wordline are ramped down one by one with some time delay (e.g., -0.1-0.5 μS) between each ramp down.”; pages can be defined as any number of wordlines).
the plurality of word lines are divided into a plurality of word line groups corresponding to the plurality of respective page groups. (Zhao, fig 5A/B, “ [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn. [0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time.”; that wordlines can be grouped into three groups: (a) below WLn-11, (b) WLN11 to WLN, and (c) above WLN; that the three groups can be programmed differently to reduce program disturb in a memory cell).
Regarding claim 5, Zhao teaches (Original) The memory device of claim 4, wherein the sequential discharge method sequentially discharges each of the plurality of word lines or sequentially discharges the plurality of word line groups. (Zhao, fig 5A/B, “ [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn. [0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time. [0047] The wordline-by-wordline ramp-down can apply to all levels or less than all levels. … In one example, the other lower levels apply the conventional sequence (e.g., all wordlines ramp down together).”; that wordlines can be grouped into three groups: below WLn-11, WLN11 to WLN, and above WLN; that the three groups can be programmed differently to reduce program disturb in a memory cell; that the lowest group can be ramped down together (simultaneously); the middle group WLn-11 to WLn can be ramped down sequentially; finally the upper group can be ramped down together. See fig 5A).
Regarding claim 6, Zhao teaches (Original) The memory device of claim 3, wherein the discharge controller includes a weak page determiner, and the weak page determiner determines whether the selected page on which the program operation is being performed is included in the weak page group. (Zhao, fig 5A/B, “[0041] In one example, the pre-defined number of wordlines near the program wordline are ramped down one by one with some time delay (e.g., -0.1-0.5 μS) between each ramp down. [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn.”; a determiner that creates three groups of wordlines; above, below, and middle groups; that these groups dynamically change as the programming progresses; that the wordlines nearest the programming cell are most susceptible to program disturb and should be treated differently than those farther from the programming process cells).
Regarding claim 7, Zhao teaches (Original) The memory device of claim 4, wherein the weak page group is any one group among the plurality of page groups, and the weak page group is a page group having a relatively larger program disturb effect than another page group having a relatively smaller program disturb effect. (Zhao, fig 5A/B, “[0039] Instead of ramping down all the wordlines together, ramping down the wordlines one by one at the end of the program verify can reduce program disturb. FIG. 5A illustrates one example of a waveform in which the wordlines are ramped down one by one.[0046] As mentioned before, FIG. SA illustrates an example in which 11 wordlines before WLn are ramped down one at a time. In other examples, fewer or more wordlines ( e.g., 2-15 wordlines up to all the wordlines) near the selected wordline may be ramped down one by one. … Even though there may be excessive electrons trapped at <=-WLn-11, these electrons are far enough away from WLn that they do not cause boost voltage loss during the program pulse.”; the wordlines can be discharged sequentially, as shown in figure 5A/B after a verification process; that the group nearest WLN is most susceptible to program disturb than the groups above and below the programming group; as an example the wordlines <= WLn-11 are farther from the programmed lines and have a smaller program disturb effect if they are ramped down together).
Regarding claim 9, Zhao teaches:
(Original) A method of operating a memory device, the method comprising: sequentially applying a program voltage and a verify voltage to a selected word line corresponding to a selected page among a plurality of pages respectively corresponding to a plurality of word lines; (Zhao, fig 1, 5A/B, “[0030] A block includes one or multiple pages of cells. The size of the page can vary depending on implementation. In one example, a page has a size of 16 kB. [0017] FIG. 1 depicts an example portion of a NAND flash memory array 100 in which wordline-by-wordline ramping down for program verify can be implemented.[0022] A programming pass may include the application of one or more effective program voltages to cells to be programmed followed by the application of one or more verify voltages to these cells in order to determine which cells have finished programming.”; a memory array with a plurality of pages and that the pages can correspond to wordlines; that memory cells can have a program step followed by a verify step. Note: a “page” and “block” are broad terms that have been interpreted as “more than a single wordline” in this context).
determining whether the selected page is included in a weak page group; (Zhao, fig 5A/B, “ [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn. [0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time.”; that wordlines can be grouped into three groups: (a) below WLn-11, (b) WLN11 to WLN, and © above WLN; that the three groups can be programmed differently to reduce program disturb in a memory cell).
sequentially discharging the plurality of word lines when the selected page is included in the weak page group; and (Zhao, fig 5A/B, “[0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn.”; a control logic that ramps down cells below the programmed WLn cell sequentially as shown in figure 5B. Note: Applicant’s specification (ppp 0092) explicitly defines that the word lines closer to the lowest end of a memory string are weaker. The spec states “For example, a page group including the memory cells disposed at a lower end portion of the second cell portion may be defined as the weak page group.” The logic is (A) Discharge (simultaneously or sequentially) all weaker page groups. (B) All word lines below a targeted word line are defined as successively weaker word groups. (C) Therefore, discharge (simultaneously or sequentially) all page groups below the targeted wordline).
simultaneously discharging the plurality of word lines when the selected page is not included in the weak page group. (Zhao, fig 5A/B, “[0039] Instead of ramping down all the wordlines together, ramping down the wordlines one by one at the end of the program verify can reduce program disturb. FIG. 5A illustrates one example of a waveform in which the wordlines are ramped down one by one.[0046] As mentioned before, FIG. SA illustrates an example in which 11 wordlines before WLn are ramped down one at a time. In other examples, fewer or more wordlines ( e.g., 2-15 wordlines up to all the wordlines) near the selected wordline may be ramped down one by one. … Even though there may be excessive electrons trapped at <=-WLn-11, these electrons are far enough away from WLn that they do not cause boost voltage loss during the program pulse.”; that the closest cells, and the cells towards the source side are sequentially ramped down first; that the closest cells towards the Source Lines are more likely to experience “program disturb”; that the controller may not ramp other cells, but only those most likely to experience program disturb; that these cells are disposed successively towards the lower end portion of a memory cell string towards the source line gate).
Regarding claim 10, Zhao teaches:
(Original) The method of claim 9, wherein the plurality of pages are divided into a plurality of page groups, and (Zhao, fig 5A/B, “ [0030] A block includes one or multiple pages of cells. The size of the page can vary depending on implementation. In one example, a page has a size of 16 kB [0041] In one example, the pre-defined number of wordlines near the program wordline are ramped down one by one with some time delay (e.g., -0.1-0.5 μS) between each ramp down.”; pages can be defined as any number of wordlines).
the plurality of word lines are divided into a plurality of word line groups corresponding to the plurality of respective page groups. (Zhao, fig 5A/B, “ [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn. [0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time.”; that wordlines can be grouped into three groups: (a) below WLn-11, (b) WLN11 to WLN, and © above WLN; that the three groups can be programmed differently to reduce program disturb in a memory cell).
Regarding claim 11, Zhao teaches (Original) The method of claim 10, wherein sequentially discharging the plurality of word lines comprises sequentially discharging each of the plurality of word lines or sequentially discharging the plurality of word line groups for each group. (Zhao, fig 5A/B, “ [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn. [0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time.”; that wordlines can be grouped into three groups: (a) below WLn-11, (b) WLN11 to WLN, and (c) above WLN; that group (a) is discharged first in the sequence, that group (b) is discharges one at a time next; that group (c) is discharged last).
Regarding claim 12, Zhao teaches:
(Original) The method of claim 10, wherein the weak page group is any one group among the plurality of page groups, and (Zhao, fig 5A/B, “ [0030] A block includes one or multiple pages of cells. The size of the page can vary depending on implementation. In one example, a page has a size of 16 kB [0041] In one example, the pre-defined number of wordlines near the program wordline are ramped down one by one with some time delay (e.g., -0.1-0.5 μS) between each ramp down.”; pages can be defined as any number of wordlines).
the weak page group is a page group having a relatively larger program disturb effect than another page group having a relatively smaller program disturb effect. (Zhao, fig 5A/B, “ [0043] Note that although FIG. 5A illustrates the sequence as starting with ramping down WLn-11, the sequence can begin at an earlier or later wordline. For example, the ramp-down sequence can start by ramping down wordline WLn-12, WLn-10, WLn-5, WLn-4, WLn-2, WLn-1 etc., and ramping the wordlines down one-by-one until WLn. [0040] In one example, after WLn-1 is ramped down, the selected wordline WLn is ramped down. In the illustrated example, WLn and any wordlines above WLn are ramped down at the same time.”; that wordlines can be grouped into three groups: (a) below WLn-11, (b) WLN11 to WLN, and (c) above WLN; that the three groups can be programmed differently to reduce program disturb in a memory cell; that the page group (b) has the larger program disturb effect while the page groups (a) and (c) have smaller program disturb effects).
Conclusion
Applicant’s amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any extension fee pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to DONALD H.B. BRASWELL whose telephone number is (469)295-9119. The examiner can normally be reached on 7-5 Central Time (Dallas).
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/Donald HB Braswell/ Primary Examiner, Art Unit 2825