DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA. Claim Rejections - 35 USC § 101 35 U.S.C. 101 reads as follows: Whoever invents or discovers any new and useful process, machine, manufacture, or composition of matter, or any new and useful improvement thereof, may obtain a patent therefor, subject to the conditions and requirements of this title. Claim 1-8 and 13-20 rejected under 35 U.S.C. 101 because the claimed invention is directed to an abstract idea without significantly more. Step 1: Statutory Categories. The claims are evaluated to determine whether they fall within a statutory category. Claims 1-8 recite a “designing method” comprising a series of steps and therefore fall within the statutory category of a process. Claims 13-20 recite a “non-transitory computer-readable recording medium” and theref ore fall within the statutory category of a manufacture. Because these claims fall within at least one statutory category, the analysis proceeds to Step 2A. Step 2A, Prong One: Judicial Exception. The claims are evaluated to determine whether they recite a judicial exception. Independent claims 1 and 13 recite the steps of “arranging a plurality of macros…in accordance with a first rule”, “detecting a narrow area…a width of the narrow area being less than a first value”, and “arranging the power switch circuits…in accordance with a second rule”. These limitations describe concepts that can be practically performed in the human mind, including observations, evaluations, and judgments. Specifically evaluating the dimensions of an area, comparing it to a threshold value, and subsequently arranging items according to specified rules are mental processes. Additionally, comparing a width to a “first value” involves a mathematical concept (a mathematical relationship or calculation). Therefore, the claims recite an abstract idea (Mental Process and Mathematical Concept). Because the claims recite an abstract idea, the analysis proceeds to Step 2A, Prong Two. Step 2A, Prong Two: Practical Application. The claims are evaluated to determine whether the claim as a whole integrates the recited judicial exception into a practical application. In claims 1-8, the additional elements include a “circuit arrangement area”, an “semiconductor integrated circuit device”, “macros”, and “power switch circuit”. These elements merely generally link the use of the abstract idea to a particular technological environment (i.e., field of semiconductor physical design and EDA). Furthermore, the physical elements (macros, circuits) are recited at a high level of generality and do not demonstrate how the structural components themselves are improved. In claims 13-20, the additional elements include a generic “computer” and a “non-transitory computer-readable recording medium”. The claims invoke these generic computer components merely as a tool to perform the abstract mental process of evaluating areas and arranging components based on rules. This amounts to mere instructions to implement the abstract idea on a generic computer (i.e., “apply it”). The claims do not provide any specific technical details regarding how the detection is accomplished or how the arrangement rules are executed at a hardware level. Instead, the claims recite only the idea of a solution or outcome (detecting an area and arranging items). Therefore, the claims do not reflect an improvement to the functioning of a computer or to another technology or technical field. Because the claims do not integrate the abstract idea into a practical application, the claims are directed to a judicial exception. The analysis proceeds to Step 2B. Step 2B: Inventive Concept. The claims are evaluated to determine whether they recite additional element, considered individually and as an ordered combination, that amount to sign ificantly more than the judicial exception. The additional elements in the claims (generic macros, generic power switch circuits, circuit arrangement areas, and generic computer components for executing instructions) are well-understood, routine, and conventional components and activities in the field of semiconductor integrated circuit design. The steps of floorplanning , establishing layout rules, and evaluating routing congestion or IR-drop are well-known, routine, and conventional steps performed by artisans utilizing standard EDA tools. When considering the claim limitations as an ordered combination, they represent nothing more than the execution of conventional design rules and data gathering on generic computer equipment to perform an abstract mental process. The combination does not yield an unconventional arrangement or provide an inventive concept. Accordingly, claims 1- 8 and 13-20 are directed to an abstract idea without significantly more and are rejected as patent ineligible under §101. Claim Rejections - 35 USC § 112 The following is a quotation of 35 U.S.C. 112(b): (b ) CONCLUSION.— The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the inventor or a joint inventor regards as the invention. The following is a quotation of 35 U.S.C. 112 (pre-AIA), second paragraph: The specification shall conclude with one or more claims particularly pointing out and distinctly claiming the subject matter which the appl icant regards as his invention. Claim s 9-12 are rejected under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), second paragraph , as being indefinite for failing to particularly point out and distinctly claim the subject matter which the inventor or a joint inventor (or for applications subject to pre-AIA 35 U.S.C. 112, the applicant), regards as the invention. Claim 9 is directed to an apparatus claim (a semiconductor integrated circuit) but uses method and process terminology to define the apparatus. Specifically, it limits the structure by stating the circuits are “arranged in accordance with a first rule” and “in accordance with a second rule”. A “rule” is software algorithm or design method concept, not a physical structural limitation of a manufactured device. This mixes statutory classes and renders the structural metes and bounds indefinite. To be definite, the claim must define the physical geometric relationship or pattern of the circuits (e.g., “arranged in a staircase pattern”), rather than the rule used to get them there. Claim 10-12 depend from claim 9. Allowable Subject Matter Claims 1-20 would be allowable if rewritten or amended to overcome , as applicable, the rejection(s) under 35 U.S.C. 112(b) or 35 U.S.C. 112 (pre-AIA), 2nd paragraph and the § 101 rejections set forth above. Claims 1-20 are allowable because the prior art of record does not teach or suggest a method, IC, or CRM having all the combinations of steps or elements as recited in and required by independent claims 1, 9, or 13, particularly including, among other things, the following: In claim 1, detecting a narrow area from a first area, a width of the narrow area being less than a first value, the first area being an area in which the macros are not arranged within the circuit arrangement area; arranging the power switch circuits in the detected narrow area in accordance with a second rule different from the first rule; and arranging the power switch circuits in an area other than the narrow area within the first area in accordance with the first rule. Claims 2-8 depend from claim 1. In claim 9, a plurality of first power switch circuits that are arranged in accordance with a first rule in an area other than a narrow area within a first area, a width of the narrow area being less than a first value, the first area being an area in which the macros are not arranged within the circuit arrangement area; and a plurality of second power switch circuits that are arranged in the narrow area within the first area in accordance with a second rule different from the first rule. Claims 10-12 depend from claim 9. In claim 13, detecting a narrow area from a first area, a width of the narrow area being less than a first value, the first area being an area in which the macros are not arranged within the circuit arrangement area; arranging the power switch circuits in the detected narrow area in accordance with a second rule different from the first rule; and arranging the power switch circuits in an area other than the narrow area within the first area in accordance with the first rule. Claims 14-20 depend from claim 13. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Examiner FILLIN "Examiner name" \* MERGEFORMAT SURESH MEMULA whose telephone number is FILLIN "Phone number" \* MERGEFORMAT (571)272-8046 , and any inquiry for a formal Applicant initiated interview must be requested via a PTOL-413A form and faxed to the Examiner's personal fax phone number: (571) 273-8046. Furthermore, Applicant is invited to contact the Examiner via email ( suresh.memula@uspto.gov ) on the condition the communication is pursuant to and in accordance with MPEP §502.03 and §713.01. The Examiner can normally be reached Monday-Thursday: 9am-6pm. If attempts to reach the Examiner by telephone are unsuccessful, the Examiner’s supervisor, Jack Chiang, can be reached on 571-272-7483. The fax phone number for the organization where this application or proceeding is assigned (i.e., central fax phone number) is 571-273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. For more information about the PAIR system, see http://pair-direct.uspto.gov. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /SURESH MEMULA/ Primary Examiner, Art Unit 2851