DETAILED ACTION
This action is responsive to the communication filed 6 April 2026.
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Priority
Receipt is acknowledged of papers submitted under 35 U.S.C. 119(a)-(d), which papers have been placed of record in the file.
Election/Restrictions
Applicant’s election without traverse of the Species I (FIG. 5) embodiment in the reply filed on 6 November 2025 is acknowledged.
Accordingly, claims 18 and 19 are withdrawn because they are drawn to a non-elected species.
Response to Arguments
Applicant's arguments filed 6 April 2026 have been fully considered but they are not persuasive.
Applicant states:
Kim discloses an organic light emitting device (OLED) in which an organic stack (OS) comprising multiple emission layers is disposed between the anode (110) and the cathode (120). However, as noted in the Office Action, Kim's organic stack (OS) is formed as a common layer across the entire RGBW sub pixels.
. . .
In other words, Kim fails to disclose that the structure of the first and second emission layers as recited in Claim 1. In particular, the first emission layer is disposed to correspond to each of the sub pixels included in a first region, and the second emission layer is disposed to cover both the first emission layer and the second anode in a second region. Moreover, Kim provides no technical teaching or suggestion that would lead one of ordinary skill in the art to arrive at such a structure.
Applicant Arguments/Remarks Made in an Amendment (filed 6 April 2026) at 9-10. The Examiner respectfully notes that currently amended claim 1 includes broad and encompassing language to define the relationship between the first emission layer and the first, second, and third sub-pixels, such that numerous different configurations are encompassed by the limitation defining “a first emission layer disposed on the first anode in the first area and corresponding to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel . . . .”
The Examiner respectfully asserts that the limitation “a first emission layer disposed on the first anode in the first area and corresponding to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel” is susceptible to numerous plausible interpretations, including one wherein an emission layer that is “formed as a common layer” and disposed across the first, second, and third sub-pixels may be said to “correspond to” each of the first, second, and third sub-pixels. Applicant’s own disclosure even appears to directly support such an interpretation in sections describing formation of various layers of the device. See, e.g., [0093] of the instant application (“The p-type charge generation layer p-CGL is formed in the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4 and the variable emission and transmission area VTA. For example, the p-type charge generation layer p-CGL may be a common layer disposed in all of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4 and the variable emission and transmission area VTA. That is, the p-type charge generation layer p-CGL is formed in all of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4 and the variable emission and transmission area VTA through a single process. Thus, the p-type charge generation layer p-CGL is disposed on the n-type charge generation layer n-CGL in an area corresponding to the first sub-pixel SP1, the second sub-pixel SP2 and the third sub-pixel SP3. Also, the p-type charge generation layer p-CGL is disposed on the first anode ANO1 in an area corresponding to the fourth sub-pixel SP4.”) (emphasis added); [0097] of the instant application (“A second electron transport layer ETL2 is disposed on the second emission layer EML2. The second electron transport layer ETL2 improves transport of electrons to the second emission layer EML2. The second electron transport layer ETL2 is disposed corresponding to the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4 and the variable emission and transmission area VTA. For example, the second electron transport layer ETL2 may be formed as a common layer disposed in all of the first sub-pixel SP1, the second sub-pixel SP2, the third sub-pixel SP3, the fourth sub-pixel SP4 and the variable emission and transmission area VTA through a deposition process.”) (emphasis added); see also [0098] of the instant application (describing similar configurations for the electron injection layer EIL).
Accordingly, Applicant’s arguments are unpersuasive.
Claim Rejections - 35 USC § 112
The rejections of claims 8 and 12 under § 112(b) are withdrawn, responsive to Applicant’s amendment of the claims.
Claim Rejections - 35 USC § 103
Claims 1-4 and 6-17 are rejected under 35 U.S.C. § 103 as being unpatentable over U.S. Patent Publication No. 2021/0193758 (published June 24, 2021) (hereinafter “Choi”) in view of U.S. Patent Publication No. 2022/0209154 (published June 30, 2022) (hereinafter “Kim”).
Regarding independent claim 1, Choi discloses: A transparent display device (FIGS. 1/6/7/10, display apparatus 10, [0040]), comprising:
a first substrate (FIGS. 1/6/7/10, cover glass 133, [0083]) including a first area (FIGS. 1/6/7/10, opaque area AA3, [0079]) and a second area (FIGS. 1/6/7/10, transparent area AA1, [0079]);
an anode disposed on the first substrate and including: a first anode disposed in the first area (FIGS. 1/6/7/10, opaque area anode OAN, [0083]) and a second anode corresponding to the second area (FIGS. 1/6/7/10, transparent area anode TAN, [0083]);
a first emission layer disposed on the first anode in the first area (FIGS. 1/6/7/10, depicting a opaque area light emitting material disposed on the opaque area anode BAN, [0083]);
a second emission layer disposed on the first emission layer and the second anode in the second area (FIGS. 1/6/7/10, depicting a transparent area light emitting material disposed on the transparent area anode TAN, [0083]); and
a cathode (FIGS. 1/6/7/10, cathode CA, [0083]) disposed on the second emission layer (FIGS. 1/6/7/10, depicting wherein the cathode CA is disposed on the transparent area light emitting material disposed on the transparent area anode TAN),
wherein the first anode and the second anode include at least one transparent electrode layer (FIGS. 1/6/7/10, depicting wherein the opaque area anode OAN and the transparent area anode TAN include a transparent metal 142, [0088]), and
wherein the first anode further includes a reflective layer (FIGS. 1/6/7/10, depicting wherein the opaque area anode OAN includes a reflective electrode 141, [0090]).
Choi does not specifically disclose a second emission layer disposed to cover the first emission layer.
In the same field of endeavor, Kim discloses a display device (FIG. 6, display device 1000, [0085]) including a white light emitting device (FIGS. 2/6, organic stack OS, [0085]) and color filters (FIGS. 2/6, color filters 109R/G/B, [0058]) that is configured to emit light of different colors (FIGS. 2/6, [0058]: “In addition, in the white light emitting device according to the second aspect of the present disclosure, lights of different colors emitted from the multiple stacks S1 and S2 (or BS1, PS and BS2) may be combined to generate white light, and the subpixels may emit lights of different colors to color filters 109R, 109G and 109B (shown in FIG. 6), which are provided at emission sides of respective subpixels.”), wherein a second emission layer (FIGS. 2/6, second blue emission stack BS2 including blue emission layer BEML2 160, [0055]) is disposed to cover a first emission layer (FIGS. 2/6, phosphorescent stack PS and first blue emission stack BS1, [0055]), and which is a common layer disposed in each of a red, green, blue, and white subpixel (FIGS. 2/6, depicting wherein the organic stack OS including the second blue emission stack BS2 including blue emission layer BEML2 160 is disposed in each of the sub-pixels R_SP, G_SP, B_SP, and W_SP, [0095]). Regarding the white light emitting device, sub-pixels, and color filter configuration, in [0067], Kim states: “Accordingly, it is possible to increase the efficiency of blue light emission of relatively low visibility and thus to improve both emission efficiency and color temperature. The improvement of the color temperature means that rich color representation is possible, visibility is improved, and eye-friendly cool white light is realized.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the disclosed display apparatus of Choi by substituting white light emitting device, sub-pixels, and color filter configuration of Kim in order to improve the emission efficiency and color representation of the display apparatus. See Kim [0067].
Moreover, the substitution of the white light emitting device, sub-pixels, and color filter configuration of Kim would result in a configuration wherein the first area (Kim FIGS. 2/6; Choi FIGS. 1/6/7/10, opaque area AA3) includes a first sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, red sub-pixel R_SP), a second sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, green sub-pixel G_SP), and a third sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, blue sub-pixel B_SP), and further wherein the first emission layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, phosphorescent stack PS and first blue emission stack BS1) corresponds to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein phosphorescent stack PS and first blue emission stack BS1 disposed in the organic stack OS are disposed in each of the red, blue, and green sub-pixels R_SP, G_SP, and B_SP).
Regarding claim 2, Choi in view of Kim further discloses wherein the second area transmits light and is a variable emission and transmission area that emits light when a voltage is applied to the second anode and the cathode (Choi FIGS. 1/6/7/10, [0051]: “The transparent area AA1 may be implemented to be transparent so that external light travels to the inside of the camera 500. That is, the transparent area AA1 may include a plurality of emission areas, where the transparent area organic light emitting diodes for displaying an image are provided, and a plurality of transmissive areas which are provided between the plurality of emission areas and transmit external light, which is incident through a front surface of the organic light emitting display panel 100, to the camera 500 disposed on the rear surface of the organic light emitting display panel 100. In this case, each of the emission areas may be implemented to transmit a portion of the external light.”).
Regarding claim 3, Choi in view of Kim further discloses wherein the second emission layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, second blue emission stack BS2 including blue emission layer BEML2 160, [0055]) is a common layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the organic stack OS including the second blue emission stack BS2 including blue emission layer BEML2 160 is disposed in each of the sub-pixels R_SP, G_SP, B_SP, and W_SP, [0095]) disposed in both the first area and the second area (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6; depicting wherein the organic stack OS would be disposed in each of the sub-pixels R_SP, G_SP, B_SP, and W_SP of Kim located in each of the plurality of areas including the opaque area AA3 and the transparent area AA1 of Choi just as the organic stack OS is disposed in all of the sub-pixels R_SP, G_SP, B_SP, and W_SP that comprise the entire display device 1000 of Kim).
Regarding claim 4, Choi in view of Kim further discloses wherein the second emission layer emits blue light or white light (FIGS. 2/6, disclosing wherein the second blue emission stack BS2 including blue emission layer BEML2 160 emits blue light, [0055]).
Regarding claim 6, Choi in view of Kim further discloses wherein the first sub-pixel is a red sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, red sub-pixel R_SP), the second sub-pixel is a green sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, green sub-pixel G_SP), and the third sub-pixel is a blue sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, blue sub-pixel B_SP), and wherein the first emission layer corresponding to the first sub-pixel emits red light (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, phosphorescent stack PS and first blue emission stack BS1, wherein the phosphorescent stack PS includes a first emission layer 141 which emits red light, [0035]), the first emission layer corresponding to the second sub-pixel emits green light (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, phosphorescent stack PS and first blue emission stack BS1, wherein the phosphorescent stack PS includes a third emission layer 143 which emits green light, [0035]), and the first emission layer corresponding to the third sub-pixel emits blue light (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, phosphorescent stack PS and first blue emission stack BS1, wherein the first blue emission stack BS1 emits blue light, [0055]).
Regarding claim 7, Choi in view of Kim further discloses wherein the first area (Kim FIGS. 2/6; Choi FIGS. 1/6/7/10, opaque area AA3) further includes a fourth sub-pixel, and wherein the fourth sub-pixel is a white sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, white sub-pixel W_SP).
Regarding claim 8, Choi in view of Kim further discloses
a hole injection layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, first hole-transport-related common layer 1210 may further include a hole injection layer HIL 121, [0032]) disposed on the first anode (Kim FIGS. 2/6; Choi FIGS. 1/6/7/10, opaque area anode OAN) corresponding to each of the first sub-pixel, the second sub-pixel, and the third sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the hole injection layer HIL 121 disposed in the organic stack OS is disposed in each of the red, blue, and green sub-pixels R_SP, G_SP, and B_SP);
a first hole transport layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, first hole-transport-related common layer 1210 may further include a hole transport layer HTL1 122, [0032]) disposed on the hole injection layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the hole transport layer HTL1 122 is disposed on the hole injection layer HIL 121);
the first emission layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, phosphorescent stack PS and first blue emission stack BS1) disposed on the first hole transport layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the phosphorescent stack PS and first blue emission stack BS1 are disposed on the hole transport layer HTL1 122); and
a first electron transport layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, electron transport layer ETL1, [0033]) disposed on the first emission layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the electron transport layer ETL1 is disposed on the phosphorescent stack PS and first blue emission stack BS1).
Regarding claim 9, Choi in view of Kim further discloses
a charge generation layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, charge generation layer 150, [0052]) including an n-type charge generation layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, n-type charge generation layer 151, [0052]) and a p-type charge generation layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, p-type charge generation layer 152, [0052]),
wherein the n-type charge generation layer is disposed on the first electron transport layer corresponding to the first sub-pixel, the second sub-pixel, and the third sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the n-type charge generation layer 151 is disposed on the electron transport layer ETL1, wherein the organic stack OS corresponds to each of the sub-pixels R/G/B/W_SP), and
wherein the p-type charge generation layer is a common layer disposed in both the first area and the second area (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the sub-pixels R/G/B/W_SP are in each of the opaque area AA3 and the transparent area AA1, and the organic stack OS is in all of the sub-pixels R/G/B/W_SP in each of the areas AA3 and AA1, and the p-type charge generation layer 152 is in the organic stack OS) on the n-type charge generation layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the p-type charge generation layer 152 is on the n-type charge generation layer 151).
Regarding claim 10, to the extent claim 10 claims process limitations, the Examiner respectfully notes that claim 10 is directed to a product. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. MPEP § 2113(I) (quoting In re Thorpe, 777 F.2d 695, 698 (Fed. Cir. 1985)). Moreover, “because validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different processes.” MPEP § 2113(I) (quoting Amgen Inc. v. F. Hoffmann-La Roche Ltd., 580 F.3d 1340, 1370 n. 14 (Fed. Cir. 2009).
In the instant case, the claimed process step wherein “wherein each of the hole injection layer, the first hole transport layer, the first emission layer, the first electron transport layer, and the n-type charge generation layer is prepared through a solution process” does not appear to impart or imply any distinctive structural characteristics to the final display device, and the claimed display device product is capable of definition other than by the process steps by which it is made. See MPEP § 2113(I) (citing In re Garnero, 412 F.2d 276 (CCPA 1979) and In re Nordt Dev. Co., 881 F.3d 1371, 1375-76 (Fed. Cir. 2018)). Accordingly, the claimed process step wherein “wherein each of the hole injection layer, the first hole transport layer, the first emission layer, the first electron transport layer, and the n-type charge generation layer is prepared through a solution process” has not been given any patentable weight, insofar as claim 10 claims a process, technique, or steps of a solution process of preparing the layers.
Because Choi in view of Kim discloses each of the structures of claim 10, detailed in the above rejection of claims 8 and 9, claim 10 is rejected under 35 U.S.C. 103 as being unpatentable over Choi in view Kim.
Regarding claim 11, Choi in view of Kim further discloses wherein the p-type charge generation layer is disposed on
the n-type charge generation layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the p-type charge generation layer 152 is disposed on the n-type charge generation layer 151),
the first anode corresponding to the fourth sub-pixel (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the sub-pixels R/G/B/W_SP are in each of the opaque area AA3 and the transparent area AA1, including each of the anodes OAN and TAN, and the organic stack OS is in all of the sub-pixels R/G/B/W_SP in each of the areas AA3 and AA1, and the p-type charge generation layer 152 is in the organic stack OS) and
the second anode (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the sub-pixels R/G/B/W_SP are in each of the opaque area AA3 and the transparent area AA1, including each of the anodes OAN and TAN, and the organic stack OS is in all of the sub-pixels R/G/B/W_SP in each of the areas AA3 and AA1, and the p-type charge generation layer 152 is in the organic stack OS).
Regarding claim 12, Choi in view of Kim further discloses
a second hole transport layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, hole transport layer HTL4, [0062]) disposed on the p-type charge generation layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the hole transport layer HTL4 is disposed on the p-type charge generation layer 152);
a second emission layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, second blue emission stack BS2 including blue emission layer BEML2 160) disposed on the second hole transport layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the blue emission layer BEML2 160 is disposed on the hole transport layer HTL4);
the second electron transport layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, electron transport layer ETL3 129, [0061]) disposed on the second emission layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the electron transport layer ETL3 129 is disposed on the blue emission layer BEML2 160).
Choi in view of the FIG. 2 embodiment of Kim does not specifically disclose an electron injection layer disposed on the second electron transport layer.
In the same field of endeavor, the FIG. 1 embodiment of Kim discloses an electron injection layer (FIG. 1, common layer ETL2 1240 including an electron injection layer, [0033]: “In addition, the second electron-transport-related common layer 1240 may further include an electron injection layer”) disposed on a second electron transport layer (FIG. 1, common layer ETL2 including an electron transport layer, [0033]: “Each of the first and second electron-transport-related common layers 1220 and 1240 is a layer related to the transport of electrons and the rate of supply of electrons to an adjacent emission layer, and may include at least one of an electron transport layer”). Regarding the electron injection layer, in [0033], Kim states: “In addition, the second electron-transport-related common layer 1240 may further include an electron injection layer, which is in contact with the second electrode 200 and lowers interfacial resistance when electrons are injected from the second electrode 200.”
Accordingly, it would have been obvious to one of ordinary skill in the art before the effective filing date of the invention to modify the disclosed display apparatus of Choi and FIG. 2 of Kim by adding the electron injection layer of the common layer 1240 of the FIG. 1 embodiment of Kim such that the electron injection layer is disposed on the electron transport layer ETL3 of the FIG. 2 embodiment in order to lower interfacial resistance when electrons are injected from the electrode. See Kim [0033].
Regarding claim 13, to the extent claim 13 claims process limitations, the Examiner respectfully notes that claim 13 is directed to a product. Even though product-by-process claims are limited by and defined by the process, determination of patentability is based on the product itself. The patentability of a product does not depend on its method of production. If the product in the product-by-process claim is the same as or obvious from a product of the prior art, the claim is unpatentable even though the prior product was made by a different process. MPEP § 2113(I) (quoting In re Thorpe, 777 F.2d 695, 698 (Fed. Cir. 1985)). Moreover, “because validity is determined based on the requirements of patentability, a patent is invalid if a product made by the process recited in a product-by-process claim is anticipated by or obvious from prior art products, even if those prior art products are made by different processes.” MPEP § 2113(I) (quoting Amgen Inc. v. F. Hoffmann-La Roche Ltd., 580 F.3d 1340, 1370 n. 14 (Fed. Cir. 2009).
In the instant case, the claimed process step wherein “wherein the p-type charge generation layer, the second hole transport layer, the second emission layer, the second electron transport layer and the electron injection layer are prepared through a deposition process” does not appear to impart or imply any distinctive structural characteristics to the final display device, and the claimed display device product is capable of definition other than by the process steps by which it is made. See MPEP § 2113(I) (citing In re Garnero, 412 F.2d 276 (CCPA 1979) and In re Nordt Dev. Co., 881 F.3d 1371, 1375-76 (Fed. Cir. 2018)). Accordingly, the claimed process step wherein “wherein the p-type charge generation layer, the second hole transport layer, the second emission layer, the second electron transport layer and the electron injection layer are prepared through a deposition process” has not been given any patentable weight, insofar as claim 13 claims a process, technique, or steps of a deposition process of preparing the layers.
Because Choi in view of Kim discloses each of the structures of claim 13, detailed in the above rejection of claims 9 and 12, claim 13 is rejected under 35 U.S.C. 103 as being unpatentable over Choi in view Kim.
Regarding claim 14, Choi in view of Kim further discloses a second substrate (Choi FIGS. 1/6/7/10, substrate 121, [0083]) disposed to face the first substrate (Choi FIGS. 1/6/7/10, depicting wherein the substrate 121 is disposed to face the cover glass 133); and
a color filter layer (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, color filters 109R/G/B) disposed on one surface of the second substrate which faces the first substrate (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the color filters 109R/G/B would be disposed on one surface of the substrate 121 which faces the cover glass 133), wherein the color filter layer includes a plurality of color filters corresponding to the first sub-pixel, the second sub-pixel, and the third sub-pixel, respectively (Choi FIGS. 1/6/7/10; Kim FIGS. 2/6, depicting wherein the color filters 109R/G/B correspond to the red, blue, and green sub-pixels R/G/B_SP, respectively).
Regarding claim 15, Choi in view of Kim further discloses a plurality of thin film transistors (FIGS. 1/6/7/10, opaque area driving transistor OTdr and transparent area driving transistor TTdr, [0086]) disposed on the first substrate (FIGS. 1/6/7/10, depicting wherein the opaque area driving transistor OTdr and transparent area driving transistor TTdr are disposed on the cover glass 133) and electrically connected to each of the first anode and the second anode (FIGS. 1/6/7/10, depicting wherein the opaque area driving transistor OTdr and transparent area driving transistor TTdr are electrically connected to the buffer area anode OAN and the transparent area anode TAN, respectively)
Regarding claim 16, Choi in view of Kim further discloses wherein the first sub-pixel, the second sub-pixel and the third sub-pixel are disposed to be spaced apart from each other along a first direction (Kim FIGS. 2/6; Choi FIGS. 1/6/7/10, depicting wherein each of the red, green, and blue sub-pixels R_SP, G_SP, and B_SP in the opaque area AA3 would be disposed to be spaced apart from each other along a first direction), and wherein the variable emission and transmission area is disposed in a second direction transverse to the first direction to be spaced apart from the first sub-pixel, the second sub-pixel, and the third sub-pixel (Kim FIGS. 2/6; Choi FIGS. 1/6/7/10, depicting wherein the transparent area AA1 is disposed in a second direction transverse to the first direction to be spaced apart from each of the red, green, and blue sub-pixels R_SP, G_SP, and B_SP).
Regarding claim 17, Choi in view of Kim further discloses wherein the variable emission and transmission area is disposed in a second direction perpendicular to the first direction to be spaced apart from the first sub-pixel, the second sub-pixel, and the third sub-pixel (Kim FIGS. 2/6; Choi FIGS. 1/6/7/10, depicting wherein the transparent area AA1 is disposed in a second direction perpendicular to the first direction to be spaced apart from each of the red, green, and blue sub-pixels R_SP, G_SP, and B_SP).
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
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/ADAM D WEILAND/
Examiner, Art Unit 2813
/STEVEN B GAUTHIER/Supervisory Patent Examiner, Art Unit 2813
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