Prosecution Insights
Last updated: October 27, 2026
Application No. 18/326,458

PHOTONIC INTEGRATED CIRCUIT EDGE COUPLING AND FIBER ATTACH UNIT ATTACHMENT STRESS RELIEF

Non-Final OA §102§103
Filed
May 31, 2023
Examiner
ENDRESEN, KIRSTEN DANIELA
Art Unit
2874
Tech Center
2800 — Semiconductors & Electrical Systems
Assignee
Intel Corporation
OA Round
1 (Non-Final)
71%
Grant Probability
Favorable
1-2
OA Rounds
0m
Est. Remaining
88%
With Interview

Examiner Intelligence

Grants 71% — above average
71%
Career Allowance Rate
58 granted / 82 resolved
+2.7% vs TC avg
Strong +18% interview lift
Without
With
+17.5%
Interview Lift
resolved cases with interview
Typical timeline
2y 11m
Avg Prosecution
33 currently pending
Career history
121
Total Applications
across all art units

Statute-Specific Performance

§101
0.4%
-39.6% vs TC avg
§103
45.0%
+5.0% vs TC avg
§102
27.2%
-12.8% vs TC avg
§112
26.6%
-13.4% vs TC avg
Black line = Tech Center average estimate • Based on career data from 82 resolved cases

Office Action

§102 §103
DETAILED ACTION Notice of Pre-AIA or AIA Status The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA . In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status. Election/Restrictions Applicant’s election without traverse of in the reply filed on Species G is acknowledged. Examiner appreciates Applicant’s careful consideration regarding the Feature 3b and confirms that their interpretation was correct. Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 1, 3-5, 9, and 11-13 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Brusberg et al. (US 2021/0271037; hereinafter Brusberg). Regarding claim 1: Brusberg disclosesAn apparatus (Fig. 5B, Fig. 22) comprising: an integrated circuit component comprising a substrate (Fig. 5A, substrate 260; Fig. 22, substrate 762), the substrate comprising a cutout (Fig. 5A, peripheral recesses 265; Fig. 22, peripheral recess where 761 is received); a processing unit (Fig. 5B, IC 330; Fig. 22, electronic IC 790) attached to the substrate, the processing unit comprising a processing unit conductive contact on a surface of the processing unit (Fig. 5B, electrical contact pads 332; Fig. 22, contact pads 794); and a photonic integrated circuit (PIC) (Fig. 5B, either of PICs 300; Fig. 22, PIC 770) comprising a waveguide (Fig. 5B, waveguide 302; Fig. 22, waveguide regions 772) and a PIC conductive contact on a surface of the PIC (Fig. 5B, bonding pad 303; Fig. 22, upper contact pads 777), the processing unit conductive contact attached to the PIC conductive contact (in Fig. 5B, they are attached via the substrate 260; additionally, see paragraph 0127; Fig. 22 shows connection between 777 and 794 via bonding bumps 796), the waveguide extending to an edge of the PIC (Figs. 5B and 22 show this), the edge of the PIC substantially flush with a wall of the cutout or extending into the cutout (Fig. 5B shows that the bottom edge of the PIC is substantially flush with a wall of the cutout, which corresponds to the upper surface 270 of the glass body 262; Fig. 22 shows the bottom edge of the PIC is substantially flush with a wall of the cutout, which corresponds to the upper surface 764 of the substrate 762). Regarding claim 3: Brusberg disclosesThe apparatus of claim 1 (as applied above), wherein the cutout extends partially through the substrate from a top surface of the substrate (Fig. 5B shows the cutout extends partially through the substrate from the top surface 270; Fig. 22 shows the cutout extends partially through the substrate from the top surface 764 to the intermediate surface 765). Regarding claim 4: Brusberg disclosesThe apparatus of claim 1 (as applied above), wherein the substrate further comprises a recess in a surface of the substrate (Fig. 5A, cavity 299; see paragraph 0163, Fig. 22 also has a cavity, which corresponds to the area with the redistribution layer 780), the PIC at least partially located in the recess (Figs. 5B and 22 show this), and the PIC conductive contact is attached to the processing unit conductive contact (they are attached via the substrate; additionally, see paragraph 0127 and 0163). Regarding claim 5: Brusberg disclosesThe apparatus of claim 1 (as applied above), further comprising an attachment block (Fig. 5B, elevated portions 263), an edge of the attachment block substantially flush with the edge of the PIC (Fig. 5B shows the top edge of the attachment block substantially flush with the edge of the PIC). Regarding claim 9: Brusberg disclosesAn apparatus (Fig. 5B, Fig. 22) comprising: an integrated circuit component comprising a substrate (Fig. 5A, substrate 260; Fig. 22, substrate 762), the substrate comprising a cutout (Fig. 5A, peripheral recesses 265; Fig. 22, peripheral recess where 761 is received); a processing unit (Fig. 5B, IC 330; Fig. 22, electronic IC 790) attached to the substrate, the processing unit comprising a processing unit conductive contact on a surface of the processing unit (Fig. 5B, electrical contact pads 332; Fig. 22, contact pads 794); a photonic integrated circuit (PIC) (Fig. 5B, either of PICs 300; Fig. 22, PIC 770) comprising a waveguide (Fig. 5B, waveguide 302; Fig. 22, waveguide regions 772) and a PIC conductive contact (Fig. 5B, bonding pad 303; Fig. 22, upper contact pads 777) on a surface of the PIC, the processing unit conductive contact attached to the PIC conductive contact (in Fig. 5B, they are attached via the substrate 260; additionally, see paragraph 0127; Fig. 22 shows connection between 777 and 794 via bonding bumps 796), the waveguide extending to an edge of the PIC (Figs. 5B and 22 show this), the edge of the PIC coplanar with a wall of the cutout or extending into the cutout (Fig. 5B shows that the bottom edge of the PIC is coplanar with a wall of the cutout, which corresponds to the upper surface 270 of the glass body 262; Fig. 22 shows the bottom edge of the PIC is coplanar with a wall of the cutout, which corresponds to the upper surface 764 of the substrate 762); and a fiber attach unit (Fig. 5B, optical connectors 310, see paragraph 0127; Fig. 22, optical connector 761) comprising an optical fiber (see paragraph 0127; see paragraph 0163), the optical fiber attached to the waveguide (in both embodiments Figs. 5B and Fig. 22, the optical fiber is attached to the waveguide via the connector and the substrate), at least a portion of the fiber attach unit extending into the cutout (Figs. 5B and 22 show this). Regarding claim 11: Brusberg disclosesThe apparatus of claim 9 (as applied above), wherein the cutout extends partially through the substrate from a top surface of the substrate (Fig. 5B shows the cutout extends partially through the substrate from the top surface 270; Fig. 22 shows the cutout extends partially through the substrate from the top surface 764 to the intermediate surface 765). Regarding claim 12: Brusberg disclosesThe apparatus of claim 9 (as applied above), wherein the substrate further comprises a recess in a surface of the substrate (Fig. 5A, cavity 299; see paragraph 0163, Fig. 22 also has a cavity, which corresponds to the area with the redistribution layer 780), the PIC at least partially located in the recess (Figs. 5B and 22 show this), and the PIC conductive contact is attached to the processing unit conductive contact (they are attached via the substrate; additionally, see paragraph 0127 and 0163). Regarding claim 13: Brusberg disclosesThe apparatus of claim 9 (as applied above), further comprising an attachment block (Fig. 5B, elevated portions 263; corresponding features in Fig. 22), an edge of the attachment block coplanar with the edge of the PIC (Fig. 5B shows the top edge of the attachment block coplanar with the edge of the PIC; Fig. 22 also shows this), the fiber attach unit attached to the attachment block (Figs. 5B and 22 show the fiber attach unit attached to the attachment block). Claim Rejections - 35 USC § 103 The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. Claims 8 and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Brusberg et al. (US 2021/0271037; hereinafter Brusberg). Regarding claim 8: Brusberg disclosesThe apparatus of claim 1 (as applied above), wherein the cutout is a first cutout, the waveguide is a first waveguide, the PIC is a first PIC, the processing unit is a first processing unit, the processing unit conductive contact is a first processing unit conductive contact (as applied above), the substrate further comprising a second cutout (Fig. 5A, structure corresponding to peripheral recess 265 on the right), the apparatus further comprising: a second PIC comprising a second waveguide (Fig. 5B, PIC 300 on right side) and a second PIC conductive contact on a surface of the second PIC (Fig. 5B shows conductive contacts on the bottom surface of the PIC 300 on the right), wherein the second waveguide extends to an edge of the second PIC (Fig. 5B, waveguide 302 on right PIC 300), the edge of the second PIC substantially flush with a wall of the second cutout or extending into the second cutout (Fig. 5B shows the second PIC substantially flush with a wall of the second cutout extending to the top surface 270). Regarding the limitations: “a second processing unit attached to the substrate, the second processing unit comprising a second processing unit conductive contact on a surface of the second processing unit” and “the second processing unit conductive contact conductively coupled to the second PIC conductive contact”: Brusberg further teaches including a plurality of electronic ICs (see paragraph 0176). Since it is suggested by Brusberg, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include a second processing unit attached to the substrate in order to increase the processing capability of the apparatus. In making the modification, it would have been obvious to one of ordinary skill in the art the second processing unit with a similar structure as the first, including a second processing unit conductive contact on a surface of the second processing unit and conductively coupling said second processing unit conductive contact to the second PIC conductive contact, since the first processing unit has these features, and in order to shorten conductive paths between coupled EICs and PICs. Regarding claim 19: Brusburg discloses The apparatus of claim 9 (as applied above), wherein the cutout is a first cutout, the waveguide is a first waveguide, the PIC is a first PIC, the processing unit is a first processing unit, the processing unit conductive contact is a first processing unit conductive contact, the fiber attach unit is a first fiber attach unit, the optical fiber is a first optical fiber (as applied above), the apparatus further comprising a second cutout (Fig. 5A, structure corresponding to peripheral recess 265 on the right), the apparatus further comprising: a second PIC comprising a second waveguide (Fig. 5B, PIC 300 on right side) and a second PIC conductive contact on a surface of the second PIC (Fig. 5B shows conductive contacts on the bottom surface of the PIC 300 on the right), wherein the second waveguide extends to an edge of the second PIC (Fig. 5B, waveguide 302 on right PIC 300), the edge of the second PIC coplanar with a wall of the second cutout (Fig. 5B shows the second PIC substantially flush with a wall of the second cutout extending to the top surface 270); and a second fiber attach unit (Fig. 5B, optical connector 310 on the right) comprising a second optical fiber (see paragraph 0127), the second optical fiber attached to the second waveguide (in Fig. 5B, the optical fiber is attached to the waveguide via the connector on the right and the substrate), a portion of the second fiber attach unit extending into the cutout (Fig. 5B shows this). Regarding the limitations: “a second processing unit attached to the substrate, the second processing unit comprising a second processing unit conductive contact on a surface of the second processing unit” and “the second processing unit conductive contact conductively coupled to the second PIC conductive contact”: Brusberg further teaches including a plurality of electronic ICs (see paragraph 0176). Since it is suggested by Brusberg, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to include a second processing unit attached to the substrate in order to increase the processing capability of the apparatus. In making the modification, it would have been obvious to one of ordinary skill in the art the second processing unit with a similar structure as the first, including a second processing unit conductive contact on a surface of the second processing unit and conductively coupling said second processing unit conductive contact to the second PIC conductive contact, since the first processing unit has these features, and in order to shorten conductive paths between coupled EICs and PICs. Claims 6, 14, and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Brusberg et al. (US 2021/0271037; hereinafter Brusberg) in view of Byrd et al. (US 2019/0044002; hereinafter Byrd). Regarding claim 6: Brusberg discloses the apparatus of claim 1, as applied above. Brusberg fails to disclose that the apparatus further comprises an integrated heat spreader, wherein the integrated heat spreader defines a maximum height of the integrated circuit component. However, Byrd, also related to an apparatus including an integrated circuit component including a substrate (Byrd Fig. 1, substrate 130), a processing unit (Byrd Fig. 1, ASIC 115), and a photonic integrated circuits (Byrd Fig. 1, PIC 105), does teach such an apparatus further comprising an integrated heat spreader (Byrd Fig. 1, thermally conductive lid 140), wherein the integrated heat spreader defines a maximum height of the integrated circuit component (wherein the integrated circuit component is considered to comprise all of the required elements of claim 1 and the integrated heat spreader). In order to spread heat away from heat generating components including the EIC, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the Brusberg device by including an integrated heat spreader, wherein the integrated heat spreader defines a maximum height of the integrated circuit component, since it was previously taught by Byrd. Regarding claim 14: Brusberg discloses the apparatus of claim 9, as applied above. Brusberg fails to disclose that the apparatus further comprises an integrated heat spreader, wherein the integrated heat spreader defines a maximum height of the integrated circuit component. However, Byrd, also related to an apparatus including an integrated circuit component including a substrate (Byrd Fig. 1, substrate 130), a processing unit (Byrd Fig. 1, ASIC 115), and a photonic integrated circuits (Byrd Fig. 1, PIC 105), does teach such an apparatus further comprising an integrated heat spreader (Byrd Fig. 1, thermally conductive lid 140), wherein the integrated heat spreader defines a maximum height of the integrated circuit component (wherein the integrated circuit component is considered to comprise all of the required elements of claim 9 and the integrated heat spreader). In order to spread heat away from heat generating components including the EIC, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the Brusberg device by including an integrated heat spreader, wherein the integrated heat spreader defines a maximum height of the integrated circuit component, since it was previously taught by Byrd. Regarding claim 16: Modified Brusberg teaches the apparatus of claim 14, as applied above. Byrd additionally teaches that the apparatus further comprises a heat sink (Fig. 1, heat sink 135) attached to the integrated heat spreader, the heat sink having a substantially planar bottom surface attached to the integrated heat spreader, wherein the bottom surface of the heat sink extends over each component of the apparatus. In order to dissipate heat from the apparatus, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to further modify the Brusberg device by further including a heat sink attached to the integrated heat spreader, the heat sink having a substantially planar bottom surface attached to the integrated heat spreader, since it was previously taught by Byrd. In making the modification, it would have been obvious to include a portion of the bottom surface of the heat sink extending over a portion of the cutout, since Byrd teaches a heat sink extending over each component of the apparatus, which in the modified Brusberg device would overlap the cutout. Claim 17 is rejected under 35 U.S.C. 103 as being unpatentable over Brusberg et al. (US 2021/0271037; hereinafter Brusberg) in view of Venkatesan et al. (US 2023/0176303; hereinafter Venkatesan). Brusberg discloses the apparatus of claim 9, as applied above. Brusberg fails to teach that the apparatus further comprises a retention bar securing the optical fiber to the substrate. However, Venkatesan teaches a structure for an optical connector/FAU for connecting optical fibers to a PIC on a substrate (see Figs. 1a-1d, FAU 101), with the connector comprising one piece above the fibers and one piece below the fibers (see Fig. 1B, cap 101b and base portion 101a, and FAU landing site 150), which each serve as retention bars for securing optical fibers to the substrate (see paragraph 0040). These structures provide secure alignment of the optical fibers, enabling transmission of optical signals between the optical fibers and the photonic integrated circuit (see Abstract). In order to facilitate good alignment between the fibers and the PIC of the Brusberg device, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to use an optical connector having a two-part structure such as was taught by Venkatesan, wherein each part functions as a retention bar securing the optical fiber to the substrate. Claim 18 is rejected under 35 U.S.C. 103 as being unpatentable over Brusberg et al. (US 2021/0271037; hereinafter Brusberg) in view of Patel et al. (US 2022/0196933; hereinafter Patel). Brusberg disclosesThe apparatus of claim 9 (as applied above), wherein the cutout is a substrate cutout (see Figs. 5A-B and 22, the cutout is a substrate cutout). Brusberg fails to disclose that the apparatus further comprising a socket comprising a socket cutout that at least partially overlaps with the substrate cutout. However, Patel, also related to an apparatus including an integrated circuit component including a substrate (Patel Figs. 1-3, substrate 110), a processing unit (Patel Figs. 1-3, EIC 115), and photonic integrated circuits (Patel Figs. 1-3, PICs 120), does teach providing such a device within a socket (Patel Fig. 3, socket 310) comprising a socket cutout (the interior top surface of the socket is depressed with respect to the sidewalls; therefore it is considered to be a cutout) that surrounds the entire device. The socket allows standardized connections to a PCB (see Patel paragraph 0046), and due to their solder-free connections, sockets allow said connections to be removable. In order to removably connect to PCBs, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to provide the Brusberg apparatus with a socket comprising a socket cutout that surrounds the Brusberg apparatus and therefore at least partially overlaps with the substrate cutout, since it was previously taught by Patel. Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Brusberg et al. (US 2021/0271037; hereinafter Brusberg) in view of Ramachandran et al (US 2019/0285804; hereinafter Ramachandran). Brusberg discloses the apparatus of claim 9, as applied above. Brusberg further teaches that the apparatus can include lasers (see paragraph 0194 and Fig. 37). Brusberg fails to teach that the PIC comprises a laser. Ramachandran, also related to an apparatus including an integrated circuit component including a processing unit (Fig. 5, ancillary devices 120; see paragraph 0028) and photonic integrated circuits (Fig. 5, PIC die 112), teaches that a laser die can be included as part of a PIC die (see Ramachandran paragraph 0047), so that it is not reliant on an external light source. In order to reduce die-to-die interconnect length and to allow the PIC to not be reliant on an external light source, it would have been obvious to one of ordinary skill in the art, before the effective filing date of the claimed invention, to modify the Brusberg device by including lasers on the PIC, since it was previously taught by Ramachandran. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to Kirsten D Endresen whose telephone number is (703)756-1533. The examiner can normally be reached Monday to Thursday. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Thomas Hollweg can be reached at (571)270-1739. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /KIRSTEN D. ENDRESEN/Examiner, Art Unit 2874 /MICHELLE R CONNELLY/Primary Examiner, Art Unit 2874
Read full office action

Prosecution Timeline

May 31, 2023
Application Filed
Oct 03, 2023
Response after Non-Final Action
Sep 30, 2026
Non-Final Rejection mailed — §102, §103 (current)

Precedent Cases

Applications granted by this same examiner with similar technology

Patent 12769179
WAVELENGTH GENERATOR BASED ON RING RESONATOR PHOTONIC DEVICES
3y 1m to grant Granted Oct 20, 2026
Patent 12693481
MODULE INTERFACE FOR TELECOMMUNICATIONS CLOSURE
3y 9m to grant Granted Jul 28, 2026
Patent 12687692
OPTICAL FIBER RIBBON
2y 8m to grant Granted Jul 21, 2026
Patent 12681338
ELECTRO-OPTICAL DEVICE
3y 9m to grant Granted Jul 14, 2026
Patent 12677765
MOBILE IRRIGATION SYSTEM WITH PLASTIC OPTICAL FIBER NETWORK
2y 8m to grant Granted Jul 14, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.

Strategy Recommendation AI-generated — please review before filing

Get a prosecution strategy drawn from examiner precedents, rejection analysis, and claim mapping.
Typically takes 5-10 seconds — AI-generated, attorney review required before filing

Prosecution Projections

1-2
Expected OA Rounds
71%
Grant Probability
88%
With Interview (+17.5%)
2y 11m (~0m remaining)
Median Time to Grant
Low
PTA Risk
Based on 82 resolved cases by this examiner. Grant probability derived from career allowance rate.

Sign in with your work email

Enter your email to receive a magic link. No password needed.

Personal email addresses (Gmail, Yahoo, etc.) are not accepted.

Free tier: 3 strategy analyses per month