Prosecution Insights
Last updated: April 19, 2026
Application No. 18/326,972

Data Recorders of Autonomous Vehicles

Non-Final OA §102§112
Filed
May 31, 2023
Examiner
TSENG, CHENG YUAN
Art Unit
2615
Tech Center
2600 — Communications
Assignee
Lodestar Licensing Group LLC
OA Round
4 (Non-Final)
84%
Grant Probability
Favorable
4-5
OA Rounds
2y 6m
To Grant
99%
With Interview

Examiner Intelligence

Grants 84% — above average
84%
Career Allow Rate
703 granted / 835 resolved
+22.2% vs TC avg
Strong +16% interview lift
Without
With
+15.7%
Interview Lift
resolved cases with interview
Typical timeline
2y 6m
Avg Prosecution
30 currently pending
Career history
865
Total Applications
across all art units

Statute-Specific Performance

§101
5.4%
-34.6% vs TC avg
§103
28.1%
-11.9% vs TC avg
§102
39.1%
-0.9% vs TC avg
§112
15.4%
-24.6% vs TC avg
Black line = Tech Center average estimate • Based on career data from 835 resolved cases

Office Action

§102 §112
DETAILED ACTION Claim Rejections - 35 USC § 102 The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action: A person shall be entitled to a patent unless – (a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention. Claims 2-5 and 7-16 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Stoev (US 9,563,397). Referring to claim 2, Stoev discloses a device (fig. 1A, disk drive), comprising: a non-volatile memory (fig. 1A, disk 4); a cyclic buffer (fig. 2A, circular buffer) to buffer a data stream (fig. 5A, data from host 32); a logic circuit (fig. 1A, control circuitry 8) to: receive a signal (fig. 5A, received write command 30; 4:15-17) indicative of an event (fig. 5A, write data 34) associated with a system (fig. 5A, host 32) that generates the data stream; and control buffering (fig. 3C, host write to circular buffer 1) the data stream into the cyclic buffer based on a type of the event (fig. 3C, host write data); and storing data (fig. 4, write to NVSM range; fig. 5B, write on disk 42/48) from the cyclic buffer to the non-volatile memory based on the type of the event. Referring to claim 9, Stoev discloses a method, comprising: partitioning a non-volatile memory (fig. 1A, disk 4) of a device (fig. 1A, disk drive) into a first portion (fig. 1A, sectors 18) and a second portion (fig. 1A, sectors) having a plurality of slots (fig. 1A, tracks 6), each of the plurality of slots to store a first predetermined amount of data (2:38-61, data); buffering a data stream (fig. 5A, data from host 32) into a cyclic buffer (fig. 2A, circular buffer) of the device based in part on a type of event (fig. 5A, write data 34); receiving a first signal (fig. 5A, received write command 30; 4:15-17; fig. 4, write 1) indicative of a first event (fig. 5A, write data 32) associated with a system (fig. 5A, host 32) that generates the data stream; storing (fig. 3C, host write to circular buffer 1), responsive to the first signal, first data of the first predetermined amount from the cyclic buffer into a slot (fig. 4, write to NVSM range; fig. 5B, write on disk 42/48) among the plurality of slots; receiving a second signal (fig. 5A, received write command 30; fig. 4, write 3) indicative of a second event (fig. 5A, write data 32) associated with the system; and storing, responsive to the second signal, second data of a second amount (fig. 4, write 3 on circular buffer 3), larger than the first predetermined amount, from the cyclic buffer into the second portion (fig. 4, write to NVSM range 3). Referring to claim 16, Stoev discloses a non-transitory computer storage medium storing instructions which, when executed in a computing device (fig. 1, disk drive), cause the computing device to perform a method, comprising: receiving, in the computing device, a data stream (fig. 5A, receive write data 32); buffering a first portion (fig. 3C, host write data to circular buffer 1; fig. 4, write 1) of the data stream associated with a first type of events (fig. 5A, write data 32 with; fig. 5B, write data with head first 40 to No) into a first cyclic buffer (fig. 3C, circular buffer 1) of the computing device; buffering a second portion (fig. 3C, host write data to circular buffer 2; fig. 4, write 2) of the data stream associated with a second type of events (fig. 5A, write data 32 with; fig. 5B, write data with head first 40 to Yes) into a second cyclic buffer (fig. 3C, circular buffer 2) of the computing device; configuring a non-volatile memory (fig. 4, NVSM) of the computing device into a first region (fig. 4, range 1) and a second region (fig. 4, range 2) having a plurality of slots (fig. 4, write data size to NVSM range); storing first data from the first cyclic buffer to a slot (fig. 4, store circular buffer 1 to NVSM range 1) among the plurality of slots in response to a first signal (fig. 4, write 1 signal) indicative of an event (fig. 4, disk write event) of the first type; and storing second data (fig. 4, store circular buffer 2 to NVSM range 2) from the second cyclic buffer to the second region in response to a second signal (fig. 4, write 2 signal) indicative of an event (fig. 4, disk write event) of the second type. As to claims 3 and 13, Stoev discloses the device of claim 2, wherein the at least one cyclic buffer includes a first cyclic buffer (fig. 3A, circular buffer 1) and a second cyclic buffer (fig. 3A, circular buffer 2). As to claims 4 and 15, Stoev discloses the device of claim 3, wherein the first cyclic buffer is associated with a first type of events (fig. 4, write event to range 1); and the second cyclic buffer is associated with a second type of events (fig. 3C, write event to range 2). As to claims 5 and 14, Stoev discloses the device of claim 4, wherein the first cyclic buffer and the second cyclic buffer have different buffering capacities (fig. 3C, different write data size). As to claim 10, Stoev discloses the device of claim 9, stopping (fig. 3C, host data write stop at tail), responsive to the first signal, buffering the data steam in to the cyclic buffer. As to claim 7, Stoev discloses the device of claim 6, wherein the logic circuit is to store data from the cyclic buffer into the non-volatile memory in response to the signal (fig. 4, store data from circular buffer to NVSM). As to claim 8 and 11, Stoev discloses the device of claim 7, wherein the logic circuit is to resume buffering the data stream after storing an amount of data from the cyclic buffer into the non-volatile memory (fig. 4, write to NVSM resume at circular buffer 2 after circular buffer 1 completed). As to claim 12, Stoev discloses the method of claim 11, comprising: continuing, responsive to the second signal, buffering the data stream into the cyclic buffer (fig. 4, write to NVSM continue at circular buffer 2 after circular buffer 1 completed). Allowable Subject Matter Claims 6 and 17-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: The claimed limitation of “stopping buffering in response to the first event type, and continue buffering in response the second event type” as required in dependent claim 6, and The claim feature of “”the first type of events is to train an advanced driver assistance system, and the second type of events is to review accidents” as in dependent claim 17. Claim Interpretation This application includes one or more claim limitations that do not use the word “means,” but are nonetheless being interpreted under 35 U.S.C. 112(f), because the claim limitation uses a generic placeholder that is coupled with functional language without reciting sufficient structure to perform the recited function and the generic placeholder is not preceded by a structural modifier. Such claim limitations are: “cyclic buffer”, “logic circuit” in claim 1, “a plurality of slots” in claim 9, “first cyclic buffer”, “second cyclic buffer” in claim 13, and “first type of events”, “second type of events” in claim 17. Because these claim limitations are being interpreted under 35 U.S.C. 112(f), they are being interpreted to cover the corresponding structure described in the specification as performing the claimed function, and equivalents thereof. If applicant does not intend to have these limitations interpreted under 35 U.S.C. 112(f), applicant may: (1) amend the claim limitations to avoid them being interpreted under 35 U.S.C. 112(f) (e.g., by reciting sufficient structure to perform the claimed function); or (2) present a sufficient showing that the claim limitations recite sufficient structure to perform the claimed function so as to avoid them being interpreted under 35 U.S.C. 112(f). Contact Information Any inquiry concerning this communication or earlier communications from the examiner should be directed to examiner Cheng-Yuan Tseng whose telephone number is (571)272-9772, and fax number is (571)273-9772. The examiner can normally be reached on Monday through Friday from 09:00 to 17:30 Eastern Time. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Alicia Harrington can be reached on (571)272-2330. The fax phone number for the organization where this application or proceeding is assigned is (571)273-8300. Information regarding the status of an application may be obtained from the Patent Application Information Retrieval (PAIR) system. Status information for published applications may be obtained from either Private PAIR or Public PAIR. Status information for unpublished applications is available through Private PAIR only. Should you have questions on access to the Private PAIR system, contact the Electronic Business Center (EBC) at (866)217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative or access to the automated information system, call (800)786-9199 (IN USA OR CANADA) or (571)272-1000. /CHENG YUAN TSENG/Primary Examiner, Art Unit 2615
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Prosecution Timeline

May 31, 2023
Application Filed
Apr 10, 2025
Non-Final Rejection — §102, §112
Jul 07, 2025
Response Filed
Jul 21, 2025
Final Rejection — §102, §112
Sep 23, 2025
Response after Non-Final Action
Oct 21, 2025
Request for Continued Examination
Oct 28, 2025
Response after Non-Final Action
Nov 26, 2025
Final Rejection — §102, §112
Jan 30, 2026
Response after Non-Final Action
Feb 10, 2026
Request for Continued Examination
Feb 18, 2026
Response after Non-Final Action
Mar 09, 2026
Non-Final Rejection — §102, §112 (current)

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Prosecution Projections

4-5
Expected OA Rounds
84%
Grant Probability
99%
With Interview (+15.7%)
2y 6m
Median Time to Grant
High
PTA Risk
Based on 835 resolved cases by this examiner. Grant probability derived from career allow rate.

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