DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Status of Claims
The present application is being examined under the claims filed 06/07/2023.
Claims 1-20 are pending.
Information Disclosure Statement
The information disclosure statement (IDS) submitted on 06/07/2023 is in compliance with the provisions of 37 CFR 1.97. Accordingly, the information disclosure statement is being considered by the examiner.
Claim Rejections - 35 USC § 103
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
Claims 1, 4, 9, 13, 17, and 19 are rejected under 35 U.S.C. 103 as being unpatentable over Chen et al. (PGPUB no. US 20230196156 A1) in view of NPL reference Baker et al “Improved Quantum Circuits via Intermediate Qutrits” herein referred to as JM Baker.
Regarding Claim 1
Chen teaches:
A device, comprising: memory that is configured to store program instructions; and processing circuitry, coupled to the memory, and configured to execute the program instructions to perform a process to measure a quantum state of a quantum bit, wherein in performing the process, the processing circuitry is configured to:
(paragraph [0005]) “According to an embodiment, a system is provided. The system can comprise a system, comprising a memory that can store computer executable components. The system can also comprise a processor, operably coupled to the memory, and that can execute the computer executable components stored in the memory. The computer executable components can comprise a circuit compilation component that can compile one or more quantum circuits for a hybrid quantum-classical algorithm. The one or more quantum circuits can include a mid-circuit operation to parallelize entangled measurement”
cause a sequence of operations to be performed on the quantum bit, the sequence of operations comprising at least a first binary-outcome measurement operation, a quantum state inverting gate operation, and a second binary-outcome measurement operation;
[*Examiner notes: The inversion operation in Chen is a CNOT gate which inverts the quantum state of the qubit and entangles with another qubit.]; (paragraph [0020]) “FIG. 6 illustrates a diagram of an example, non-limiting quantum circuit that can be generated to employ mid-circuit quantum operations (e.g., mid-circuit measurements, measurement resets, and/or teleportation) to parallelize entangled measurements in accordance with one or more embodiments described herein.”; Fig. 6
PNG
media_image1.png
409
618
media_image1.png
Greyscale
Chen does not explicitly teach:
and determine a ternary measurement outcome, as the quantum state, based at least in part on discriminated binary-outcome measurements that result from the first binary-outcome measurement operation and the second binary-outcome measurement operation.
However, JM Baker teaches:
and determine a ternary measurement outcome, as the quantum state, based at least in part on discriminated binary-outcome measurements that result from the first binary-outcome measurement operation and the second binary-outcome measurement operation.
(page 7 paragraph 2) “In Figure 4, a Toffoli decomposition using qutrits is given. A similar construction for the Toffoli gate is known from past work [31, 32]. The goal is to perform an X operation on the last (target) input qubit q2 if and only if the two control qubits, q0 and q1, are both|1 . First a |1-controlled X+1 is performed on q0 and q1. This elevates q1 to |2[*Examiner notes: ternary outcome] iff q0 and q1 were both |1[*Examiner notes: binary outcomes].Then a|2-controlled X gate is applied to q2. Therefore, X is performed only when both q0 and q1 were |1, as desired. The controls are restored to their original states by a |1-controlled X−1 gate, which undoes the effect of the first gate. The key intuition in this decomposition is that the qutrit |2 state can be used instead of ancilla to store temporary information”
PNG
media_image2.png
135
571
media_image2.png
Greyscale
Chen, JM Baker, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen with the ternary outcomes of JM Baker because (JM Baker page 21 paragraph 2) “Moreover, as discussed in the Appendix of [12], the dressed qutrit is resilient to leakage errors, so the simulation results should be viewed as a lower bound on its advantage over the qubit and bare qutrit” and (JM Baker page 1 abstract) “We present a novel technique, intermediate qutrits, to achieve sublinear depth decompositions of the Generalized Toffoli and other arithmetic circuits using no additional ancilla—a significant improvement over linear depth for the best qubit-only equivalents.”
Regarding Claim 4
Chen in view of JM Baker:
The device of claim 1
(see rejection of claim 1)
Chen further teaches:
wherein the processing circuitry is configured to: cause the sequence of operations to be repeated for a specified number of times;
(paragraph [0041]) “The quantum hardware (e.g., the one or more quantum computers 108 via the quantum executions component 126) can prepare a quantum state (e.g., defined by the current iteration's set of ansatz parameter values) and/or perform measurements of various interaction terms in the Hamiltonian matrix. The state preparation can be repeated over multiple iterations until each individual operator has been measured enough times to derive sufficient statistical data.”; [*Examiner notes: Mere duplication of parts has no patentable significance unless a new and unexpected result is produced. See MPEP 2144.04 VI B.]
JM Baker further teaches:
for each sequence of operations that is performed, determine an associated single-shot ternary measurement outcome based on discriminated binary-outcome measurements that result from the sequence of operations;
[*Examiner notes: Mere duplication of parts has no patentable significance unless a new and unexpected result is produced. See MPEP 2144.04 VI B.]; (page 7 paragraph 2) “In Figure 4, a Toffoli decomposition using qutrits is given. A similar construction for the Toffoli gate is known from past work [31, 32]. The goal is to perform an X operation on the last (target) input qubit q2 if and only if the two control qubits, q0 and q1, are both|1 . First a |1-controlled X+1 is performed on q0 and q1. This elevates q1 to |2[*Examiner notes: ternary outcome] iff q0 and q1 were both |1[*Examiner notes: binary outcomes].Then a|2-controlled X gate is applied to q2. Therefore, X is performed only when both q0 and q1 were |1, as desired. The controls are restored to their original states by a |1-controlled X−1 gate, which undoes the effect of the first gate. The key intuition in this decomposition is that the qutrit |2 state can be used instead of ancilla to store temporary information”
PNG
media_image2.png
135
571
media_image2.png
Greyscale
and determine the ternary measurement outcome based on a plurality of single-shot ternary measurement outcomes obtained as a result of the repeated sequence of operations.
[*Examiner notes: Mere duplication of parts has no patentable significance unless a new and unexpected result is produced. See MPEP 2144.04 VI B.]; (page 7 paragraph 2) “In Figure 4, a Toffoli decomposition using qutrits is given. A similar construction for the Toffoli gate is known from past work [31, 32]. The goal is to perform an X operation on the last (target) input qubit q2 if and only if the two control qubits, q0 and q1, are both|1 . First a |1-controlled X+1 is performed on q0 and q1. This elevates q1 to |2[*Examiner notes: ternary outcome] iff q0 and q1 were both |1[*Examiner notes: binary outcomes].Then a|2-controlled X gate is applied to q2. Therefore, X is performed only when both q0 and q1 were |1, as desired. The controls are restored to their original states by a |1-controlled X−1 gate, which undoes the effect of the first gate. The key intuition in this decomposition is that the qutrit |2 state can be used instead of ancilla to store temporary information”
PNG
media_image2.png
135
571
media_image2.png
Greyscale
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to combine Chen with JM Baker for the same reasons given in claim 1 above.
Regarding Claim 9
Claim 9 is a computer system claim corresponding to device claim 1. The only difference is that claim 9 recites a quantum processing unit
Chen teaches:
A system, comprising: a quantum processing unit comprising a quantum processor comprising an array of quantum bits, and a control system configured to control operation of the quantum processor; and a computing system configured to utilize the quantum processing unit to perform quantum computing algorithms, wherein the computing system comprises memory that is configured to store program instructions, and processing circuitry, coupled to the memory, and configured to execute the program instructions to perform a process to measure a quantum state of a quantum bit of the quantum processor, wherein in performing the process, the processing circuitry is configured to: generate control signals that are applied to the control system of the quantum processing unit to cause the control system to
(paragraph [0044]) “In one or more embodiments, the quantum data plane can include one or more quantum circuits comprising physical qubits, structures to secure the positioning of the qubits, and/or support circuitry. The support circuitry can, for example, facilitate measurement of the qubits' state and/or perform gate operations on the qubits (e.g., for a gate-based system). In some embodiments, the support circuitry can comprise a wiring network that can enable multiple qubits to interact with each other”; (paragraph [0047]) “In one or more embodiments, the communications component 112 can receive one or more quantum circuits 124 from the algorithm component 111 and share (e.g., via a direct electrical connection and/or through the one or more networks 104) the one or more quantum circuits 124 with the one or more quantum computers 108 to execute the hybrid quantum-classical algorithm.”
The remaining limitations of the claim are taught by the rejection of claim 1.
Regarding Claim 13
Claim 13 is a computer system claim corresponding to device claim 4. The only difference is that claim 13 recites a computer system as taught in the rejection of claim 9 above. The remaining limitations of the claim are taught by the rejection of claim 4.
Regarding Claim 17
Claim 17 is a computer program product claim corresponding to device claim 1. The only difference is that claim 17 recites computer readable media:
Chen teaches:
computer program product for performing a process to measure a quantum state of a quantum bit, the computer program product comprising: one or more computer readable storage media, and program instructions collectively stored on the one or more computer readable storage media, the program instructions comprising: program instructions to
(paragraph [0013]) “According to an embodiment, a computer program product for compiling quantum circuits is provided. The computer program product can comprise a computer readable storage medium having program instructions embodied therewith. The program instructions can be executable by a processor to cause the processor to compile one or more quantum circuits for a hybrid quantum-classical algorithm. The one or more quantum circuits can include a mid-circuit operation to parallelize entangled measurements.”
The remaining limitations of the claim are taught by the rejection of claim 1.
Regarding Claim 19
Claim 19 is a computer program product claim corresponding to device claim 4. The only difference is that claim 4 recites a computer program product as taught in the rejection of claim 17 above. The remaining limitations of the claim are taught by the rejection of claim 4.
Claims 2, 8, 11, and 18 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, and further in view of NPL reference Gaebler et al. “Suppression of midcircuit measurement crosstalk errors with micromotion” herein referred to as Gaebler.
Regarding Claim 2
Chen in view of JM Baker teaches:
The device of claim 1
(see rejection of claim 1)
JM Baker further teaches:
wherein: the quantum state-inverting gate operation comprises a quantum X gate operation that is configured to flip a state the quantum bit in a computational state spanned by a ground state |0> and a first excited state |1>;
(page 3 section 2 paragraph 2) “Quantum states can be acted on by quantum gates which (a) preserve valid probability distributions that sum to 1 and (b) guarantee reversibility. For example, the X gate transforms a state |ψ =α |0 +β|1 to X |ψ = β |0 +α |1 .The X gate is also an example of a classical reversible operation, equivalent to the NOT operation.”
It would have been further obvious to a person having ordinary skill in the art before the effective filing date of the present invention to incorporate the X gate of JM Baker with the quantum circuits of Chen in view of JM Baker because (JM Baker page 3 section 2 paragraph 2) “Quantum states can be acted on by quantum gates which (a) preserve valid probability distributions that sum to 1 and (b) guarantee reversibility.”
Chen in view of JM Baker does not explicitly teach:
and the first binary-outcome measurement operation and the second binary-outcome measurement operation are each performed using a mid-circuit measurement operation.
[*Examiner notes: While Chen does teach performing two measurement operations on a qubit, Chen only teaches performing a single mid-circuit measurement and another measurement at the end of the sequence.]
However, Gaebler teaches:
and the first binary-outcome measurement operation and the second binary-outcome measurement operation are each performed using a mid-circuit measurement operation.
(page 5 column 2 paragraph 2) “Our technique uses standard single-qubit RB gates on the probe qubits interleaved with midcircuit measurement and/or reset on focus qubits as illustrated in Fig. 2(b).”; Fig. 2(b)
PNG
media_image3.png
232
567
media_image3.png
Greyscale
Chen, JM Baker, Gaebler, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuit of Chen in view of JM Baker with the multiple binary measurements taught by Gaebler because (Gaebler page 7 column 2 section IV) “The protocol’s effectiveness is verified using a method based on RB, and results showed that midcircuit measurement and reset can be performed with high fidelity on a subset of targeted qubits. The error rates reported in this work are approaching reported estimates for thresholds required in quantum error correction protocols [27].”
Regarding Claim 8
Chen in view of JM Baker teaches:
The device of claim 1
(see rejection of claim 1)
Chen further teaches:
followed by a quantum state-inverting gate operation, and a final binary-outcome measurement following the multiple instances of the binary outcome measurement and the quantum state-inverting gate operation.
(paragraph [0020]) “FIG. 6 illustrates a diagram of an example, non-limiting quantum circuit that can be generated to employ mid-circuit quantum operations (e.g., mid-circuit measurements, measurement resets, and/or teleportation) to parallelize entangled measurements in accordance with one or more embodiments described herein.”; Fig. 6
PNG
media_image4.png
404
596
media_image4.png
Greyscale
Chen in view of JM Baker does not explicitly teach:
wherein the sequence of operations comprises a sequence of multiple instances of a binary-outcome measurement
However, Gaebler teaches:
wherein the sequence of operations comprises a sequence of multiple instances of a binary-outcome measurement
(page 5 column 2 paragraph 2) “Our technique uses standard single-qubit RB gates on the probe qubits interleaved with midcircuit measurement and/or reset on focus qubits as illustrated in Fig. 2(b).”; Fig. 2(b)
PNG
media_image3.png
232
567
media_image3.png
Greyscale
Chen, JM Baker, Gaebler, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuit of Chen in view of JM Baker with the multiple binary measurements taught by Gaebler because (Gaebler page 7 column 2 section IV) “The protocol’s effectiveness is verified using a method based on RB, and results showed that midcircuit measurement and reset can be performed with high fidelity on a subset of targeted qubits. The error rates reported in this work are approaching reported estimates for thresholds required in quantum error correction protocols [27].”
Regarding Claim 11
Claim 11 is a computer system claim corresponding to device claim 2. The only difference is that claim 11 recites a computer system as taught in the rejection of claim 9 above. The remaining limitations of the claim are taught by the rejection of claim 2.
Regarding Claim 18
Claim 18 is a computer program product claim corresponding to device claim 2. The only difference is that claim 18 recites a computer program product as taught in the rejection of claim 17 above. The remaining limitations of the claim are taught by the rejection of claim 2.
Claims 3 and 10 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, and further in view of NPL reference Arjmand et al. “A Novel Ternary-to-Binary Converter in Quantum-dot Cellular Automata” herein referred to as Arjmand.
Regarding Claim 3
Chen in view of JM Baker teaches:
The device of claim 1
(see rejection of claim 1)
Chen in view of JM Baker does not explicitly teach:
wherein in performing the process, the processing circuitry is configured to: receive a ternary measurement instruction; and translate the ternary measurement instruction into the sequence of operations to be performed on the quantum bit.
However, Arjmand teaches:
wherein in performing the process, the processing circuitry is configured to: receive a ternary measurement instruction; and translate the ternary measurement instruction into the sequence of operations to be performed on the quantum bit.
(page 149 column 2 last paragraph) “According to this, there is a substantial need for creating an interaction between tQCA and bQCA circuits. Also, when it is necessary to evaluate operation of a ternary circuit in binary form, there will be a need for such a converter or interface. Here we propose a novel ternary-to-binary converter which can also play the role of an interface.”
Chen, JM Baker, Arjmand and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker with the ternary to binary translation taught by Arjmand because (Arjmand page 150 column 1)
PNG
media_image5.png
259
490
media_image5.png
Greyscale
Regarding Claim 10
Claim 10 is a computer system claim corresponding to device claim 3. The only difference is that claim 10 recites a computer system as taught in the rejection of claim 9 above. The remaining limitations of the claim are taught by the rejection of claim 3.
Claims 5 and 14 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, and further in view of Dridi et al. (patent no. US11436519B1).
Regarding Claim 5
Chen in view of JM Baker teaches:
The device of claim 4,
(see rejection of claim 4)
Chen in view of JM Baker does not explicitly teach:
wherein for each sequence of operations that is performed, the processing circuitry is configured to determine the associated single-shot ternary measurement outcome by performing a statistical analysis of the discriminated binary-outcome measurements to estimate the single-shot ternary measurement outcome
However, Dridi teaches:
wherein for each sequence of operations that is performed, the processing circuitry is configured to determine the associated single-shot ternary measurement outcome by performing a statistical analysis of the discriminated binary-outcome measurements to estimate the single-shot ternary measurement outcome
(column 2 line 31) “obtaining, with the computer system, a second set of raw outputs from a second plurality of shots run by the quantum processor or another quantum processor processing a second part of the problem; statistically aggregating, with the computer system, the first set of raw outputs and the second set of raw outputs to determine an expectation value solving or approximating a solution to the problem; and storing, with the computer system, the expectation value in memory”
Chen, JM Baker, Dridi, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker with the statistical processing taught by Dridi because (Dridi Column 18 Line 3) “QPU's are generally probabilistic, so to determine outputs, some embodiments may apply statistical aggregation to raw outputs in a set of repetitions to determine expectation values. Aggregation may take a variety of forms. Some embodiments may run multiple (e.g., several hundred, thousand, or more) shots of a given configuration on a set of QPUs to determine a probability distribution of a result or other output.”
Regarding Claim 14
Claim 14 is a computer system claim corresponding to device claim 5. The only difference is that claim 14 recites a computer system as taught in the rejection of claim 9 above. The remaining limitations of the claim are taught by the rejection of claim 5.
Claims 6 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, and further in view of Curtis et al. (PGPUB no. US20180232652A1).
Regarding Claim 6
Chen in view of JM Baker teaches:
The device of claim 4
(see rejection of claim 4)
Chen in view of JM Baker does not explicitly teach:
wherein for each sequence of operations that is performed, the processing circuitry is configured to determine the associated single-shot ternary measurement outcome by utilizing a hardware-based sequential logic circuit to process the discriminated binary outcome measurements.
However, Curtis teaches:
wherein for each sequence of operations that is performed, the processing circuitry is configured to determine the associated single-shot ternary measurement outcome by utilizing a hardware-based sequential logic circuit to process the discriminated binary outcome measurements.
(paragraph [0053]) “In some cases, the quantum logic control sequence is a quantum logic circuit that includes a sequence of quantum logic gates for a gate-based quantum information processor. The quantum logic gates can include single-qubit gates or multi- qubit gates that can be executed in the quantum information processor.”
Chen, JM Baker, Curtis, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker with the sequential logic circuitry to process the binary values taught by Curtis because (Curtis paragraph [0055]) “In the example process 300, executing the quantum logic control sequence at 324 causes the quantum information processor to perform the quantum computation identified at 320. For instance, data obtained from the quantum information processor during or after execution of the quantum logic control sequence may correspond to an output of the quantum computation.” That is, sequential logic circuitry is used to implement and carry out a specified set of computations.
Regarding Claim 15
Claim 15 is a computer system claim corresponding to device claim 6. The only difference is that claim 15 recites a computer system as taught in the rejection of claim 9 above. The remaining limitations of the claim are taught by the rejection of claim 6.
Claims 7 and 16 are rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, and further in view of NPL reference Bergou “Quantum state discrimination and selected applications” herein referred to as Bergou and Trejo et al. (patent no. US11477021B1) herein referred to as Trejo.
Regarding Claim 7
Chen in view of JM Baker teaches:
The device of claim 1,
(see rejection of claim 1)
JM Baker further teaches:
wherein: the processing circuitry is configured to determine the ternary measurement outcome of the quantum state of the quantum bit as one of a ground state |0>, a first excited state |1>, and a second excited state |2>;
(page 4 paragraph 3) “In a three-level system, we consider the computational basis states |0>, |1>, and |2> for qutrits.”
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to combine Chen with JM Baker for the same reasons given in claim 1 above.
Chen in view of JM Baker does not explicitly teach:
and the discriminated binary-outcome measurements each comprise a positive operator-valued measure (POVM) of {I0><0I, 1 -|0><0|},
wherein a ternary measurement outcome of the quantum state of the quantum bit as being the ground state I0) is discriminated as a I0) state, while a single-shot ternary measurement outcome of the quantum state of the quantum bit as being the first excited state |1> or the second excited state |2> is discriminated as a |1> state.
However, Bergou teaches:
and the discriminated binary-outcome measurements each comprise a positive operator-valued measure (POVM) of {I0><0I, 1 -|0><0|},
(page 8)
PNG
media_image6.png
414
645
media_image6.png
Greyscale
Chen, JM Baker, Bergou, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker with the POVM taught by Bergou because (Bergou page 1 abstract) “Determining the state of a quantum system is a central task in quantum information processing since it encompasses the read-out problem. Very often the optimized state discrimination strategy is a generalized measurement (Positive Operator Valued Measure, POVM). Therefore, we begin with a brief introduction to the theory of generalized measurements and illustrate the power of the concept on examples relevant to applications in quantum cryptography”
And Trejo teaches:
wherein a ternary measurement outcome of the quantum state of the quantum bit as being the ground state I0) is discriminated as a I0) state, while a single-shot ternary measurement outcome of the quantum state of the quantum bit as being the first excited state |1> or the second excited state |2> is discriminated as a |1> state.
(column 6 line 29) “By way of non-limiting example, the binary mapping unity 260 generates a binary random string using an alphabetic morphism algorithm. An example, alphabetic morphism algorithm is provided in equation EQ(1) which allows 100 : A3→A2, where: [EQ 1] In this example, the “a” corresponds to the measurement outcomes of the measurement stage 136, represented as a respective ternary digit.”
Chen, JM Baker, Bergou, Trejo, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker and Bergou by projecting the |2> state as taught by Trejo because (Trejo) “Then, by means of an alphabetic morphism, the ternary sequence of digits generated by such embodiment can be mapped into a binary sequence with equal probability of finding a zero or one when selecting a bit at random, ensuring that the generated sequence of bits is maximally unpredictable, has Borel normal prefixes and is bi-immune, that is the sequence of quantum random bits, and of any sub-sequence thereof, is strongly incomputable in the sense that no algorithm can reproduce exactly any bit of the sequence.” Moreover, it would be obvious to try to project the |2> state onto the |1> state instead of the |0> state taught by Trejo from the finite list of choices of |0> and |1>. A person having ordinary skill in the art would reasonably expect that trying all of the options would produce results that could confer advantages for a particular application.
Regarding Claim 16
Claim 16 is a computer system claim corresponding to device claim 7. The only difference is that claim 16 recites a computer system as taught in the rejection of claim 9 above. The remaining limitations of the claim are taught by the rejection of claim 7.
Claim 12 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, and further in view of NPL reference Gusenkova et al. “Quantum non-demolition dispersive readout of a superconducting artificial atom using large photon numbers” herein referred to as Gusenkova.
Regarding Claim 12
Chen in view of JM Baker teaches:
The system of claim 11
(see rejection of claim 11)
Chen in view of JM Baker does not explicitly teach:
wherein the control system of the quantum processing unit comprises: a dispersive readout control system that is configured to perform a quantum non-demolition measurement to generate a readout signal which represents a quantum state of the quantum bit, in response to each of the first binary-outcome measurement operation and the second binary outcome measurement operation, which are performed using the mid-circuit measurement operation
and a hardware discriminator configured to generate the discriminated binary-outcome measurements.
However, Gusenkova teaches:
wherein the control system of the quantum processing unit comprises: a dispersive readout control system that is configured to perform a quantum non-demolition measurement to generate a readout signal which represents a quantum state of the quantum bit, in response to each of the first binary-outcome measurement operation and the second binary outcome measurement operation, which are performed using the mid-circuit measurement operation
and a hardware discriminator configured to generate the discriminated binary-outcome measurements.
(page 1 column 1) “In the circuit quantum electrodynamics (cQED) architecture [2, 20, 21], QND readout can be achieved via dispersive coupling between a readout resonator and a superconducting artificial atom.”; (page 2 column 1 paragraph 1) “From a practical perspective, combining a strongly nonlinear spectrum and a high power QND readout provides a route for hardware efficient measurement in large quantum processors or superconducting detector arrays.”
Chen, JM Baker, Gusenkova, and the instant application are analogous because they are all directed to quantum circuits.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker by measuring qubits using the quantum non-demolition (QND) dispersive readout taught by Gusenkova because (Gusenkova page 2 column 1 paragraph 1) “From a practical perspective, combining a strongly nonlinear spectrum and a high power QND readout provides a route for hardware efficient measurement in large quantum processors or superconducting detector arrays.”
Claim 20 is rejected under 35 U.S.C. 103 as being unpatentable over Chen in view of JM Baker, Dridi, and Curtis.
Regarding Claim 20
Chen in view of JM Baker:
The computer program product of claim 19
(see rejection of claim 19)
Chen in view of JM Baker does not explicitly teach:
further comprising program instructions to determine, for each sequence of operations that is performed, the associated single-shot ternary measurement outcome by one of: performing a statistical analysis of the discriminated binary-outcome measurements to estimate the single-shot ternary measurement outcome; and utilizing a hardware-based sequential logic circuit to process the discriminated binary-outcome measurements.
However, Dridi teaches:
further comprising program instructions to determine, for each sequence of operations that is performed, the associated single-shot ternary measurement outcome by one of: performing a statistical analysis of the discriminated binary-outcome measurements to estimate the single-shot ternary measurement outcome;
(column 2 line 31) “obtaining, with the computer system, a second set of raw outputs from a second plurality of shots run by the quantum processor or another quantum processor processing a second part of the problem; statistically aggregating, with the computer system, the first set of raw outputs and the second set of raw outputs to determine an expectation value solving or approximating a solution to the problem; and storing, with the computer system, the expectation value in memory”
Chen, JM Baker, Dridi, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker with the statistical processing taught by Dridi because (Dridi Column 18 Line 3) “QPU's are generally probabilistic, so to determine outputs, some embodiments may apply statistical aggregation to raw outputs in a set of repetitions to determine expectation values. Aggregation may take a variety of forms. Some embodiments may run multiple (e.g., several hundred, thousand, or more) shots of a given configuration on a set of QPUs to determine a probability distribution of a result or other output.”
And Curtis teaches:
and utilizing a hardware-based sequential logic circuit to process the discriminated binary-outcome measurements.
(paragraph [0053]) “In some cases, the quantum logic control sequence is a quantum logic circuit that includes a sequence of quantum logic gates for a gate-based quantum information processor. The quantum logic gates can include single-qubit gates or multi- qubit gates that can be executed in the quantum information processor.”
Chen, JM Baker, Dridi, Curtis, and the instant application are analogous because they are all directed to quantum circuit software.
It would have been obvious to a person having ordinary skill in the art before the effective filing date of the present invention to modify the quantum circuits of Chen in view of JM Baker with the sequential logic circuitry to process the binary values taught by Curtis because (Curtis paragraph [0055]) “In the example process 300, executing the quantum logic control sequence at 324 causes the quantum information processor to perform the quantum computation identified at 320. For instance, data obtained from the quantum information processor during or after execution of the quantum logic control sequence may correspond to an output of the quantum computation.” That is, sequential logic circuitry is used to implement and carry out a specified set of computations.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Ezra J Baker whose telephone number is (703)756-1087. The examiner can normally be reached Monday - Friday 10:00 am - 8:00 pm ET.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, David Yi can be reached at (571) 270-7519. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. To file and manage patent submissions in Patent Center, visit: https://patentcenter.uspto.gov. Visit https://www.uspto.gov/patents/apply/patent-center for more information about Patent Center and https://www.uspto.gov/patents/docx for information about filing in DOCX format. For additional questions, contact the Electronic Business Center (EBC) at 866-217-9197 (toll-free). If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000.
/E.J.B./Examiner, Art Unit 2126
/DAVID YI/Supervisory Patent Examiner, Art Unit 2126