Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
This action is in response to the amendment filed on 01/12/2026.
Claim Objections
Claim 7 is objected to because of the following informalities: Regarding claim 7, in line 5-6, “the first comparator input” appears that it should read as “a first input of the first comparator”. Appropriate correction is required.
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale or otherwise available to the public before the effective filing date of the claimed invention.
Claims 1 and 8 are rejected under 35 U.S.C. 102 (a)(1) as being anticipated by Hu et al. (US Patent Application Publication US 2010/0265742 A1, hereinafter “Hu”). Regarding claim 1, Hu discloses (see Fig. 3 and Fig. 5) a controller (comprising 103, 104, 105, 106, 107, 108) comprising: a pulse width modulation circuit (107) having a first input (Inverse R), a second input (S), and an output (Q), the first input coupled to a power converter feedback input (coupled to FB via 105); and a timing adjustment circuit (201) having an input coupled to a power converter switching terminal (gate of M) and an output (output of 201 coupled to AND2) coupled to the second input of the pulse width modulation circuit (coupled to S of 107 via AND2), the timing adjustment circuit configurable to set an off-time of a control signal provided by the pulse width modulation circuit responsive to a voltage at the power converter switching terminal (see Fig. 5, where FL sets the off-time of the control signal of M, see [0028] “FIG. 5 illustrates the signal generator of the switching regulators shown in FIG. 2 and FIG. 3, wherein the minimum off time is a constant tlimit1. …The gate of the switch M4 is electrically coupled to the output terminal Q of the flip-flop FF through a one-shot circuit. The output signal of the comparator COM3 is the frequency limitation signal FL.”). Regarding claim 8, Hu discloses (see Fig. 3 and Fig. 5) an integrated circuit comprising the controller of claim 1 (see [0028] “the signal generator is realized by an integrated circuit,”).
Claim Rejections - 35 USC § 103
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action:
A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made.
The factual inquiries set forth in Graham v. John Deere Co., 383 U.S. 1, 148 USPQ 459 (1966), that are applied for establishing a background for determining obviousness under 35 U.S.C. 103 are summarized as follows:
1. Determining the scope and contents of the prior art.
2. Ascertaining the differences between the prior art and the claims at issue.
3. Resolving the level of ordinary skill in the pertinent art.
4. Considering objective evidence present in the application indicating obviousness or nonobviousness.
Claims 9 and 15 are rejected under 35 U.S.C. 103 as being unpatentable over Wibben (US Patent Application Publication US 2019/0181859 A1) in view of Hu. Regarding claim 9, Wibben discloses (see Fig. 6) a voltage regulator (600), comprising: a first voltage rail (Vin); a second voltage rail (BOOT); a ground rail (ground); a first transistor (20) coupled between the first voltage rail and a switching terminal (SW); a first driver (38) coupled to a control terminal of the first transistor (gate of 20) and configured to receive a voltage on the second voltage rail (38 receives voltage of BOOT at upper terminal of 38); a second transistor (21) coupled between the switching terminal and the ground rail; a second driver (30) coupled to a control terminal of the second transistor (gate of 21). Wibben does not disclose a timing adjustment circuit coupled to the switching terminal and the first driver and configurable to set an off-time of the first transistor responsive to a voltage at the switching terminal. However, Hu teaches (see Fig. 3 and Fig. 5) a timing adjustment circuit (comprising 201) coupled to the switching terminal (coupled to gate of M) and the first driver (107) and configurable to set an off-time of the first transistor responsive to a voltage at the switching terminal (see Fig. 5, where FL sets the off-time of the control signal of M, see [0028] “FIG. 5 illustrates the signal generator of the switching regulators shown in FIG. 2 and FIG. 3, wherein the minimum off time is a constant tlimit1. …The gate of the switch M4 is electrically coupled to the output terminal Q of the flip-flop FF through a one-shot circuit. The output signal of the comparator COM3 is the frequency limitation signal FL.”). Therefore, it would have been obvious to one having ordinary skill in the art before the effective filing date of the claimed invention to modify the voltage regulator of Wibben to include a timing adjustment circuit coupled to the switching terminal and the first driver and configurable to set an off-time of the first transistor responsive to a voltage at the switching terminal, as taught by Hu, because it can help adjust the minimum off-time according to the load, which can help increase the regulator efficiency. Regarding claim 15, Wibben discloses (see Fig. 6) wherein the first voltage rail is an input voltage rail (rail of Vin), the second voltage rail is a bootstrapped voltage rail (rail of BOOT), the first transistor is a high-side transistor, and the second transistor is a low-side transistor (20 is a high-side transistor and 21 is a low-side transistor of regulator 600).
Allowable Subject Matter
Claims 2-7, and 10-14 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims. The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 2, none of the cited prior art alone or in combination disclose or teach the claimed inventions in which “wherein the timing adjustment circuit further comprises a sampling block configurable to generate an intermediate voltage proportional to an average of a voltage at the power converter switching terminal.”. Claims 3-7 are objected due to their dependency on claim 2. Regarding Claim 10, none of the cited prior art alone or in combination disclose or teach the claimed inventions in which “wherein the timing adjustment circuit further comprises a sampling block configurable to generate an intermediate voltage proportional to an average of the voltage at the switching terminal.”. Claims 11-14 are objected due to their dependency on claim 10.
Claims 16-20 would be allowable if rewritten to overcome the claim objection made above. The following is a statement of reasons for the indication of allowable subject matter: Regarding Claim 16, none of the cited prior art alone or in combination disclose or teach the claimed inventions in which “a filter circuit configured to receive a switching terminal voltage of a power converter and generate a voltage; an operational amplifier (op-amp) having an op-amp output and first and second op-amp inputs, the first op-amp input configured to receive the voltage;…”.
Claims 17-20 are objected due to their dependency on claim 16.
Response to Arguments
Applicant’s arguments regarding claim 1, filed on 01/12/2026, in that “Claim 1 has been amended to incorporate some of the subject matter of claim 2, which the Office indicates as allowable”, is not persuasive, as the amendments to claim 1 do not completely reflect the previously indicated allowable subject matter since the previously indicated allowable subject matter of claim 2, i.e. “comprising a sampling block configured to generate an intermediate voltage proportional to an average of a voltage at a switching node terminal of the power converter circuit” is not incorporated into claim 1. Furthermore, the amendments to claim 1 have completely broaden/changed the scope of the claim, in that the indication of allowable subject matter in the previous office action, i.e. “rewritten in independent form including all of the limitations of the base claim and intervening claims”, no longer applies to amended claim 1. Therefore Applicant’s arguments are not persuasive.
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a). A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to JYE-JUNE LEE whose telephone number is (571)270-7726. The examiner can normally be reached on M-F 9 AM - 5 PM.
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/MONICA LEWIS/ Supervisory Patent Examiner, Art Unit 2838
/JYE-JUNE LEE/Examiner, Art Unit 2838
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