METHOD OF CORRECTING DESIGN LAYOUT OF SEMICONDUCTOR DEVICE, COMPUTING DEVICE PERFORMING THE SAME, AND METHOD OF FABRICATING SEMICONDUCTOR DEVICE USING THE SAME
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+18.4% interview lift. Interview already conducted in this application's prosecution history. This examiner has a 87% grant rate with +18.4% interview lift. Since an interview has already been tried, recommend written response with narrowed claims based on precedent claim evolution patterns.
METHOD OF CORRECTING AN ERROR OF A LAYOUT OF A PATTERN, METHOD OF MANUFACTURING A PHOTOMASK USING THE SAME, AND METHOD OF FORMING A PATTERN USING THE SAME
3y 7m to grantGranted May 19, 2026
Study what changed to get past this examiner. Based on 5 most recent grants.
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