CTNF 18/337,096 CTNF 82519 DETAILED ACTION Continued Examination Under 37 CFR 1.114 07-42-04 AIA A request for continued examination under 37 CFR 1.114, including the fee set forth in 37 CFR 1.17(e), was filed in this application after final rejection. Since this application is eligible for continued examination under 37 CFR 1.114, and the fee set forth in 37 CFR 1.17(e) has been timely paid, the finality of the previous Office action has been withdrawn pursuant to 37 CFR 1.114. Applicant's submission filed on January 26, 2026 has been entered. Claim Rejections - 35 USC § 103 07-20-aia AIA The following is a quotation of 35 U.S.C. 103 which forms the basis for all obviousness rejections set forth in this Office action: A patent for a claimed invention may not be obtained, notwithstanding that the claimed invention is not identically disclosed as set forth in section 102, if the differences between the claimed invention and the prior art are such that the claimed invention as a whole would have been obvious before the effective filing date of the claimed invention to a person having ordinary skill in the art to which the claimed invention pertains. Patentability shall not be negated by the manner in which the invention was made. 07-21-aia AIA Claim (s) 1, 2, 4, 17, 18, 22 and 23 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fukushima et al. (U.S. Patent 10,651,846, hereafter Fukushima) in view of Grimaldi et al. (U.S. Patent 6,518,815, hereafter Grimaldi) and further in view of Hung et al. (U.S. Patent Application Publication 2022/0384421, hereafter Hung) . Claim 1: Fukushima teaches a circuit (Figure 9), comprising: a first transistor (PP1) coupled between a power terminal (VIN) and a switching terminal (SW), the first transistor including a first control terminal (HG1); and a second transistor (HM1) coupled between the power terminal (VIN) and the first control terminal (HG1), the second transistor having a second control terminal (DHI2). Fukushima does not specifically teach that the ringing control circuit includes a variable resistance circuit. Grimaldi teaches a variable resistance circuit (5 and 12; Figure 2, column 1 lines 11-17 and column 3 lines 18-20) coupled between the second control terminal (gate of 1 corresponding to DHI2 of Fukushima) and the switching terminal (3 corresponding to SW of Fukushima), the variable resistance circuit including a control input coupled to the power terminal (gate of 12 connected to 4, corresponding to VIN of Fukushima). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the variable resistance circuit taught by Grimaldi in the circuit of Fukushima to prevent self-activation of the transistor HM1 and turns off HM1 in a stable way (column 4 lines 1-15 of Grimaldi). Fukushima and Grimaldi do not specifically teach a capacitor between the power terminal and the second control terminal. Hung teaches a transistor (Figure 2B; PMOS in 10i corresponding to 1 of Grimaldi and HM1 of Fukushima) and a capacitor (C1) coupled between the power terminal (N1 corresponding to VIN of Fukushima) and the second control terminal (gate of the PMOS in 10i). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the capacitor taught by Hung in the circuit of Fukushima and Grimaldi to provide a detection for a high voltage level at node N1, corresponding to the VIN node of Fukushima ([0058] and [0064]). Claim 2: The combined circuit further teaches that the variable resistance circuit (5 and 12; Figure 2 of Grimaldi) includes a third transistor (12) having a third control terminal (gate of 12); the third transistor (12) is coupled between the second control terminal (gate of 1 corresponding to DHI2 of Fukushima) and the switching terminal (3 corresponding to SW of Fukushima); and the third control terminal (gate of 12) is coupled to the power terminal (gate of 12 connected to 4, corresponding to VIN of Fukushima). Claim 4: The combined circuit further teaches that the variable resistance circuit includes a resistor (5; Figure 2 of Grimaldi), or a fourth transistor biased in a linear region, coupled between the second control terminal and the switching terminal (gate of 1 and 3, corresponding to DHI2 and SW of Fukushima). Claim 17: Fukushima teaches a circuit (Figure 9), comprising: a high-side transistor (PP1) coupled between a power terminal (VIN) and a switching terminal (SW), the high-side transistor including a high-side control terminal (HG1); a low-side transistor (PN2) coupled between the switching terminal (SW) and a ground terminal (ground), the low-side transistor including a low-side control terminal (LG1); a high-side driver (HDRV1A) having a first driver input (DH) and a first driver output (output to HG1), in which the first driver input is coupled to a first PWM terminal (output of Logic via VPWM) and the first driver output is coupled to the high-side control terminal (HG1); a low-side driver (LDRV2A) having a second driver input (DL) and a second driver output (to LG1), in which the second driver input is coupled to a second PWM terminal (output of Logic via VPWM) and the second driver output is coupled to the low-side control terminal (LG1); a ringing control circuit (HM1) having a first terminal (connected to VIN), a second terminal (connected to SW), and a third terminal (gate of HM1), the first terminal coupled to the power terminal (VIN) or the switching terminal, the second terminal connected to the high-side control terminal (HG1) or the low-side control terminal, the third terminal coupled to the switching terminal (SW) or the ground terminal, the high-side ringing control circuit including: a first transistor (HM1) coupled between the first terminal (VIN) and the second terminal (HG1), the first transistor having a first control terminal (DHI2). Fukushima does not specifically teach that the ringing control circuit includes a variable resistance circuit. Grimaldi teaches a variable resistance circuit (5 and 12; Figure 2, column 1 lines 11-17 and column 3 lines 18-20) coupled between the second control terminal (gate of 1 corresponding to DHI2 of Fukushima) and the third terminal (3 corresponding to SW of Fukushima), the variable resistance circuit including a second transistor (12) having a second control terminal coupled to the first terminal (gate of 12 connected to 4, corresponding to VIN of Fukushima), the second transistor coupled between the first control terminal and the third terminal (DHI2 and SW of Fukushima). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the variable resistance circuit taught by Grimaldi in the circuit of Fukushima to prevent self-activation of the transistor HM1 and turns off HM1 in a stable way (column 4 lines 1-15 of Grimaldi). Fukushima and Grimaldi do not specifically teach a capacitor between the power terminal and the second control terminal. Hung teaches a transistor (Figure 2B; PMOS in 10i corresponding to 1 of Grimaldi and HM1 of Fukushima) and a capacitor (C1) coupled between the power terminal (N1 corresponding to VIN of Fukushima) and the second control terminal (gate of the PMOS in 10i). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the capacitor taught by Hung in the circuit of Fukushima and Grimaldi to provide a detection for a high voltage level at node N1, corresponding to the VIN node of Fukushima ([0058] and [0064]). Claim 18: The combined circuit further teaches that the variable resistance circuit includes a resistor (5 of Grimaldi) coupled between the first control terminal (DHI2 of Fukushima) and the third terminal (SW of Fukushima). Claim 22: The combined circuit further teaches a diode (8, 9 of Grimaldi) coupled between the second control terminal (2, corresponding to DHI2 of Fukushima) and the switching terminal (3, corresponding to SW of Fukushima). Claim 23: The combined circuit further teaches a diode (D1 of Hung) coupled between the power terminal (N1 corresponding to 4 of Grimaldi and VIN of Fukushima) and the second transistor (12b corresponding to 1 of Grimaldi) . 07-21-aia AIA Claim (s) 11 and 12 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fukushima in view of Grimaldi . Claim 11: Fukushima teaches a circuit (Figure 9) comprising: a transistor (PP1) coupled between a first current terminal (drain of PP1 connected to VIN) and a second current terminal (source of PP1 connected to SW), the transistor including a control terminal (HG1); and a ringing control circuit (HM1; column 9 lines 59-67, column 10 lines 1-3 and column 22 lines 8-13) coupled between the first current terminal (at VIN) and the control terminal (HG1). Fukushima does not specifically teach providing a current to the control terminal responsive to a voltage at the first current terminal, and to adjust the current inversely with the voltage. Grimaldi teaches a variable resistance circuit (5 and 12; Figure 2, column 1 lines 11-17 and column 3 lines 18-20) to provide a current from the first current terminal (source of 1 corresponding to VIN of Fukushima) to the control terminal (via 5 when 12 is conducting) responsive to a voltage at the first current terminal, and to adjust the current inversely with the voltage (column 4 lines 1-17 where when the potential at the drain terminal increases, the gate terminal is blocked at the value of the potential of the source terminal and transistor 1 is turned off via resistor 5 and switch 12). It would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the variable resistance circuit taught by Grimaldi in the circuit of Fukushima to prevent self-activation of the transistor HM1 and turns off HM1 in a stable way (column 4 lines 1-15 of Grimaldi). Claim 12: The combined circuit further teaches that the transistor is a first transistor (PP1 of Fukushima), the control terminal is a first control terminal (HG1), the voltage is a first voltage (voltage at VIN), and the ringing control circuit includes: a second transistor (HM1 of Fukushima) having a second control terminal (DHI2), the second transistor coupled between the first current terminal (VIN) and the first control terminal (HG1) to set the current (via current through HM1); and a variable resistance circuit (5 and 12 of Grimaldi) coupled between the second current terminal (SW of Fukushima) and the second control terminal (DHI2 of Fukushima); the variable resistance circuit configurable to set a second voltage between the second control terminal and the second current terminal (voltage between DHI2 and SW of Fukushima) by: setting a resistance (5) between the second control terminal and the second current terminal responsive to the voltage (when 12 is conducting) . 07-21-aia AIA Claim (s) 3 is/are rejected under 35 U.S.C. 103 as being unpatentable over Fukushima in view of Grimaldi in view of Hung and further in view of Von Sichart (U.S. Patent 4,682,047) . Claim 3: Fukushima, Grimaldi and Hung teach the limitations of claim 2 above. Fukushima further teaches that the second transistor (HM1) is an n-channel transistor (Figure 9). Fukushima, Grimaldi and Hung do not specifically teach that the first transistor (PP1 of Fukushima) is an n-channel transistor or the third transistor (12 of Grimaldi) is a p-channel field effect transistor. Von Sichart teaches in Figures 1 and 2 that an NMOS transistor is equivalent to an inverter and a PMOS transistor connected in series (column 4 lines 65-67, column 5 lines 1-7). Therefore, it would have been obvious to one of ordinary skill in the art before the effective filing date of the claimed invention to use the teachings of Von Sichart to use a PMOS transistor connected in series with an inverter in place of the NMOS transistor and vice versa in the circuit of Fukushima, Grimaldi and Hung for the purpose of improving conductivity (Figures 4 and 5, column 5 lines 12-15) and as an art-recognized logical equivalent circuit . Allowable Subject Matter Claims 5-9, 13-15 and 19-21 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims for the reasons stated in the Non-Final Rejection dated March 20, 2025. Response to Arguments 07-37 AIA Applicant's arguments filed January 26, 2026 have been fully considered but they are not persuasive. Applicant asserts that Grimaldi does not teach that resistor 5 and switch 12 form a variable resistance circuit. Examiner respectfully disagrees. Grimaldi teaches that when switch 12 is off, the resistance is infinite (the gate is disconnected from the source terminal; column 3 lines 65-67) and when switch 12 is on, the resistance is the value of resistor 5 (column 4 lines 10-15). Therefore, Grimaldi teaches a variable resistance circuit. Applicant further asserts that Grimaldi teaches placing resistor 5 and switch 12 between HM1 and SW of Fukushima. Examiner respectfully disagrees. In Grimaldi, the signal output from control unit 10 is a driving signal (column 4 lines 1-2). Therefore, in the combined circuit the resistor 5 and switch 12 would be connected between DHI2 (the driving signal) and the switching terminal (3 corresponding to SW of Fukushima). Examiner notes that if resistor 5 and switch 12 were connected in the manner suggested in Applicant’s response (between the gate and source of HM1), then resistor 5 and switch 12 would still be connected to the switching terminal SW via HPD1A. Applicant further asserts that Grimaldi does not teach providing a current from the drain of power device 1. Examiner respectfully disagrees for the reasons stated above, where the resistor 5 and switch 12 would be connected between DHI2 (the driving signal) and the switching terminal (3 corresponding to SW of Fukushima). Applicant further asserts that Grimaldi does not teach adjusting the current inversely with the voltage at the drain of power device 1 because switch 12 is an NMOS transistor. Examiner respectfully disagrees. Grimaldi teaches a variable resistance circuit (5 and 12; Figure 2, column 1 lines 11-17 and column 3 lines 18-20) to provide a current from the first current terminal (source of 1 corresponding to VIN of Fukushima) to the control terminal (via 5 when 12 is conducting) responsive to a voltage at the first current terminal, and to adjust the current inversely with the voltage (column 4 lines 1-17 where when the potential at the drain terminal increases, the gate terminal is blocked at the value of the potential of the source terminal and transistor 1 is turned off via resistor 5 and switch 12). Applicant further asserts that Grimaldi does not teach providing a current from the drain of a device to the gate of the device. Examiner respectfully disagrees for the reasons stated above, where the first terminal is the source of PP1 of Fukushima. Conclusion Any inquiry concerning this communication or earlier communications from the examiner should be directed to COLLEEN J O'TOOLE whose telephone number is (571)270-1273. The examiner can normally be reached Monday - Friday, 9:00 am - 6:00pm. Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice. If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Menatoallah Youssef can be reached at 571-270-3684. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300. Information regarding the status of published or unpublished applications may be obtained from Patent Center. Unpublished application information in Patent Center is available to registered users. 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If you would like assistance from a USPTO Customer Service Representative, call 800-786-9199 (IN USA OR CANADA) or 571-272-1000. /C.J.O/Examiner, Art Unit 2836 /RYAN JOHNSON/Primary Examiner, Art Unit 2836 Application/Control Number: 18/337,096 Page 2 Art Unit: 2836 Application/Control Number: 18/337,096 Page 3 Art Unit: 2836 Application/Control Number: 18/337,096 Page 4 Art Unit: 2836 Application/Control Number: 18/337,096 Page 5 Art Unit: 2836 Application/Control Number: 18/337,096 Page 6 Art Unit: 2836 Application/Control Number: 18/337,096 Page 7 Art Unit: 2836 Application/Control Number: 18/337,096 Page 8 Art Unit: 2836 Application/Control Number: 18/337,096 Page 10 Art Unit: 2836 Application/Control Number: 18/337,096 Page 11 Art Unit: 2836 Application/Control Number: 18/337,096 Page 12 Art Unit: 2836
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