DETAILED ACTION
Notice of Pre-AIA or AIA Status
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Election/Restrictions
Applicant's election with traverse of species I and II in the reply filed on 5/20/26 is acknowledged. The traversal of applicant’s argument is persuasive. Therefore, the previous restriction requirement has been withdrawn.
Claim Rejections - 35 USC § 102
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claim(s) 1, 4, 6 and 8 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by [Seshita et al (Fig. 1A); 10,033,332].
Regarding claim 1, Seshita et al discloses an amplifier circuit comprising an input terminal (the terminal receiving the input signal RFin), an output terminal (the terminal generating the output signal RFout), a first transistor (FET1) connected between the input terminal (the terminal receiving the input signal RFin) and the output terminal (the terminal generating the output signal RFout), a coiled (Ls) and the first transistor (FET1) has a first control terminal (gate terminal of FET1) and a first terminal (drain terminal of FET1) and a second terminal (source terminal of FET1) and wherein the two (gate and source terminals of the transistor FET1) of the first control terminal (gate terminal of FET1) and the first terminal (drain terminal of FET1) and the second terminal (source terminal of FET1) are connected to two different ground terminals (1st ground terminal: ground connecting to the lower terminal of the inductor Ls; 2nd ground terminal: ground connecting to the lower terminal of the capacitor CB1), and wherein the inductor (Ls) is connected between the two different ground terminals (1st ground terminal: ground connecting to the lower terminal of the inductor Ls; 2nd ground terminal: ground connecting to the lower terminal of the capacitor CB1) in parallel to the path between the input terminal (the terminal receiving the input signal RFin) and the output terminal (the terminal generating the output signal RFout). It should be noted that when the output terminal (the terminal generating the output signal RFout) is pulling down to the ground level (just like the input terminal), then, the input terminal and output terminal are connected in parallel to each other and also, the inductor (Ls) is connected in parallel to the input terminal (the terminal receiving the input signal RFin).
Regarding claim 4, Seshita et al further comprising a capacitor (Ccon) connected in parallel to the inductor (Ls).
Regarding claim 6, wherein the inductor (Ls) is in a wiring layer on a semiconductor substrate (the location wherein the inductor Ls is mounted on).
Regarding claim 8, wherein the inductor (Ls) and the capacitor (Ccon) are in a wiring layer on a semiconductor substrate (the location where the inductor Ls and the capacitor Ccon) are mounted on).
Allowable Subject Matter
Claims 10 and 11 are objected to as being dependent upon a rejected base claim, but would be allowable if rewritten in independent form including all of the limitations of the base claim and any intervening claims.
Reasons for Allowance
Claims 2, 3, 5, 7, 9 and 12-15 are allowed.
The following is an examiner’s statement of reasons for allowance:
Regarding claim 10, the closest prior art of record, Seshita et al does not disclose the following limitation: the inductor is connected between the first control terminal and the first terminal.
Regarding claim 11, the closest prior art of record, Seshita et al does not disclose the following limitation: the first end is connected to the first control terminal and the second end is connected to the first terminal.
Regarding claim 2, the closest prior art of record, Seshita et al does not disclose the following limitation: the inductor is connected between the two different ground terminals.
Regarding claim 15, the closest prior art of record, Seshita et al does not disclose the following limitation: the first ground terminal and the second terminal are connected to a substrate with a solder bump interposed therebetween.
Any comments considered necessary by applicant must be submitted no later than the payment of the issue fee and, to avoid processing delays, should preferably accompany the issue fee. Such submissions should be clearly labeled “Comments on Statement of Reasons for Allowance.”
Conclusion
Applicant's amendment necessitated the new ground(s) of rejection presented in this Office action. Accordingly, THIS ACTION IS MADE FINAL. See MPEP § 706.07(a). Applicant is reminded of the extension of time policy as set forth in 37 CFR 1.136(a).
A shortened statutory period for reply to this final action is set to expire THREE MONTHS from the mailing date of this action. In the event a first reply is filed within TWO MONTHS of the mailing date of this final action and the advisory action is not mailed until after the end of the THREE-MONTH shortened statutory period, then the shortened statutory period will expire on the date the advisory action is mailed, and any nonprovisional extension fee (37 CFR 1.17(a)) pursuant to 37 CFR 1.136(a) will be calculated from the mailing date of the advisory action. In no event, however, will the statutory period for reply expire later than SIX MONTHS from the mailing date of this final action.
Any inquiry concerning this communication or earlier communications from the examiner should be directed to Henry Choe whose telephone number is (571)272-1760. The examiner can normally be reached MONDAY-FRIDAY 5AM-11:00PM.
Examiner interviews are available via telephone, in-person, and video conferencing using a USPTO supplied web-based collaboration tool. To schedule an interview, applicant is encouraged to use the USPTO Automated Interview Request (AIR) at http://www.uspto.gov/interviewpractice.
If attempts to reach the examiner by telephone are unsuccessful, the examiner’s supervisor, Jessica Han can be reached at 571-272-2078. The fax phone number for the organization where this application or proceeding is assigned is 571-273-8300.
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/HENRY CHOE/ Primary Examiner, Art Unit 2843
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