DETAILED ACTION
Claims 1,3-6,8-21 and 23-31 are pending.
Notice of Pre-AIA or AIA Status
This Office Action is sent in response to Applicant’s Communication received on 04/07/2026 for application number 18/338,165.
The present application, filed on or after March 16, 2013, is being examined under the first inventor to file provisions of the AIA .
Claim Rejections - 35 USC § 102
In the event the determination of the status of the application as subject to AIA 35 U.S.C. 102 and 103 (or as subject to pre-AIA 35 U.S.C. 102 and 103) is incorrect, any correction of the statutory basis (i.e., changing from AIA to pre-AIA ) for the rejection will not be considered a new ground of rejection if the prior art relied upon, and the rationale supporting the rejection, would be the same under either status.
The following is a quotation of the appropriate paragraphs of 35 U.S.C. 102 that form the basis for the rejections under this section made in this Office action:
A person shall be entitled to a patent unless –
(a)(1) the claimed invention was patented, described in a printed publication, or in public use, on sale, or otherwise available to the public before the effective filing date of the claimed invention.
Claims 30 and 31 are rejected under 35 U.S.C. 102(a)(1) as being anticipated by Hu et al. (US 2017/0293312 A1).
Regarding claim 30, Hu teaches an apparatus for power management (Figures 4-7), comprising:
a low-dropout (LDO) regulator (Figure 4, LDO1 35 and LDO2 36; and claim 17);
a headswitch coupled between a voltage rail and a power supply node of the LDO regulator (“the first power circuit includes a first regulator charged by a battery voltage through a first switch,” par 0050 and Figure 5, switch 17) [LDO regulator is connected to voltage rail via a switch (headswitch)], wherein the power supply node comprises an input power supply node of the LDO regulator (“the first power MOS unit receives a battery voltage at the first source terminal.” Par 0041 and Figure 7) [the source terminal of the power unit is the input power supply node for the LDO regulator];
a level shifter configured to control a state of the headswitch (“the level shift unit 25 can supply a control signal CTRLA having the fourth power level to drive the switch 17.” Par 0030 and Figure 5); and
logic circuitry coupled to the level shifter and configured to control the level shifter based on a first sleep state, a second sleep state, and a third state of the apparatus (the system 24 including a digital circuit 240…The digital circuit 240 outputs a third power signal SPS3 having a third power level” par 0024 and “third power level can satisfy the demand to successfully drive the level shift unit 25.” Par 0034 and “idle mode, and typically the low level voltage is in the range of 0.07˜0.9 volts” par 0022 [first sleep state] and “a wake-up signal having a wake-up power level from the system” par 0010 [second sleep state; this is an intermediate phase where voltage is boosted to .9V, see paragraphs 34-36 and Figure 9] and “fourth power signal SPS4 to activate and power the digital circuit 240 under an active mode.” Par 0024 [third state]) [the digital logic generates control signals to manage the level shifter’s output based on the transition through various power modes].
Regarding claim 31, Hu teaches the apparatus of claim 30, wherein an output of the level shifter is coupled to a control input of the headswitch coupled between the voltage rail and the input power supply node of the LDO regulator (“the level shift unit 25 can supply a control signal CTRLA having the fourth power level to drive the switch 17. ” par 0030 and “switches 17 and 18 coupled to the battery may conduct at the same time, and the battery provides each of the regulators LDO1 and LDO2 with a battery voltage BTV1.” Par 0022) [switch 17 (headswitch) is coupled between battery voltage rail and input power supply nodes of the LDO regulators, see Figures 4, 5 and 7].
Allowable Subject Matter
Claims 1, 3-6, 8-21, 23-28 and 29 are allowed.
Response to Arguments
Applicant’s arguments, see pages 1-2, filed 04/07/2026, with respect to claims 1 and 29 have been fully considered and are persuasive. The rejection of claims 1 and 29 has been withdrawn.
Applicant’s arguments with respect to claim(s) 30 have been considered but are moot because the new ground of rejection does not rely on any reference applied in the prior rejection of record for any teaching or matter specifically challenged in the argument.
No additional arguments were presented as to the remaining claims. As such, the rejection is maintained.
Conclusion
Any inquiry concerning this communication or earlier communications from the examiner should be directed to AYMAN FATIMA whose telephone number is (571)270-0830. The examiner can normally be reached M to Fri between 8am and 4pm EST.
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/AYMAN FATIMA/Examiner, Art Unit 2176
/JAWEED A ABBASZADEH/Supervisory Patent Examiner, Art Unit 2176
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